Texas Instruments TLVM13660 User manual

User’s Guide
TLVM13660 36-V, 6-A Buck Regulator Evaluation Module
User's Guide
ABSTRACT
With an input operating voltage range from 3 V to 36 V and rated output current from 2 A to 6 A, the
TLVM13620, TLVM13630, TLVM13640, and TLVM13660 family of synchronous buck power modules outlined
in Table 1-1 provides flexibility, scalability, and optimized solution size for a wide range of applications. With
intergrated power MOSFETs, buck inductor, and PWM controller, these modules enable DC/DC solutions with
high density, low EMI, and increased flexibility. Available EMI mitigation features include RBOOT-configured
switch-node slew rate control and integrated capacitors for the high-frequency switching loops. All modules are
rated for ambient and junction temperatures up to 105°C and 125°C, respectively.
Table 1-1. TLVM13620, TLVM13630, TLVM13640, and TLVM13660 Synchronous Buck DC/DC Power
Module Family
DC/DC Module Rated IOUT Package Dimensions Features EMI Mitigation
TLVM13620 2 A B0QFN (30) 6.0 × 4.0 × 1.8 mm RT adjustable FSW, PGOOD
indicator, external bias
option, inverting buck-boost
(IBB) capability
Integrated input, VCC and CBOOT
capacitors
TLVM13630 3 A
TLVM13640 4 A B3QFN (20) 5.5 × 5.0 × 4.0 mm Integrated input, VCC and CBOOT
capacitors; slew-rate control
TLVM13660 6 A
The TLVM13660EVM uses the TLVM13660 – a compact, easy-to-use synchronous buck module IC with a wide
output voltage range of 1 V to 6 V and an output current up to 6 A. The default output voltage of the EVM is 5 V
and is adjustable using jumper settings to the following output voltages as needed:
• 1.2 V
• 1.8 V
• 2.5 V
• 3.3 V
The solution supports adjustable input voltage UVLO for application-specific power-up and power-down
requirements, a PGOOD indicator for sequencing and output voltage monitoring, and integrated VIN, VCC,
and CBOOT capacitors for low EMI signature.
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Table of Contents
1 High-Density EVM Description.............................................................................................................................................. 4
1.1 Typical Applications............................................................................................................................................................4
1.2 Features and Electrical Performance.................................................................................................................................4
2 EVM Performance Specifications..........................................................................................................................................5
3 EVM Photo...............................................................................................................................................................................6
4 Test Setup and Procedure......................................................................................................................................................7
4.1 EVM Connections.............................................................................................................................................................. 7
4.2 EVM Setup......................................................................................................................................................................... 8
4.3 Test Equipment.................................................................................................................................................................. 9
4.4 Recommended Test Setup.................................................................................................................................................9
4.5 Test Procedure................................................................................................................................................................... 9
5 Test Data and Performance Curves.................................................................................................................................... 10
5.1 Efficiency and Load Regulation Performance.................................................................................................................. 10
5.2 Waveforms........................................................................................................................................................................11
5.3 Bode Plot..........................................................................................................................................................................11
5.4 Thermal Performance...................................................................................................................................................... 12
5.5 EMI Performance............................................................................................................................................................. 14
6 EVM Documentation.............................................................................................................................................................15
6.1 Schematic........................................................................................................................................................................ 15
6.2 List of Materials................................................................................................................................................................ 16
6.3 PCB Layout...................................................................................................................................................................... 17
6.4 Assembly Drawings..........................................................................................................................................................20
6.5 Multi-Layer Stackup......................................................................................................................................................... 21
7 Device and Documentation Support...................................................................................................................................22
7.1 Device Support.................................................................................................................................................................22
7.2 Documentation Support................................................................................................................................................... 22
List of Figures
Figure 3-1. TLVM13660 EVM Photo............................................................................................................................................6
Figure 4-1. EVM Test Setup.........................................................................................................................................................7
Figure 5-1. Efficiency, VOUT = 5 V, FSW = 1 MHz....................................................................................................................... 10
Figure 5-2. Efficiency, VOUT = 3.3 V, FSW = 750 kHz................................................................................................................. 10
Figure 5-3. Efficiency, VOUT = 2.5 V, FSW = 500 kHz................................................................................................................. 10
Figure 5-4. Efficiency, VOUT = –5 V, FSW = 1 MHz..................................................................................................................... 10
Figure 5-5. Load and Line Regulation, VOUT = 5 V, FSW = 1 MHz............................................................................................. 10
Figure 5-6. Load and Line Regulation, VOUT = –5 V, FSW = 1 MHz........................................................................................... 10
Figure 5-7. Start-Up, VIN Stepped to 12 V................................................................................................................................. 11
Figure 5-8. Shutdown.................................................................................................................................................................11
Figure 5-9. Enable ON and OFF................................................................................................................................................11
Figure 5-10. Load Transient, 3 A to 6 A at 1 A/µs......................................................................................................................11
Figure 5-11. Bode Plot with Four 47-µF, 10-V, X7R Output Capacitors (100 µF Effective at 5 VDC, 25°C).............................. 11
Figure 5-12. Output Capacitance vs. Voltage Derating Curve................................................................................................... 11
Figure 5-13. Infrared Thermal Image: VIN = 12 V, VOUT = 5.0 V, IOUT = 6 A, FSW = 1 MHz....................................................... 12
Figure 5-14. Infrared Thermal Image: VIN = 24 V, VOUT = 5.0 V, IOUT = 6 A, FSW = 1 MHz....................................................... 12
Figure 5-15. Infrared Thermal Image: VIN = 12 V, VOUT = 3.3 V, IOUT = 6 A, FSW = 750 kHz.................................................... 12
Figure 5-16. Infrared Thermal Image: VIN = 24 V, VOUT = 3.3 V, IOUT = 6 A, FSW = 750 kHz.................................................... 12
Figure 5-17. Infrared Thermal Image: VIN = 12 V, VOUT = 2.5 V, IOUT = 6 A, FSW = 500 kHz.................................................... 12
Figure 5-18. Infrared Thermal Image: VIN = 24 V, VOUT = 2.5 V, IOUT = 6 A, FSW = 500 kHz.................................................... 12
Figure 5-19. Thermal Derating Curve: VIN = 12 V, VOUT = 5.0 V, FSW = 1 MHz........................................................................ 13
Figure 5-20. Thermal Derating Curve: VIN = 24 V, VOUT = 5.0 V, FSW = 1 MHz........................................................................ 13
Figure 5-21. Thermal Derating Curve: VIN = 12 V, VOUT = 3.3 V, FSW = 750 kHz......................................................................13
Figure 5-22. Thermal Derating Curve: VIN = 24 V, VOUT = 3.3 V, FSW = 750 kHz......................................................................13
Figure 5-23. Thermal Derating Curve: VIN = 12 V, VOUT = 2.5 V, FSW = 500 kHz......................................................................13
Figure 5-24. Thermal Derating Curve: VIN = 24 V, VOUT = 2.5 V, FSW = 500 kHz......................................................................13
Figure 5-25. CISPR 32 Class B Conducted Emissions: VIN = 12 V, VOUT = 5 V, FSW = 1 MHz.................................................14
Figure 5-26. CISPR 32 Class B Conducted Emissions: VIN = 24 V, VOUT = 5 V, FSW = 1 MHz.................................................14
Figure 5-27. CISPR 32 Class B Conducted Emissions: VIN = 12 V, VOUT = 3.3 V, FSW = 750 kHz...........................................14
Figure 5-28. CISPR 32 Class B Conducted Emissions: VIN = 24 V, VOUT = 3.3 V, FSW = 750 kHz...........................................14
Figure 5-29. CISPR 32 Class B Radiated Emissions: Horizontal Polarization.......................................................................... 14
Figure 5-30. CISPR 32 Class B Radiated Emissions: Vertical Polarization...............................................................................14
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Figure 6-1. EVM Schematic.......................................................................................................................................................15
Figure 6-2. 3D Top View............................................................................................................................................................ 17
Figure 6-3. 3D Bottom View.......................................................................................................................................................17
Figure 6-4. Top Layer Copper....................................................................................................................................................18
Figure 6-5. Layer 2 Copper........................................................................................................................................................18
Figure 6-6. Layer 3 Copper........................................................................................................................................................19
Figure 6-7. Bottom Layer Copper (Viewed From Top)...............................................................................................................19
Figure 6-8. Top Assembly (Top View)........................................................................................................................................ 20
Figure 6-9. Bottom Assembly (Bottom View).............................................................................................................................20
List of Tables
Table 1-1. TLVM13620, TLVM13630, TLVM13640, and TLVM13660 Synchronous Buck DC/DC Power Module Family...........1
Table 2-1. Electrical Performance Specifications.........................................................................................................................5
Table 4-1. EVM Power Connections............................................................................................................................................ 7
Table 4-2. EVM Signal Connections............................................................................................................................................ 7
Table 6-1. Component List of Materials..................................................................................................................................... 16
Table 6-2. Layer Stackup........................................................................................................................................................... 21
Trademarks
WEBENCH® is a registered trademark of Texas Instruments.
All trademarks are the property of their respective owners.
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1 High-Density EVM Description
The TLVM13660EVM features the TLVM13660 synchronous buck power module configured for operation with
typical 3-V to 36-V input bus applications. This wide-VIN range DC/DC solution offers outsized voltage rating and
operating margin to withstand supply-rail voltage transients.
The output voltage and switching frequency can each be set to one of five popular values by using configuration
jumpers. The EVM provides the full 6-A output current rating of the device. The selected input and output
capacitors accommodate the entire range of input voltage and the selectable output voltages on the EVM and
are available from multiple component vendors. Input and output voltage sense terminals and a test point header
facilitate measurement of the following:
• Efficiency and power dissipation
• Line and load regulation
• Load transient response
• Bode plot measurement (crossover frequency and phase margin)
The header also provides connections for enable ON/OFF (EN) and power good (PGOOD) indication. The
recommended PCB layout maximizes thermal performance and minimizes output ripple and noise.
1.1 Typical Applications
•Test and measurement, aerospace and defense
•Factory automation and control, general-purpose power supplies
•Inverting buck-boost (IBB) circuits requiring negative output voltage
1.2 Features and Electrical Performance
• Complete 6-A buck power stage with integrated power MOSFETs, buck inductor, and PWM controller
• Wide input voltage operating range of 3 V to 36 V (absolute maximum rating of 42 V)
• Default output voltage and switching frequency of 5 V and 1 MHz, respectively. Use jumper options for
alternative configurations:
– 1.2 V, 500 kHz
– 1.8 V, 500 kHz
– 2.5 V, 600 kHz
– 3.3 V, 750 kHz
– –5 V, 1 MHz
• High efficiency across a wide load-current range
– Full-load efficiency of 92% and 91.4% at VIN = 12 V and 24 V, respectively
– 95% and 93.5% efficiencies at half-rated load, VIN = 12 V and 24 V, respectively
– External bias option reduces no-load supply current and enhances thermal performance
• Improved EMI performance for noise-sensitive applications
– Meets CISPR 11 and CISPR 32 Class B EMI standards for both conducted and radiated emissions
– Input π-stage EMI filter with electrolytic capacitor for parallel damping
– Parallel input and output paths with symmetrical capacitor layouts minimize radiated field coupling
– FPWM mode provides constant switching frequency across the full load range for predictable EMI
signature
– Integrated input, VCC, and bootstrap capacitors keep high slew-rate switching currents in low-area
conduction loops to mitigate radiated emissions.
• Peak current-mode control architecture enables fast line and load transient response
– Integrated loop compensation and frequency-proportional slope compensation
• Inherent protection features for robust and reliable design
– Overcurrent protection (OCP) with peak and valley current limits
– Thermal shutdown protection with hysteresis
– PGOOD indicator with 100-kΩ pullup resistor to VOUT
– Resistor-programmable input voltage UVLO set to turn on and off at VIN of 5.1 V and 3.65 V, respectively
• Fully assembled, tested, and proven 4-layer PCB design with 76-mm × 63-mm total footprint
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2 EVM Performance Specifications
Unless otherwise indicated, VIN = 24 V, VOUT = 5 V, IOUT = 6 A, and FSW = 1 MHz
Table 2-1. Electrical Performance Specifications
Parameter Test Conditions MIN TYP MAX Unit
INPUT CHARACTERISTICS
Input voltage range, VIN Operating 4 36
V
Input voltage turn-on, VIN(on)
Adjusted using EN divider resistors
5.1
Input voltage turn-off, VIN(off) 3.65
Input voltage hysteresis, VIN(hys) 1.45
Input current, disabled, IIN(off) VEN = 0 V (with 402-kΩ and 133-kΩ UVLO divider) 45 µA
OUTPUT CHARACTERISTICS
Output voltage, VOUT (1) Adjustable from 1 V to 6 V 4.9 5.0 5.1 V
Output current, IOUT VIN = 4 V to 36 V (2) 0 6 A
Output voltage regulation, ΔVOUT
Load regulation IOUT = 0 A to 6 A 0.1%
Line regulation VIN = 6 V to 36 V 0.1%
Output voltage ripple, VOUT(AC) 25 mVrms
Output overcurrent protection, IOCP 8 A
SYSTEM CHARACTERISTICS
Default switching frequency, FSW(nom) Adjustable from 200 kHz to 2.2 MHz (based on VOUT) 1 MHz
Half-load efficiency, ηHALF (1) VIN = 24 V, IOUT = 3 A
VOUT = 5 V, FSW = 1 MHz 93.5%
VOUT = 3.3 V, FSW = 750 kHz 92.7%
VOUT = 2.5 V, FSW = 500 kHz 89.4%
VOUT = 1.8 V, FSW = 500 kHz 87%
VIN = 24 V, IOUT = –2 A (3) VOUT = –5 V, FSW = 1 MHz 90.5%
Full-load efficiency, ηFULL (1) VIN = 24 V, IOUT = 6 A
VOUT = 5 V, FSW = 1 MHz 91.4%
VOUT = 3.3 V, FSW = 750 kHz 88.5%
VOUT = 2.5 V, FSW = 500 kHz 85.7%
VOUT = 1.8 V, FSW = 500 kHz 84%
VIN = 24 V, IOUT = –4 A (3) VOUT = –5 V, FSW = 1 MHz 89.2%
Ambient temperature, TA–40 105 °C
Junction temperature, TJ–40 125
(1) The default output voltage and switching frequency of this EVM are 5 V and 1 MHz, respectively. The VLDOIN pin conencts to
the output for output voltages of 3.3 V and above. Efficiency and other performance metrics can change based on operating input
voltage, load current, switching frequency, external bias voltage, ambient temerature, externally connected output capacitance, and
other parameters.
(2) The recommended airflow is 200 LFM when operating at output currents greater than 4 A and switching freqeuncies above 1 MHz.
(3) Configure the EVM as an IBB topology with negative output voltage by connecting the input source between the VIN+ and VOUT+
power terminals. The achievable output current is IOUT = ILmax(DC) × (1 – D), where ILmax(DC) = 6 A is the rated DC current of the
integrated inductor of the module and D = |VOUT| / (VIN + |VOUT|) is the duty cycle.
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3 EVM Photo
Figure 3-1 highlights the buck module power stage and the various connection interfaces associated with the
EVM. Use terminal blocks J1 and J2 to connect the input supply and load, respectively. These terminal blocks
accept up to 16-AWG wire thickness.
Figure 3-1. TLVM13660 EVM Photo
CAUTION
Caution Hot surface.
Contact may cause burns.
Do not touch.
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4 Test Setup and Procedure
4.1 EVM Connections
Referencing the EVM connections described in Table 4-1, use the recommended test setup in Figure 4-1
to evaluate the TLVM13660. Working at an ESD-protected workstation, make sure that any wrist straps,
bootstraps, or mats are connected and referencing the user to earth ground before power is applied to the
EVM.
ACOM
Ammeter 1 Electronic Load
+ -
V
Voltmeter 1
COM V
Voltmeter 2
COM
Oscilloscope
+
Power Supply
ACOM
Ammeter 2
-
Figure 4-1. EVM Test Setup
SPACER
Table 4-1. EVM Power Connections
Label Description
VIN+ Positive input power connection
VIN– Negative input power connection
VOUT+ Positive output power connection
VOUT– Negative output power connection
Table 4-2. EVM Signal Connections
Label(1) Description
VIN S+ Positive input sense terminal. Connect the multimeter positive lead for measuring efficiency.
VIN S– Negative input sense terminal. Connect a multimeter negative lead for measuring efficiency.
VOUT S+ Positive output sense terminal. Connect a multimeter positive lead for measuring efficiency and line and load regulation.
VOUT S– Negative output sense terminal. Connect the multimeter negative lead for measuring efficiency and line and load
regulation.
PGND Ground reference point
EN Precision enable input and input voltage UVLO protection. Tie EN to GND to disable the regulator. Use a logic signal to
control EN for remote ON/OFF functionality. Leave EN open for UVLO turn-on thresholds set at 5.1 V.
PGOOD Power-good monitor output. This is an open-drain flag with a 100-kΩ pullup resistor to VOUT.
BODE, VOUT
Bode plot measurement and signal injection. A 10-Ω resistor from BODE to VOUT facilitates oscillator signal injection
for bode plot measurement. Remove the jumper and apply a swept-frequency signal bettwen BODE and VOUT while
measuring the respective response at each terminal for loop gain measurement.
(1) Refer to the TLVM13660 data sheet for absolute maximum ratings associated with the features in this table.
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4.2 EVM Setup
• Use the VIN S+ and VIN S– test points along with the VOUT S+ and VOUT S– test points located near the
power terminal blocks as voltage monitoring points where voltmeters are connected to measure the input and
output voltages, respectively. Do not use these sense terminals as the input supply or output load connection
points. The PCB traces connected to these sense terminals are not designed to support high currents.
• Header J5 provides access to the following test points:
– VIN
– PGND
– EN
– PGOOD
– VOUT
– BODE
The power-good (PGOOD) test point is available to monitor when a valid output voltage is present on the
EVM. Refer to Section 4.1 for specific information related to the various test points.
• The VOUT SELECT header (J3) allows selection of the required output voltage:
– 1.2 V
– 1.8 V
– 2.5 V
– 3.3 V
– 5 V
Before applying power to the EVM, make sure that the jumper is present and properly positioned for the
intended output voltage. Always remove input power before changing the jumper settings.
• The FSW SELECT header (J4) allows selection of a suitable switching frequency:
– 500 kHz
– 600 kHz
– 750 kHz
– 800 kHz
– 1 MHz
This establishes an acceptable ripple current for the integrated buck inductor based on the circuit
requirements, specifically the input voltage range and output voltage. Before applying power to the EVM,
make sure that the jumper is present and properly positioned for the intended switching frequency. Always
remove input power before changing the jumper settings.
Note
Choose a switching freqeuency that aligns with the output voltage setting. For example, the following
list contains typical settings that yield 30% to 40% inductor peak-to-peak ripple current and optimal
slope compensation contribution:
• 1.2 V at 500 kHz
• 1.8 V at 500 kHz
• 2.5 V at 500 kHz or 600 kHz
• 3.3 V at 750 kHz or 800 kHz
• 5 V at 800 kHz or 1 MHz
Refer to the TLVM13660 data sheet, TLVM13660 Quickstart Calculator and WEBENCH® Power
Designer for additional guidance pertaining to module setup and component selection.
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4.3 Test Equipment
Voltage Source: The input voltage source VIN should be a 36-V variable DC source capable of supplying 6 A.
Multimeters:
•Voltmeter 1: Measure the input voltage at VIN S+ to VIN S–.
•Voltmeter 2: Measure the output voltage at VOUT S+ to VOUT S–.
•Ammeter 1: Measure the input current. Set the ammeter to 1-second aperture time.
•Ammeter 2: Measure the output current. Set the ammeter to 1-second aperture time.
Electronic Load: Use an electronic load set to constant-resistance (CR) or constant-current (CC) mode and
capable of 0 ADC to 6 ADC. For a no-load input current measurement, disconnect the electronic load as it can
draw a small residual current.
Oscilloscope: With the scope set to 20-MHz bandwidth and AC coupling, measure the output voltage ripple
directly across an output capacitor with a short ground lead normally provided with the scope probe. Place the
oscilloscope probe tip on the positive terminal of the output capacitor, holding the ground barrel of the probe
through the ground lead to the negative terminal of the capacitor. TI does not recommend using a long-leaded
ground connection because this may induce additional noise given a large ground loop. To measure other
waveforms, adjust the oscilloscope as needed.
Safety: Always use caution when touching any circuits that can be live or energized.
4.4 Recommended Test Setup
4.4.1 Input Connections
• Prior to connecting the DC input source, set the current limit of the input supply to 0.1-A maximum. Ensure
the input source is initially set to 0 V and connected to the VIN+ and VIN– connection points as shown in
Figure 4-1.
• Connect voltmeter 1 at VIN S+ and VIN S– connection points to measure the input voltage.
• Connect ammeter 1 to measure the input current and set it to at least a 0.1-second aperture time.
4.4.2 Output Connections
• Connect an electronic load to the VOUT+ and VOUT– connections as shown in Figure 4-1. Set the load to
constant-resistance mode or constant-current mode at 0 A before applying input voltage.
• Connect voltmeter 2 at VOUT S+ and VOUT S– sense points to measure the output voltage.
• Connect ammeter 2 to measure the output current.
4.5 Test Procedure
4.5.1 Line/Load Regulation and Efficiency
• Set up the EVM as described in Section 4.
• Set load to constant resistance or constant current mode to sink 0 A.
• Increase the input source voltage from 0 V to 24 V; use voltmeter 1 to measure the input voltage.
• Increase the current limit of the input supply to 6 A.
• Use voltmeter 2 to measure the output voltage, VOUT, and vary the load current from 0 A to 6 A DC; VOUT
should remain within the load regulation specification.
• Set the load current to 3 A (50% rated load) and vary the input source voltage from 6 V to 36 V; VOUT should
remain within the line regulation specification.
• Set the load current to 6 A (100% rated load) and measure the efficiency at typical input voltages (12 V, 24 V,
and 28 V).
• Decrease the load to 0 A. Decrease the input source voltage to 0 V.
CAUTION
Extended operation at high output current can raise component temperatures above 55°C. To
avoid risk of a burn injury, do not touch the components until they have cooled sufficiently after
disconnecting power. Review the thermal performance plots for more detail.
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5 Test Data and Performance Curves
Because actual performance data can be affected by measurement techniques and environmental variables,
these curves are presented for reference and can differ from actual field measurements. Unless otherwise
indicated, VIN = 24 V, VOUT = 5 V, IOUT = 6 A, and FSW = 1 MHz.
5.1 Efficiency and Load Regulation Performance
This section provides efficiency and load regulation plots for the EVM.
Output Current (A)
Efficiency (%)
0 1 2 3 4 5 6
70
75
80
85
90
95
100
VIN = 12 V
VIN = 24 V
VIN = 36 V
Figure 5-1. Efficiency, VOUT = 5 V, FSW = 1 MHz
Output Current (A)
Efficiency (%)
0 1 2 3 4 5 6
75
80
85
90
95
100
VIN = 12 V
VIN = 24 V
VIN = 36 V
Figure 5-2. Efficiency, VOUT = 3.3 V, FSW = 750 kHz
Output Current (A)
Efficiency (%)
0 1 2 3 4 5 6
65
70
75
80
85
90
95
100
VIN = 12 V
VIN = 24 V
VIN = 36 V
Figure 5-3. Efficiency, VOUT = 2.5 V, FSW = 500 kHz
Output Current (A)
Efficiency (%)
0 1 2 3 4 5
70
75
80
85
90
95
100
VIN = 12 V
VIN = 24 V
Figure 5-4. Efficiency, VOUT = –5 V, FSW = 1 MHz
Output Current (A)
Output Voltage (V)
0 1 2 3 4 5 6
4.95
4.975
5
5.025
5.05
VIN = 12 V
VIN = 24 V
VIN = 36 V
Figure 5-5. Load and Line Regulation, VOUT = 5 V,
FSW = 1 MHz
Output Current (A)
Output Voltage (V)
0 1 2 3 4 5
-4.95
-4.975
-5
-5.025
-5.05
VIN = 12 V
VIN = 24 V
Figure 5-6. Load and Line Regulation, VOUT = –5 V,
FSW = 1 MHz
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5.2 Waveforms
VIN 5 V/DIV
VOUT 5 V/DIV
4 ms/DIV
PG 5 V/DIV
Figure 5-7. Start-Up, VIN Stepped to 12 V
VIN 5 V/DIV
VOUT 5 V/DIV
4 ms/DIV
PG 5 V/DIV
Figure 5-8. Shutdown
VOUT 5 V/DIV
PG 5 V/DIV
4 ms/DIV
EN 2 V/DIV
Figure 5-9. Enable ON and OFF
IOUT 2 A/DIV
VOUT 0.1 V/DIV
80 s/DIV
Figure 5-10. Load Transient, 3 A to 6 A at 1 A/µs
5.3 Bode Plot
Figure 5-11 provides the bode plot at VIN = 12 V, VOUT = 5 V, and IOUT = 6 A. Figure 5-12 shows a typical capacitance versus
voltage curve for a 47-µF, 10-V, X7R output capacitor to highlight the effective capacitance value of a ceramic component.
See component details in Section 6.2.
Figure 5-11. Bode Plot with Four 47-µF, 10-V, X7R Output
Capacitors (100 µF Effective at 5 VDC, 25°C)
DC Bias (V)
Effective Capacitance (µF)
Figure 5-12. Output Capacitance vs. Voltage Derating Curve
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5.4 Thermal Performance
This secton presents (a) thermal images, and (b) derated curves as a function of load current and temperature.
Figure 5-13. Infrared Thermal Image: VIN = 12 V, VOUT = 5.0 V,
IOUT = 6 A, FSW = 1 MHz
Figure 5-14. Infrared Thermal Image: VIN = 24 V, VOUT = 5.0 V,
IOUT = 6 A, FSW = 1 MHz
Figure 5-15. Infrared Thermal Image: VIN = 12 V, VOUT = 3.3 V,
IOUT = 6 A, FSW = 750 kHz
Figure 5-16. Infrared Thermal Image: VIN = 24 V, VOUT = 3.3 V,
IOUT = 6 A, FSW = 750 kHz
Figure 5-17. Infrared Thermal Image: VIN = 12 V, VOUT = 2.5 V,
IOUT = 6 A, FSW = 500 kHz
Figure 5-18. Infrared Thermal Image: VIN = 24 V, VOUT = 2.5 V,
IOUT = 6 A, FSW = 500 kHz
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5.4 Thermal Performance (continued)
This secton presents (a) thermal images, and (b) derated curves as a function of load current and temperature.
Output Current (A)
Ambient Temperature (degC)
0 1 2 3 4 5 6
20
40
60
80
100
120
0 LFM
100 LFM
200 LFM
400 LFM
Figure 5-19. Thermal Derating Curve: VIN = 12 V, VOUT = 5.0 V,
FSW = 1 MHz
Output Current (A)
Ambient Temperature (degC)
0 1 2 3 4 5 6
20
40
60
80
100
120
0 LFM
100 LFM
200 LFM
400 LFM
Figure 5-20. Thermal Derating Curve: VIN = 24 V, VOUT = 5.0 V,
FSW = 1 MHz
Output Current (A)
Ambient Temperature (degC)
0 1 2 3 4 5 6
20
40
60
80
100
120
0 LFM
100 LFM
200 LFM
400 LFM
Figure 5-21. Thermal Derating Curve: VIN = 12 V, VOUT = 3.3 V,
FSW = 750 kHz
Output Current (A)
Ambient Temperature (degC)
0 1 2 3 4 5 6
20
40
60
80
100
120
0 LFM
100 LFM
200 LFM
400 LFM
Figure 5-22. Thermal Derating Curve: VIN = 24 V, VOUT = 3.3 V,
FSW = 750 kHz
Output Current (A)
Ambient Temperature (degC)
0 1 2 3 4 5 6
20
40
60
80
100
120
0 LFM
100 LFM
200 LFM
400 LFM
Figure 5-23. Thermal Derating Curve: VIN = 12 V, VOUT = 2.5 V,
FSW = 500 kHz
Output Current (A)
Ambient Temperature (degC)
0 1 2 3 4 5 6
20
40
60
80
100
120
0 LFM
100 LFM
200 LFM
400 LFM
Figure 5-24. Thermal Derating Curve: VIN = 24 V, VOUT = 2.5 V,
FSW = 500 kHz
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5.5 EMI Performance
See the schematic and list of materials for details of the input EMI filter to pass CISPR 32 Class B.
AVG detector
QP detector
Figure 5-25. CISPR 32 Class B Conducted
Emissions: VIN = 12 V, VOUT = 5 V, FSW = 1 MHz
AVG detector
QP detector
Figure 5-26. CISPR 32 Class B Conducted
Emissions: VIN = 24 V, VOUT = 5 V, FSW = 1 MHz
AVG detector
QP detector
Figure 5-27. CISPR 32 Class B Conducted
Emissions: VIN = 12 V, VOUT = 3.3 V, FSW = 750 kHz
AVG detector
QP detector
Figure 5-28. CISPR 32 Class B Conducted
Emissions: VIN = 24 V, VOUT = 3.3 V, FSW = 750 kHz
QPK detector
Figure 5-29. CISPR 32 Class B Radiated
Emissions: Horizontal Polarization
QPK detector
Figure 5-30. CISPR 32 Class B Radiated
Emissions: Vertical Polarization
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6 EVM Documentation
6.1 Schematic
Figure 6-1 illustrates the EVM schematic.
Figure 6-1. EVM Schematic
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6.2 List of Materials
Table 6-1. Component List of Materials
REF DES QTY VALUE DESCRIPTION PACKAGE PART NUMBER MANUFACTURER
C1 1 100 µF CAP, AL, 100 µF, 50 V, 0.34 Ω 8 × 10 mm UUD1H101MNL1GS Nichicon
C2, C3, C4, C5 4 10 µF CAP, CERM, 10 µF, 50 V, X7R 1210 GRM32ER71H106KA12L Murata
C6, C7, C8, C9 4 2.2 µF CAP, CERM, 2.2 µF, 50 V, X7R 0805 C2012X7R1H225K125AC TDK
C10, C11, C12, C13 4 47 µF CAP, CERM, 47 µF, 10 V, X7R 1210 GRM32ER71A476ME15L Murata
C14 1 0.1 µF CAP, CERM, 0.1 µF, 25 V, X7R 0603 Std Std
H1, H2, H3, H4 4 — Standoff, hex, 0.5"L, #4-40, nylon — 1902C Keystone
H5, H6, H7, H8 4 — Screw, pan head, 4-40, 3/8", nylon — NY PMS 440 0038 PH B&F Fastener Supply
J1, J2 2 — Terminal block, 2 pos, 5 mm, TH — TSW-110-07-G-S Phoenix Contact
J3, J4 2 — Header, 100 mil, 5 × 2, tin, TH — PEC05DAAN Sullins Connector Solutions
J5 1 — Header, 100 mil, 6 × 1, gold, TH — TSW-108-07-G-S Samtec
L1 1 1.5 µH Shielded power inductor, 1.5 µH, 9.5 mΩ — XGL4030-152MEC Coilcraft
R1 1 0 Ω RES, 0 Ω, 5%, 0.1 W 0603 Std Std
R2 1 402 kΩ RES, 402 kΩ, 1%, 0.063 W 0402 Std Std
R3 1 0 Ω RES, 0 Ω, 5%, 0.1 W 0402 Std Std
R4 1 1 Ω RES, 1 Ω, 1%, 0.063 W 0402 Std Std
R5 1 133 kΩ RES, 133 kΩ, 1%, 0.063 W 0402 Std Std
R6 1 10 Ω RES, 10 Ω, 1%, 0.1 W 0402 Std Std
R7 1 10 kΩ RES, 10 kΩ, 1%, 0.063 W 0402 Std Std
R8 1 100 kΩ RES, 100 kΩ, 1%, 0.063 W 0402 Std Std
R9 1 33.2 kΩ RES, 8.06 kΩ, 1%, 0.063 W 0402 Std Std
R10 1 2 kΩ RES, 2 kΩ, 1%, 0.063 W 0402 Std Std
R11 1 6.04 kΩ RES, 6.04 kΩ, 1%, 0.063 W 0402 Std Std
R12 1 6.98 kΩ RES, 6.98 kΩ, 1%, 0.063 W 0402 Std Std
R13 1 8.06 kΩ RES, 8.06 kΩ, 1%, 0.063 W 0402 Std Std
R14 1 16.9 kΩ RES, 16.9 kΩ, 1%, 0.063 W 0402 Std Std
R15 1 26.7 kΩ RES, 26.7 kΩ, 1%, 0.063 W 0402 Std Std
R16 1 22.1 kΩ RES, 22.1 kΩ, 1%, 0.063 W 0402 Std Std
R17 1 16.5 kΩ RES, 16.5 kΩ, 1%, 0.063 W 0402 Std Std
R18 1 13 kΩ RES, 13 kΩ, 1%, 0.063 W 0402 Std Std
SH-J1, SH-J2, SH-J3 3 — Shunt, 100 mil, gold plated, black Shunt 2 pos. 0.1" 881545-2 TE Connectivity
TP1, TP2, TP3, TP4 4 — Test point, miniature, SMT — 5019 Keystone
U1 1 — TLVM13660 36-V, 6-A buck power module B3QFN20 TLVM13660RDLR Texas Instruments
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6.3 PCB Layout
Figure 6-2 through Figure 6-7 show the PCB layout images, including 3D views, copper layers, assembly
drawings, and layer stackup diagram. The PCB is 62-mils standard thickness with 2-oz copper on all layers.
Figure 6-2. 3D Top View
Figure 6-3. 3D Bottom View
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Figure 6-4. Top Layer Copper
Figure 6-5. Layer 2 Copper
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Figure 6-6. Layer 3 Copper
Figure 6-7. Bottom Layer Copper (Viewed From Top)
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6.4 Assembly Drawings
Figure 6-8. Top Assembly (Top View)
Figure 6-9. Bottom Assembly (Bottom View)
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