Texas Instruments TPS650380EVM-054 User manual

User's Guide
SLVU720A–June 2012–Revised November 2012
TPS650380EVM-054
This user’s guide describes the characteristics, operation, and use of the Texas Instruments
TPS650380EVM-054 (PWR054-001) evaluation module (EVM). This EVM is designed to help the user
evaluate and test the operation and functionality of the TPS650380. The EVM converts a 2.5-V to 5.5-V
input voltage to 3 regulated output voltages that deliver 5 A, 2 A, and 1.8 A. The 5-A output operates 3
phases, the 2-A output operates 2 phases, and the 1.8-A output operates a single phase. The output
voltages are programmable via the I2C™ interfaces in 10-mV steps between 0.5 V and 1.77 V. This
user’s guide includes setup instructions for the hardware, printed-circuit board layouts for the EVM, a
schematic diagram, a bill of materials, and test results for the EVM.
Contents
1 Introduction .................................................................................................................. 2
2 Setup ......................................................................................................................... 3
3 Software Setup and Operation ............................................................................................ 8
4 Test Results ................................................................................................................ 11
5 Board Layout ............................................................................................................... 18
6 Schematic and Bill of Materials .......................................................................................... 24
List of Figures
1 TPS650380 Software Main Panel ........................................................................................ 8
2 Efficiency vs. Input Voltage (DCDC_A = DCDC_B = DCDC_C = 0.96 V, IOUTA = 3.4 A, IOUTB = 1.85 A, IOUTC
= 0.9 A) ..................................................................................................................... 11
3 Efficiency of DCDC_A vs. Output Current (VIN = 3.6 V).............................................................. 11
4 Efficiency of DCDC_B vs. Output Current (VIN = 3.6 V).............................................................. 12
5 Efficiency of DCDC_C vs. Output Current (VIN = 3.6 V).............................................................. 12
6 Load Regulation (VIN = 3.6 V, DCDC_A = DCDC_B = DCDC_C = 0.96 V) ....................................... 13
7 Line Regulation (DCDC_A = DCDC_B = DCDC_C = 0.96 V, IOUTA = 3.4 A, IOUTB = 1.85 A, IOUTC = 0.9 A)..... 13
8 Start-up (VIN = 3.6 V, DCDC_A = DCDC_B = DCDC_C = 0.96 V, IOUTA = IOUTB = IOUTC = 0 A) ................... 14
9 Shutdown (VIN = 3.6 V, DCDC_A = DCDC_B = DCDC_C = 0.96 V, IOUTA = IOUTB = IOUTC = 0 A, Active
Output Capacitor Discharge Enabled).................................................................................. 14
10 Shutdown (VIN = 3.6 V, DCDC_A = DCDC_B = DCDC_C = 0.96 V, IOUTA = IOUTB = IOUTC = 0 A, Active
Output Capacitor Discharge Enabled).................................................................................. 15
11 Output Voltage Ripple Measured Across C6 (VIN = 3.6 V, DCDC_A = 0.96 V, DCDC_B = DCDC_C =
disabled, IOUTA = 5 A) ...................................................................................................... 15
12 Input Voltage Ripple Measured Across C13 (VIN = 3.6 V, DCDC_A = 0.96 V, DCDC_B = DCDC_C =
Disabled, IOUTA = 5 A)...................................................................................................... 16
13 Load Transient Response (VIN = 3.6 V, DCDC_A = 0.96 V, DCDC_B = DCDC_C = Disabled, IOUTA = 3 A
to 5 A step)................................................................................................................. 16
14 Loop Response (VIN = 3.6 V, DCDC_A = 0.96 V, DCDC_B = DCDC_C = Disabled, IOUTA = 5 A) .............. 17
15 Thermal Performance (VIN = 3.6 V, DCDC_A = DCDC_B = DCDC_C = 0.96 V, IOUTA = 3.4 A, IOUTB = 1.85
A, IOUTC = 0.9 A) ............................................................................................................ 17
16 Assembly Layer............................................................................................................ 18
17 Top Silk Layer.............................................................................................................. 19
18 Top Layer................................................................................................................... 20
I2C is a trademark of NXP B.V Corporation.
VeriSign is a trademark of VeriSign, Inc.
All other trademarks are the property of their respective owners.
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19 Layer 2...................................................................................................................... 21
20 Layer 3 ..................................................................................................................... 22
21 Bottom Layer............................................................................................................... 23
22 Schematic, Page 1 ........................................................................................................ 25
23 Schematic, Page 2 ........................................................................................................ 26
List of Tables
1 Performance Specification Summary..................................................................................... 3
2 Default Jumper Settings.................................................................................................... 6
3 TPS650380 Solution Required Components .......................................................................... 24
4 TPS650380EVM-054 Evaluation Components........................................................................ 24
1 Introduction
1.1 Requirements
To operate this EVM, connect and properly configure the following components:
A personal computer (PC) with a USB port is required to operate this EVM. The TPS650380 interface
software runs on the PC and communicates with the EVM via the PC’s USB port. Commands can be
sent to the internal registers of the TPS650380 through the USB port. The software has been tested
with the PC requirements listed below. It may work with other operating systems and configurations,
but this has not been verified.
Personal Computer Requirements
• Windows XP™ operating system
• .NET 2.0 or higher
• USB port
• 10 MB of free hard disk space
• 512 MB of RAM
USB-TO-GPIO Adapter
The USB-TO-GPIO adapter is the link that allows the PC and the EVM to communicate. One end of
the USB-TO-GPIO adapter connects to the PC with the supplied USB cable. The other end of the
USB-TO-GPIO adapter connects to the EVM with the supplied ribbon cable.
When a command is written to the EVM, the interface program running on the PC sends the
commands to the PC USB port. The USB-TO-GPIO adapter receives the USB command, converts the
signal to an I2C protocol, and sends the I2C signal to the TPS650380 EVM board.
Software
Texas Instruments provides software to assist in evaluating this EVM. This software can be
downloaded from the TPS650380EVM-054 Product Page, located at:
http://focus.ti.com/docs/toolsw/folders/print/TPS650380EVM-054.html.
Printed-Circuit Board Assembly
The board contains the TPS650380 IC and the required external components to evaluate it as a
processor power supply solution.
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1.2 Performance Specification Summary
A summary of the performance specifications is provided in Table 1. Specifications are given for an input
voltage of 3.6 V and an output voltage of 0.96 V, unless otherwise specified. The TPS650380 is designed
and tested for VIN = 2.5 V to 5.5 V. The ambient temperature is 25°C for all measurements and the default
register settings are used, unless otherwise noted.
Table 1. Performance Specification Summary
SPECIFICATION TEST CONDITIONS MIN TYP MAX UNIT
VIN voltage range 2.5 3.6 5.5 V
Output voltage set point - each output rail Programmable in 10 mV steps 0.5 1.77 V
Output current range - DCDC_A 0 5 A
Output current range - DCDC_B 0 2 A
Output current range - DCDC_C 0 1.8 A
IOUTA = 3.4A, IOUTB = 1.85A, IOUTC = 0.9A,
Line regulation - each output rail ±0.15%
DCDC_A = DCDC_B = DCDC_C = 0.96V
+0.65% /
Load regulation - DCDC_A VIN = 3.6V, DCDC_A = 0.96V, FPWM_A = 0 –0.15%
Voltage change 50 mV
IOUTA = 3A to 5A Recovery time 4 μs
Load transient response - DCDC_A Voltage change 50 mV
IOUTA = 5A to 3A Recovery time 3 μs
VIN = 3.6V, DCDC_A = 0.96V, IOUTA = 5A,
Input ripple voltage - DCDC_A DCDC_B and DCDC_C disabled, measured 35 mVPP
across C13
VIN = 3.6V, DCDC_A = 0.96V, IOUTA = 5A,
Output ripple voltage - DCDC_A DCDC_B and DCDC_C disabled, measured 14 mVPP
across C6
Maximum efficiency - DCDC_A VIN = 3.6V, DCDC_A = 0.96V, IOUT = 200mA 90.1%
2 Setup
This section describes the jumpers and connectors on the EVM as well as how to properly connect, set
up, and use the TPS650380EVM-054 (PWR054-001).
2.1 Connector and Jumper Descriptions
2.1.1 J1 – VIN
This header is for the positive input supply voltage to the converter. Connect the input supply at this point
if the input current remains below 1 A. If the input current will exceed 1A, use terminal block J16 instead.
The leads to the input supply should be twisted and kept as short as possible to minimize EMI
transmission and reduce inductive voltage droop during a load transient event. This voltage should be
between 2.5 V and 5.5 V.
2.1.2 J2 – S+ and S-
Sense connector for VIN. Connect input supply's sense leads to this point. Monitor the VIN voltage at this
point.
2.1.3 J3 – GND
This is the return connection for the input power supply of the converter. Connect the input supply at this
point if the input current remains below 1 A. If the input current will exceed 1A, use terminal block J16
instead. The leads to the input supply should be twisted and kept as short as possible to minimize EMI
transmission and reduce inductive voltage droop during a load transient event.
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2.1.4 J4 – DCDC_A Output Voltage
This header connects to the DCDC_A output voltage. Connect the load (processor) at this point if the load
current remains below 1 A. If the load current will exceed 1A, use terminal block J17 instead. The leads to
the load should be twisted and kept as short as possible to minimize EMI transmission and reduce
inductive voltage droop during a load transient event.
2.1.5 J5 – FB_A+ and FB_A-
Remote sense connector for the DCDC_A output voltage. As shipped, the EVM is configured for local
sensing of the output voltage. If output voltage sensing at the load (remote sensing) is desired, see the
Remote Sense Resistors section. This is a high impedance connection back to the TPS650380's remote
sense inputs. Monitor the output voltage at this point.
2.1.6 J6 – GND
This is the return connection for the DCDC_A load. If the load current will exceed 1 A, do not use headers
J4 and J6, but use terminal block J17 instead. The leads to the load should be twisted and kept as short
as possible to minimize EMI transmission and reduce inductive voltage droop during a load transient
event.
2.1.7 J7 – DCDC_B Output Voltage
This header connects to the DCDC_B output voltage. Connect the load (processor) at this point if the load
current remains below 1 A. If the load current will exceed 1A, use terminal block J18 instead. The leads to
the load should be twisted and kept as short as possible to minimize EMI transmission and reduce
inductive voltage droop during a load transient event.
2.1.8 J8 – FB_B+ and FB_B-
Remote sense connector for the DCDC_B output voltage. As shipped, the EVM is configured for local
sensing of the output voltage. If output voltage sensing at the load (remote sensing) is desired, see the
Remote Sense Resistors section. This is a high impedance connection back to the TPS650380's remote
sense inputs. Monitor the output voltage at this point.
2.1.9 J9 – GND
This is the return connection for the DCDC_B load. If the load current will exceed 1 A, do not use headers
J4 and J6, but use terminal block J18 instead. The leads to the load should be twisted and kept as short
as possible to minimize EMI transmission and reduce inductive voltage droop during a load transient
event.
2.1.10 J10 – DCDC_C Output Voltage
This header connects to the DCDC_C output voltage. Connect the load (processor) at this point. The
leads to the load should be twisted and kept as short as possible to minimize EMI transmission and
reduce inductive voltage droop during a load transient event.
2.1.11 J11 – FB_C+ and S-
Pin 1 is the remote sense connector for the DCDC_C output voltage. As shipped, the EVM is configured
for local sensing of the output voltage. If output voltage sensing at the load (remote sensing) is desired,
see the Remote Sense Resistors section. This is a high impedance connection back to the TPS650380's
remote sense input. Pin 2 is used for monitoring the DCDC_C voltage and is not required to be connected
at the load. Monitor the output voltage at these points.
2.1.12 J12 – GND
This is the return connection for the DCDC_C load. The leads to the load should be twisted and kept as
short as possible to minimize EMI transmission and reduce inductive voltage droop during a load transient
event.
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2.1.13 J13 – VDD
This header is used to provide the VDD voltage (between 1.2 and 3.6 V) to the EVM if JP2 is not installed.
If JP2 is installed, the VDD voltage may be monitored at this header.
2.1.14 J14 – GND
This header is used to monitor the VDD voltage if JP2 is installed. If JP2 is not installed, this header is the
connection for the return connection of the applied VDD voltage.
2.1.15 J15 – INT Pin Output
This header provides the INT pin output on pin 1 with a convenient ground reference on pin 2.
2.1.16 J16 – VIN and GND Terminal Block
This terminal block is used instead of J1 or J3 when the input current exceeds 1 A. The leads to the input
supply should be twisted and kept as short as possible to minimize EMI transmission and reduce inductive
voltage droop during a load transient event. This voltage should be between 2.5 V and 5.5 V.
2.1.17 J17 – DCDC_A and GND Terminal Block
This terminal block is used, instead of J4 or J6, to connect to the load (processor) when the load current
exceeds 1 A. The leads to the load should be twisted and kept as short as possible to minimize EMI
transmission and reduce inductive voltage droop during a load transient event.
2.1.18 J18 – DCDC_B and GND Terminal Block
This terminal block is used, instead of J7 or J9, to connect to the load (processor) when the load current
exceeds 1 A. The leads to the load should be twisted and kept as short as possible to minimize EMI
transmission and reduce inductive voltage droop during a load transient event.
2.1.19 J19 – SYS I2C Connection from USB-TO-GPIO Adaptor
This connects the USB-TO-GPIO adaptor to the SYS I2C connection of the TPS650380. It provides the I2C
signals and a 3.3 V supply for powering VDD. This connector is keyed to prevent incorrect installation. Only
install a USB-TO-GPIO adaptor in either J19 or J25 at the same time.
2.1.20 J20 – SYS I2C Monitor Point and Alternate Connection
This header is provided to connect to or monitor the SYS I2C signals on the TPS650380EVM-054. If the
I2C signals are being sent via this header (and not via the USB-TO-GPIO adaptor), do not plug into the
J19 or J25 headers and provide a separate VDD supply between J13 and J14.
2.1.21 J21 – DVS I2C Monitor Point and Alternate Connection
This header is provided to connect to or monitor the DVS I2C signals on the TPS650380EVM-054. If the
I2C signals are being sent via this header (and not via the USB-TO-GPIO adaptor), do not plug into the
J19 or J25 headers and provide a separate VDD supply between J13 and J14.
2.1.22 J22 – DCDC_A Load Step Signal Input
This SMA connector accepts a signal input from a function generator that drives Q1 in order to evaluate
DCDC_A's transient response. This connector is not normally installed. TP3 can be used instead to apply
the signal.
2.1.23 J23 – DCDC_B Load Step Signal Input
This SMA connector accepts a signal input from a function generator that drives Q2 in order to evaluate
DCDC_B's transient response. This connector is not normally installed. TP4 can be used instead to apply
the signal.
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2.1.24 J24 – DCDC_C Load Step Signal Input
This SMA connector accepts a signal input from a function generator that drives Q3 in order to evaluate
DCDC_C's transient response. This connector is not normally installed. TP13 can be used instead to
apply the signal.
2.1.25 J25 – DVS I2C Connection from USB-TO-GPIO Adaptor
This connects the USB-TO-GPIO adaptor to the DVS I2C connection of the TPS650380. It provides the I2C
signals and a 3.3 V supply for powering VDD. This connector is keyed to prevent incorrect installation. Only
install a USB-TO-GPIO adaptor in either J19 or J25 at the same time.
2.1.26 JP1 – EN
This jumper sets the EN pin to either a logic high (ON, jumper across pins 1 and 2) or a logic low (OFF,
jumper across pins 2 and 3). When EN is low, the TPS650380 output will be off and not switching. Set EN
to ON to turn on the output voltage.
2.1.27 JP2 – VDD Control
This jumper is used to connect VDD to a 3.3V rail provided by the USB-TO-GPIO adaptor when the jumper
is installed. Alternatively, the user can provide their own VDD voltage (1.2 - 3.6V) between J13 and J14.
The JP2 jumper should not be installed in this case. For normal operation without an external supply
voltage, the jumper should be installed.
2.2 Software Setup
The software is available at the TI website,
http://focus.ti.com/docs/toolsw/folders/print/TPS650380EVM-054.html.
Download and unzip the file. Run setup.exe and follow the on screen instructions to complete the
installation.
NOTE: This installation page is best viewed with Microsoft Internet Explorer browser (it may not
work correctly with other browsers)
The Microsoft .Net Framework 2.0 is required for the software to run.
After installation, the software should automatically run. To run the software later, go to
Start→All Programs→Texas Instruments→TPS65038x EVM→TPS65038x EVM.
During future use of the software, it may prompt you to install a new version if one becomes available on
the Web.
NOTE: VeriSign™ Code Signing is used to prevent any malicious code from changing this
application. If at any time in the future the binaries are modified, the code will no longer
attempt to run.
2.3 Hardware Setup
Table 2 shows the board default jumper settings.
Table 2. Default Jumper Settings
JUMPER DEFAULT
JP1 Installed across pins 1 and 2
JP2 Installed across pins 1 and 2
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Host
Computer
USB Cable
USB
Interface
Adapter
Green LED
Indicates
Power
10-Pin
Ribbon
Cable
EVM Board
USB Interface Adaptor Quick Connection Diagram
www.ti.com Setup
Connect the USB-TO-GPIO adapter to your PC using the supplied USB cable. Connect the
TPS650380EVM connector J19 or J25 to the USB-TO-GPIO adapter using the supplied 10-pin ribbon
cable. The connectors on the ribbon cable are keyed to prevent incorrect installation. Only install a USB-
TO-GPIO adaptor in either J19 or J25 at the same time.
Connect the load (processor) to either the output headers J4 and J6, J7 and J9 (for currents below 1A),
and J10 and J12 or to the output terminal blocks J17 and J18 (for currents greater than 1A). The leads
should be short and twisted.
Install jumpers, JP1 through JP2 to the desired positions. Jumper JP1 must be across pins 1 and 2 for the
TPS650380 to operate.
Connect at least a 5 A rated input power supply, set to provide between 2.5 V and 5.5 V, between J1 and
J3 (for currents below 1 A) or to the terminal block J16 (for currents greater than 1 A). The leads should
be short and twisted. Turn on the power supply.
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3 Software Setup and Operation
This section provides descriptions of the EVM software and functionality.
The supplied software is used to communicate with the TPS650380EVM-054. Click on the icon on the
host PC to start the software. The host PC software first checks the firmware version of the USB-TO-GPIO
adapter. If an incorrect firmware version is installed, the software automatically searches on the Internet (if
connected) for updates. If a new update is available, the software notifies the user of the update,
downloads and installs the software. Note that after the firmware is updated, the user must disconnect and
then reconnect the USB cable between the adapter and PC, as instructed during the install process. The
host PC software also automatically searches on the Internet (if connected) for updates to the EVM
software. If a new update is available, the software notifies the user of the update, downloads and installs
the update.
VIN and VDD must be supplied for the software to detect the TPS650380 and run.
The software reads the registers on the TPS650380 and automatically determines which version of the IC
is installed. Even if the IC is disabled via the EN pin (JP1), the user can still communicate with the
TPS650380 if VIN and VDD are supplied.
The software displays the main panel for the user interface, shown in Figure 1.
Figure 1. TPS650380 Software Main Panel
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It is recommended that the user press the 'READ' button at the top of the screen immediately after loading
the software to confirm that the software and cable connections are working properly. The message box at
the top right of the main panel (I2C Activity) displays all I2C activity. The message box at the bottom (USB
Bridge Connected) displays whether or not the USB-TO-GPIO connection is functional.
The software itself performs no calculations or computations and simply reads and writes to and from the
IC's registers through the I2C interface. Each register's bits can either be changed manually by changing
the boxes corresponding to each bit in the panel's top right half, or they can be changed through the drop-
down boxes and buttons in the rest of the panel. Some bits are reserved and not writeable. These will not
allow you to click on them to change their setting. For example, the CHIP_ID register (0x0Ah) is read only
and the TPS650380's main panel does not allow writes to those bits. The I2C bus speed is fixed at 100
kbps and this is noted at the bottom of the screen.
Following any change to an individual bit, drop-down box, or button, the user must write the new values to
the registers by either clicking the 'W' button to the left of each affected register or by clicking the 'WRITE'
button at the top of the screen.
In order to reduce the amount of manual reading and writing required, the two drop-downs at the top left of
the screen have been provided to do this automatically. The 'Auto Read' drop down allows the option of
automatically reading all the registers at specific time intervals. The 'Write On Changes' drop-down allows
the option of automatically writing a change to the registers as soon as it is made in the software.
The TPS650380 data sheet is available via the 'Help' menu (Internet access is required). The data sheet
discusses the functionality of the various register bits, which is also briefly repeated here.
The left side of the software main panel is divided into three parts--one for each output voltage. In each of
these sections, the output voltage, ramp rate, and sequencing timer time can be changed. In addition,
there are settings for enabling each output, enabling each output voltage's active output capacitor
discharge circuit on shutdown, changing the mode status of each output voltage (Forced PWM mode or
Power Save Mode), as well as an option to disable the nPG_x bit for each output voltage individually.
These settings correspond to all of registers 0x00h through 0x04h and 0x07h through 0x09h, as well as
portions of registers 0x05h and 0x06h.
In the bottom left corner of the software main panel are various common controls, including enabling the
over-current protection, forcing PWM mode on a ramp down of the output voltage, and resetting bits in the
exceptions register that correspond to various faults. These functions correspond to the remaining bits in
registers 0x05h and 0x06h.
The bottom right corner of the software main panel contains a status output screen. Displayed are the
status of the TPS650380's INT pin (high or low), the status of the exceptions register (0x06h), and the
contents of the CHIP_ID register (0x0Ah) which identifies the IC installed.
Finally, in the upper left corner of the software's main panel is a RESET button which writes a 1 to the
RESET bit of register 0x0Bh.
Circuit Use and Modifications
Besides the required circuitry to operate the TPS650380 (outlined in a white silk screen border on the
PCB), there are additional circuits present on the TPS650380EVM-054 that assist in evaluating the
TPS650380 as a processor power supply solution. Additionally, there are modifications that can be made
to adapt the circuit's performance to the needs of a particular application.
3.1 Load Step Circuit
The TPS650380EVM-054 contains a simple circuit that produces fast load current steps at the output of
the TPS650380. This evaluates the response of the TPS650380 to various load transients that might
occur in the system. An identical circuit is included for each output voltage. To operate the circuit on the
output of DCDC_A, connect a function generator to TP3. The output of the function generator should be a
square wave with a small duty cycle. The output high level controls the gate to source voltage of the
power transistor, Q1, and should be adjusted to generate the desired step current high level. The output
low level sets the step current low level. Good settings to start with are a square wave signal running at
100 Hz and 5% duty cycle going from 0V to 3V. These settings can be adjusted in order to generate the
desired load step.
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Resistor R16 is present to observe the load step current by measuring the voltage across TP1 and TP2.
Oscilloscope settings of 100 mV / div translate to a current in R16 of 1 A / div. R19 and R20 might be
installed if large load current steps at low output voltages are desired.
3.2 Measuring the Control Loop
A bode plot of each output can be easily taken with a small modification to the EVM. To measure the
control loop response of DCDC_A, for example, R1 is replaced with a 10-Ωresistor. Then, the injection
signal is applied and the loop response measured across this resistor. Figure 14 shows the results of this
test.
3.3 Circuit Modifications
Modifications may be made to the circuit. Any modifications will affect the performance of the EVM and
must remain within the limits of the TPS650380 IC, as detailed in the data sheet.
CAUTION
As shipped, the EVM is configured for local sensing of the output voltages. If
remote sensing at the loads is desired, modification of the EVM is required as
described in the Remote Sense Resistors section.
3.3.1 Output Capacitors
There are locations for extra output capacitors to be installed on each output voltage in order to reduce
output ripple or lessen the voltage drop due to a load transient. Some capacitors are located near the
TPS650380 IC, while others can be installed closer to the point of load, which is simulated by the load
step circuit. The total output capacitance on each output must remain below the maximum capacitance
allowed in the data sheet.
3.3.2 Remote Sense Resistors
R1, R2, R3, R4, and R9 come populated with 0-Ωresistors that provide local output voltage sensing. Each
output voltage is regulated at the output connector on the EVM. If it is desired to regulate the output
voltage at the load, these resistors should be removed and wires used to connect the J5, J8, and J10
headers to each load. These wires should be twisted and kept as short as possible to minimize noise
pickup. Use of the EVM without the local sense resistors or remote sense wires installed may damage the
load or EVM.
3.3.3 I2C Pull-up Resistors
R5, R6, R7, and R8 are locations for optional pull-up resistors for the I2C signals. They are required when
not using the USB-TO-GPIO adaptor but are not recommended when using the adaptor. If used, their
typical value is around 2.2 kΩ.
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0.1 10 1000 10k
Load Current - mA
50
Efficiency - %
1
30
40
100
60
90
20
0
10
80
70
100
0.96V
1.2V
1.4V
2.5 3.5 5 5.5
Input Voltage - V
90
Efficiency - %
3 4
86
88
100
92
98
84
80
82
96
94
4.5
DCDC_A
DCDC_B
DCDC_C
www.ti.com Test Results
4 Test Results
This section provides typical performance waveforms for the TPS650380EVM-054. The default register
settings were used unless otherwise noted.
Figure 2. Efficiency vs. Input Voltage
(DCDC_A = DCDC_B = DCDC_C = 0.96 V, IOUTA = 3.4 A, IOUTB = 1.85 A, IOUTC = 0.9 A)
Figure 3. Efficiency of DCDC_A vs. Output Current (VIN = 3.6 V)
11
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0.1 10 1000 10k
Load Current - mA
50
Efficiency - %
1
30
40
100
60
90
20
0
10
80
70
100
0.96V
1.2V
1.4V
0.1 10 1000 10k
Load Current - mA
50
Efficiency - %
1
30
40
100
60
90
20
0
10
80
70
100
0.96V
1.2V
1.4V
Test Results www.ti.com
Figure 4. Efficiency of DCDC_B vs. Output Current (VIN = 3.6 V)
Figure 5. Efficiency of DCDC_C vs. Output Current (VIN = 3.6 V)
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2.5 3.5 5 5.5
Input Voltage - V
-0.15
-0.1
0
0.05
0.1
0.15
-0.05
Line Regulation - %
DCDC_A
DCDC_B
DCDC_C
3 4.5
4
0.1 10 1000 10k
Load Current - mA
-1.5
-1
0
0.5
1
1.5
-0.5
Load Regulation - %
1 100
DCDC_A
DCDC_B
DCDC_C
www.ti.com Test Results
Figure 6. Load Regulation (VIN = 3.6 V, DCDC_A = DCDC_B = DCDC_C = 0.96 V)
Figure 7. Line Regulation
(DCDC_A = DCDC_B = DCDC_C = 0.96 V, IOUTA = 3.4 A, IOUTB = 1.85 A, IOUTC = 0.9 A)
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t - Time - 10 msec/div
200 mV/div
EN
DCDC_B
2 V/div
DCDC_C
DCDC_A
t - Time - 500 sec/divm
200 mV/div
EN
DCDC_B
2 V/div
DCDC_C
DCDC_A
Test Results www.ti.com
Figure 8. Start-up (VIN = 3.6 V, DCDC_A = DCDC_B = DCDC_C = 0.96 V, IOUTA = IOUTB = IOUTC = 0 A)
Figure 9. Shutdown (VIN = 3.6 V, DCDC_A = DCDC_B = DCDC_C = 0.96 V, IOUTA = IOUTB = IOUTC = 0 A,
Active Output Capacitor Discharge Enabled)
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t - Time - 100 nsec/div
1 V/div
DCDC_A (AC Coupled)
LX_A2
20 mV/div
LX_A3
LX_A1
t - Time - 500 sec/divm
200 mV/div
EN
DCDC_B
2 V/div
DCDC_C
DCDC_A
www.ti.com Test Results
Figure 10. Shutdown (VIN = 3.6 V, DCDC_A = DCDC_B = DCDC_C = 0.96 V, IOUTA = IOUTB = IOUTC = 0 A,
Active Output Capacitor Discharge Enabled)
Figure 11. Output Voltage Ripple Measured Across C6
(VIN = 3.6 V, DCDC_A = 0.96 V, DCDC_B = DCDC_C = disabled, IOUTA = 5 A)
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t - Time - 5 sec/divm
1 A/div
I (3A to 5A Load Steps)
OUTA
50 mV/div
DCDC_A (AC Coupled)
t - Time - 100 nsec/div
1 V/div
Vin (AC Coupled)
LX_A2
20 mV/div
LX_A3
LX_A1
Test Results www.ti.com
Figure 12. Input Voltage Ripple Measured Across C13
(VIN = 3.6 V, DCDC_A = 0.96 V, DCDC_B = DCDC_C = Disabled, IOUTA = 5 A)
Figure 13. Load Transient Response
(VIN = 3.6 V, DCDC_A = 0.96 V, DCDC_B = DCDC_C = Disabled, IOUTA = 3 A to 5 A step)
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-180
-150
-120
-90
-30
0
30
60
120
150
1000 10k 100k 1m
Frequency - Hz
Phase - degree
180
Gain
Phase
-60
90
-60
-50
-40
-30
-10
0
10
20
40
50
60
-20
30
Gain - dB
www.ti.com Test Results
Figure 14. Loop Response (VIN = 3.6 V, DCDC_A = 0.96 V, DCDC_B = DCDC_C = Disabled, IOUTA = 5 A)
Figure 15. Thermal Performance
(VIN = 3.6 V, DCDC_A = DCDC_B = DCDC_C = 0.96 V, IOUTA = 3.4 A, IOUTB = 1.85 A, IOUTC = 0.9 A)
17
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Board Layout www.ti.com
5 Board Layout
This section provides the TPS650380EVM-054 board layout and illustrations.
Board layout is critical for all high-frequency, switch-mode power supplies. Figure 16 through Figure 20
show the board layout for the TPS650380EVM-054 PCB. The nodes with high-switching frequencies and
currents are kept as short as possible to minimize trace inductance. Careful attention has been given to
the routing of high-frequency current loops and a single-point grounding scheme is used. Also, the
majority of the heatsinking for this device occurs through the top layer traces and vias pulled from the IC's
solder bumps that carry high currents. See the data sheet for specific layout guidelines.
Figure 16. Assembly Layer
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www.ti.com Board Layout
Figure 17. Top Silk Layer
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Board Layout www.ti.com
Figure 18. Top Layer
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