Texas Instruments bq2427 Series User manual

User's Guide
SLUU924–April 2012
QFN-Packaged bq24270/271
Evaluation Modules
The bq24270/271 evaluation module is a complete charger module for evaluating compact, flexible, and
high-efficiency charge-management solutions for single-cell, Li-ion, and Li-polymer batteries used in a
wide range of portable applications. These charge-management solutions are also switch-mode and USB-
friendly.
Contents
1 Introduction .................................................................................................................. 2
1.1 bq2427x IC Features .............................................................................................. 2
1.2 bq24270/271EVM Features ...................................................................................... 2
1.3 Schematic ........................................................................................................... 3
1.4 I/O Description ...................................................................................................... 4
1.5 Test Points .......................................................................................................... 4
1.6 Control and Key Parameters Setting ............................................................................ 5
1.7 Recommended Operating Conditions ........................................................................... 5
2 Test Summary ............................................................................................................... 6
2.1 Definitions ........................................................................................................... 6
2.2 Recommended Test Equipment ................................................................................. 6
2.3 Recommended Test Equipment Setup .......................................................................... 7
2.4 Recommended Test Procedure ................................................................................ 10
3 Printed-Circuit Board Layout Guideline ................................................................................. 11
4 Bill of Materials and Board Layout ...................................................................................... 13
4.1 Bill of Materials .................................................................................................... 13
4.2 Board Layout ...................................................................................................... 15
List of Figures
1 HPA758A Schematic ....................................................................................................... 3
2 BAT_Load (PR1010) Schematic.......................................................................................... 7
3 Connections of HPA172 Kit................................................................................................ 8
4 Original Test Setup for bq24270/271EVM (HPA758) .................................................................. 9
5 Main Window of bq2427x EVM Evaluation Software................................................................. 10
6 Top Assembly Layer ...................................................................................................... 15
7 Top Layer .................................................................................................................. 16
8 First Internal Layer ........................................................................................................ 17
9 Second Internal Layer .................................................................................................... 18
10 Bottom Layer............................................................................................................... 19
List of Tables
1 Bill of Materials - HPA758................................................................................................ 13
I2C is a trademark of Philips Electronics N.V.
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Introduction www.ti.com
1 Introduction
1.1 bq2427x IC Features
The bq24270/271 integrates a synchronous PWM controller, power MOSFETs, input-current sensing,
high-accuracy current and voltage regulation, charge termination, and power path management into a
QFN package. The charge parameters can be programmed through an I2C interface. Key integrated circuit
(IC) features include:
• High-efficiency, fully integrated, NMOS-NMOS, synchronous buck charger with 1.5-MHz frequency
• Integrated power FETs for up to 1.5-A charge rate
• Power path management between battery and system voltages
For details, see the bq24270/271 data sheet (SLUSB10).
1.2 bq24270/271EVM Features
The bq24270/271EVM evaluation module (EVM) is a complete charger module for evaluating compact,
flexible, high-efficiency, USB-friendly, switch-mode battery charge. The module also evaluates power path
management solutions for single-cell, Li-ion and Li-polymer battery-powered systems used in a wide range
of portable applications. Key EVM features include:
• Input power connector for USB input
• Programmable battery voltage, charge current, input current, and status via I2C™ interface
• USB operating range of 4.2 V – 6 V
• LED indication for status signals
• Test points for key signals available for testing purposes. Easy probe hook-up
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www.ti.com Introduction
1.3 Schematic
Figure 1. HPA758A Schematic
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1.4 I/O Description
Header/Terminal Block Description
J1–USB USB positive header
J2–USB USB positive terminal
J2–GND USB negative terminal
J3-GND USB negative header
J4 USB miniconnector
J5-SYS System output positive header
J6 USB-TO-GPIO box connector
J7-SYS System output positive terminal
J7-GND System output negative terminal
J8-TS External thermistor positive terminal
J8-GND Ground terminal for external thermistor
J9-GND System output negative header
J10-BAT Battery positive header
J11-BAT Battery positive terminal
J11-GND Battery negative terminal
J12-GND Battery negative header
J13-DRV DRV reference voltage positive header
J14-DRV DRV reference voltage positive terminal
J14-GND DRV reference voltage negative terminal
J15-GND DRV reference voltage negative header
1.5 Test Points
Test Point Description
TP1 AGND
TP2 Kelvin to USB
TP3 SW
TP4 Kelvin to SYS
TP5 PGND
TP6 AGND
TP7 PSEL
TP8 Kelvin to BAT
TP9 SDA
TP10 SCL
TP11 AGND
TP12 STAT
TP13 TS
TP14 CD
TP15 INT
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1.6 Control and Key Parameters Setting
Jumper Description Default Factory Setting
JP1 1-2 (FET GATE = SYS): External PFET's gate tied to SYS and therefore disabled. 2-3 (FET GATE = BGATE)
2-3 (FET GATE = BGATE): External PFET's gate tied to BGATE pin and therefore
controlled by IC.
JP2 1-2 (CD = HI): Charge disable high to disable charge and enter Hi-Z mode 2-3 (CD = LO)
2-3 (CD = LO): Charge disable low for normal operation
JP3 bq24271 only 1-2 (PSEL = HI)
1-2 (PSEL = HI): Indicates that a USB source is connected to the USB input and sets
the input current limit to 500 mA.
2-3 (PSEL = LO): Indicates that an ac adapter is connected to the USB input and sets
the USB input current limit to 1.5 A.
JP6 1-2 (TS = DIS): Connects TS high to DRV and disables the temperature sense 2-3 (TS = SIM)
functioning the IC
2 (JP6 Open): Connects the TS pin to an external thermistor. The resistor divider
formed by R1 and R3 has been sized to accommodate a 10-kΩthermistor. If a different
thermistor is used, R1 and R3 must be resized.
2-3 (TS = SIM): Connects a potentiometer to the TS so that the potentiometer can
emulate a thermistor. The potentiometer has been preset to approximately 3.4 kΩso
that the TS voltage is 0.5 x V (DRV).
JP7 bq24270 only Shorted
Shorting jumper for USB data lines DM (D-) and DP (D+). When shorted, USB input
current limit defaults to 1.5 A. Otherwise, USB100 mode is selected.
1.7 Recommended Operating Conditions
Min Typ Max Unit
USB voltage, VUSB Input voltage from USB or equivalent supply 4.2 6 V
Battery voltage, VBAT Voltage applied at VBAT terminal of J8 0 3-4.2 4.44 V
Supply current, IUSB(MAX) Maximum input current from USB or equivalent supply 0.1 1.5 A
Maximum fast charge Battery charge current 0.550 1.5 A
current, Ichrg
Operating junction temperature range, TJ0 125 °C
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Test Summary www.ti.com
2 Test Summary
This procedure describes one test configuration of the HPA758 evaluation board for bench evaluation.
2.1 Definitions
This procedure details how to configure the HPA758 evaluation board. The following naming conventions
are followed. See the bq24270/271 QFN EVM schematic for details.
VXXX : External voltage supply name (VADP, VAT, VSAT)
LOADW: External load name (LOADR, LOADI)
V(TPyyy): Voltage at internal test point TPyyy. For example, V(TP12) means the voltage at
TP12.
V(Jxx): Voltage at header Jxx
V(TP(XXX)): Voltage at test point XXX. For example, V(ACDET) means the voltage at the test
point which is marked as ACDET.
V(XXX, YYY): Voltage across point XXX and YYY
I(JXX(YYY)): Current going out from the YYY terminal of header XX
Jxx(BBB): Terminal or pin BBB of header xx
JPx ON : Internal jumper Jxx terminals are shorted.
JPx OFF: Internal jumper Jxx terminals are open.
JPx (-YY-) ON: Internal jumper Jxx adjacent terminals marked as YY are shorted
Measure: →A,B Check specified parameters A, B. If measured values are not within specified limits,
the unit under test has failed.
Observe →A,B Observe if A, B occur. If they do not occur, the unit under test has failed.
Assembly drawings have location for jumpers, test points, and individual components.
2.2 Recommended Test Equipment
2.2.1 Power Supplies
Power Supply #1 (PS#1) capable of supplying 6 V at 3 A is required.
If not using a battery as the load, then power supply #2 (PS#2) is can be used. 4 A is required to power
the circuit shown in Figure 2.
2.2.2 Load #1 Between BAT and GND
Testing with an actual battery as the load is the best way to verify operation in the system. If a batttery is
not available, then a circuit similar to the one shown in Figure 2 can simulate a battery when connected to
a power supply.
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Figure 2. BAT_Load (PR1010) Schematic
2.2.3 Load #2 Between SYS and GND
Although not required, a resistive load in the form of a decade box or electronic load capable of sinking up
to 3 A can be used.
2.2.4 Meters
There are four equivalent voltage meters (VM#) and two equivalent current meters (CM#). The current
meters must be configured to measure 4-A current.
2.2.5 Computer
A computer with at least one USB port and a USB cable is required. The bq2427x evaluation software
must be properly installed.
2.2.6 HPA172 Communication Kit (USB to GPIO)
A HPA172 USB-to-I2C communication kit.
2.2.7 Software
Download the BQ2427xSW.zip file from the charger's product folder, unzip the file, and double-click on the
SETUP.EXE file. Follow the installation steps.
Because the watchdog timer is enabled, it is recommended that you set the software's Reset Watchdog
Timer to reset every 5 seconds. Otherwise, after 30 seconds of operation, the integrated circuit (IC) enters
Default mode. Note that the 27-minute safety timer is not reset by this function and eventually times out if
charging does not complete, unless the Safety Timer Time Limit is expanded or disabled via the GUI.
One way to reset the safety timer is to allow the 30-second watchdog timer to expire. See Figure 3 in the
data sheet for more information about the timers.
Also, it is generally helpful to set the AutoRead and Write On Change functions, in the upper left of the
GUI window, to ON. The AutoRead function periodically updates the GUI with the IC status. The Write On
Change function writes any changes to the GUI check boxes, drop-down boxes, and registers to the IC.
Otherwise, the user is responsible for periodically pressing the READ button to find the IC instantaneous
status and WRITE button to write changes to the IC.
2.3 Recommended Test Equipment Setup
1. For all power connections, use short, twisted-pair wires of appropriate gauge wire for the maximum
current amount.
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To
Computer
USB port
USB Interface
Adapter
I/O
USB
Texas Instruments
© 2006
10-pin
Ribbon
Cable
To EVM
Test Summary www.ti.com
2. Set Power Supply #1 (PS#1) for 6-V ± 100 mVdc, 3-A ± 100-mA current limit, and then turn off supply.
3. If BAT_Load is the circuit shown in Figure 2, connect Power Supply #2 (PS#2) set to approximately 3.1
V to the input side of BAT_Load, and then turn off PS#2.
4. Connect the output side (or battery terminals) of BAT_Load in series with current meter (multimeter) #2
(CM#2) to J10 and J12 or J11 (BAT, GND). Ensure that a voltage meter is connected across J10 or
TP8 and J12 or TP5 (BAT, GND).
5. Connect the electronic load or resistor decade box in series with a current meter (multimeter) to J5 and
J9 or J7(SYS, GND). Ensure the electronic load is in current mode and set to 0 A or the resistor
decade box is set to the maximum resistance.
6. Connect VM#3 across J5 or TP4 and J9 (SYS, GND).
7. Connect VM#4 across J13 and J15 (DRV, GND).
8. Connect J6 to HPA172 kit by the 10-pin ribbon cable . Connect the USB port of the HPA172 kit to the
USB port of the computer. The connections are shown in Figure 3.
Figure 3. Connections of HPA172 Kit
9. Ensure jumpers are at the default factory settings per Section 1.6
10. After the preceding steps have been performed, the test setup for HPA758 is configured as shown in
Figure 4
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Windows
PC
USB-TO-
GPIO
PS#1
A
V
CM#1 IIN
+ -
VM#1
+
-
VM#4
V+
-
AV
VM#2
CM#2
ICHRG -
-+
+
BAT_Load
PS#2
AV
VM#3
CM#3
ISYS -
-+
+
Elec Load/
Res Box
www.ti.com Test Summary
Figure 4. Original Test Setup for bq24270/271EVM (HPA758)
11. Turn on the computer.
• Open the bq2427x evaluation software and click "USB DEVICE" when prompted at start-up. The
main window of the software is shown in Figure 5.
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Figure 5. Main Window of bq2427x EVM Evaluation Software
2.4 Recommended Test Procedure
The following test procedure is useful in evaluating the charger IC outside of a real system, especially
when no battery is available to connect to the output (i.e., Load #1).
2.4.1 System Voltage and Default Charge Settings
1. Ensure that the Section 2.3 steps are followed.
2. Connect the output of PS #1 in series with CM #1 to J2 (USB, GND).
3. Connect voltage meter 1 (VM #1) across J1 or TP2 and J3 (USB, GND).
4. With PS #2 disabled, turn on PS #1.
5. Ensure the electronic load is on current mode and set the current to 1 A or turn down the resistor
decade box until CM #3 measures 1000 ±100 mA.
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www.ti.com Printed-Circuit Board Layout Guideline
6. Measure:
Measure on VM#3 →V(J5(SYS), J9(GND)) = 3.7V ±150 mV.
Observe →D1 and D2 are on.
7. Move JP2 (CD) = HI.
8. Measure on VM#3 →V(J5(SYS), J9(GND)) = 0 V.
9. Disable PS #1 and disconnect electronic load or resistor box and CM #3 from the HPA758 board.
2.4.2 Charge Voltage and Current Regulation of USB
1. Be sure to follow Section 2.3 steps .
2. Connect the USB port of the HPA172 kit to the USB port of the computer.
3. Connect the output of Power Supply #1 (PS #1) in series with current meter (multimeter) #1 (CM #1) to
J1 and J3 or J2 (USB, GND).
4. Connect a voltage meter 1 (VM #1) across J1 or TP2 and J3 (USB, GND).
5. Move JP2 (CD) to HI.
6. Turn on PS #1 and PS #2.
7. Return JP2 (CD) to LO.
8. Software setup:
• Press the READ button to obtain the current settings.
• Set Write On Change to ON if not already set.
• Set Reset Watchdog Timer to update every 5 seconds.
• Uncheck Disable Charging if checked.
• Check Enable STAT/INT Outputs.
• Set Battery Regulation Voltage to 4.20 V.
• Set USB Input Current Limit to 1500 mA.
• Set Charge Current to 1000 mA.
• Click the READ button at the top of the window, and confirm that the previous settings remain.
9. Adjust PS #2 so that the voltage measured by VM #2, across BAT and GND, measures 3.2 V ± 50 mV.
10. Adjust the power supply so that VM #1 still reads 6 V ± 100 mV if necessary then
Measure on CM#2 →ICHRG = 1000 mA ± 100 mA
Measure on CM#1 →IIN < 850 mA
Observe →D1 and D2 are on.
11. Turn off PS #1 and PS #2.
2.4.3 Helpful hints
1. Observe the taper current as the battery voltage approaches the set regulation voltage, allow the
battery to charge or, if using BAT_Load (PR1010), slowly increase the PS #2 voltage powering
BAT_Load (PR1010). Use VM #2 across BAT and GND to measure the battery voltage seen by the IC.
2. Observe the VINDPM function, lower the current limit on PS #1.
3. Observe battery supplement mode, apply a resistive load across SYS and GND that is higher than the
maximum charge current.
3 Printed-Circuit Board Layout Guideline
1. To obtain optimal performance, the power input capacitors, connected from the PMID input to PGND,
must be placed as close as possible to the bq2427x.
2. Place a 4.7-µF input capacitor as close to PMID pin and PGND pin as possible to make the high-
frequency, current-loop area as small as possible. Place 1-µF input capacitor GNDs as close to the
respective PMID capacitor GND and PGND pins as possible to minimize the ground difference
between the input and PMID.
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Printed-Circuit Board Layout Guideline www.ti.com
3. The local bypass capacitor from SYS to GND must be connected between the SYS pin and PGND of
the IC. The intent is to minimize the current path loop area from the SW pin through the LC filter and
back to the PGND pin.
4. Place all decoupling capacitors close to their respective IC pins and as close as possible to PGND (do
not place components in such a way that routing interrupts power stage currents). All small control
signals must be routed away from the high-current paths.
5. The printed-circuit board must have a ground plane (return) connected directly to the return of all
components through vias (two vias per capacitor for power-stage capacitors, one via per capacitor for
small-signal components). It is also recommended to put vias inside the PGND pads for the IC, if
possible. A star ground design approach is typically used to keep circuit block currents isolated (high-
power/low-power small-signal) which reduces noise-coupling and ground-bounce issues. A single
ground plane for this design gives good results. This small layout and a single ground plane eliminates
ground-bounce issues, and having the components segregated minimizes coupling between signals.
6. The high-current charge paths into USB, BAT, SYS, and from the SW pins must be sized appropriately
for the maximum charge current in order to avoid voltage drops in these traces. The PGND pins must
be connected to the ground plane to return current through the internal low-side FET.
7. For high-current applications, the balls for the power paths must be connected to as much copper in
the board as possible. This allows better thermal performance because the board conducts heat away
from the IC.
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4 Bill of Materials and Board Layout
4.1 Bill of Materials
Table 1. Bill of Materials - HPA758
COUNT RefDes Value Description Size Part Number MFR
-001 -002
0 0 C1 Open Capacitor, Ceramic, 25V, X5R, 10% '0805 Std Std
2 2 C2,C6 1uF Capacitor, Ceramic, 6.3V, X5R, 20% '0402 Std Std
1 1 C3 0.1uF Capacitor, Ceramic, 25V, X7R, 10% '0603 Std Std
1 1 C4 10uF Capacitor, Ceramic, 6.3V, X5R, 20% '0603 Std Std
2 2 C5, C10 47uF Capacitor, Ceramic, 6.3V, X5R, 20% '0805 Std Std
1 1 C7 1µF Capacitor, Ceramic, 25V, X5R, 10% '0603 Std Std
1 1 C8 4.7uF Capacitor, Ceramic, 25V, X5R, 10% '0805 Std Std
1 1 C9 0.01uF Capacitor, Ceramic, 10V, X5R, 10% '0603 Std Std
2 2 D1, D2 Green Diode, LED, Green, 2.1-V, 20-mA, 6-mcd '0603 LTST-C190GKT Liteon
0 1 BAT54C Open Diode, Dual Schottky, 200-mA, 30-V SOT23 BAT54C Fairchild
8 8 J1, J3, J5, J9, J10, J12, J13, PEC02SAAN Header, Male 2-pin, 100mil spacing 0.100 inch x 2 PEC02SAAN Sullins
J15
5 5 J2, J7, J8, J11, J14 ED555/2DS Terminal Block, 2-pin, 6-A, 3.5mm 0.27 x 0.25 ED555/2DS OST
1 1 J4 UX60-MB-5ST Connector, Recpt, USB-B, Mini, 5-pins, SMT 0.354 X 0.303 Inches UX60-MB-5ST Hiroise
1 1 J6 N2510-6002-RB Connector, Male Straight 2x5 pin, 100mil spacing, 4 0.338 x 0.788 inch N2510-6002-RB 3M
Wall
3 3 JP1, JP2, JP6 PEC03SAAN Header, Male 3-pin, 100mil spacing, 0.100 inch x 3 PEC03SAAN Sullins
0 1 JP3 PEC03SAAN Header, Male 3-pin, 100mil spacing, 0.100 inch x 3 Sullins
1 0 JP7 PEC03SAAN Header, Male 2-pin, 100mil spacing, 0.100 inch x 2 PEC02SAAN Sullins
1 1 L1 1.5µH Inductor, SMT, 3.5A, 70 milliohm 4.1x4.4 mm SPM4012T-1R5M TDK Alternate: Toko
Alternate: FDSD0415-
H-1R5M
1 1 Q1 CSD25401Q3 MOSFET, PChan, -20V, 60A, 8.7 milliOhm QFN3.3X3.3mm CSD25401Q3 TI
2 2 R1,R2 200 Resistor, Chip, 1/16W, 1% 0603 Std Std
0 0 R3 Open Resistor, Chip, 1/16W, 1% 0603 Std Std
1 1 R4 1870 Resistor, Chip, 1/16W, 1% 0603 Std Std
1 1 R5 4120 Resistor, Chip, 1/16W, 1% 0603 Std Std
1 1 R6 0 Resistor, Chip, 1/16W, 1% 0402 Std Std
2 2 R7, R8 1.50K Resistor, Chip, 1/16W, 1% 0603 Std Std
1 1 R9 50K Potentiometer, 3/8 Cermet, Single-Turn 0.25x0.17 inch 3266W-1-503LF Bourns
0 1 R10 0 Resistor, Chip, 1/16W, 1% 0603 Std Std
7 7 TP1, TP2, TP3, TP4, TP8, 5000 Test Point, Red, Thru Hole Color Keyed 0.100 x 0.100 inch 5000 Keystone
TP12, TP15
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Table 1. Bill of Materials - HPA758 (continued)
COUNT RefDes Value Description Size Part Number MFR
-001 -002
2 2 TP5, TP6 5001 Test Point, Black, Thru Hole Color Keyed 0.100 x 0.100 inch 5001 Keystone
0 1 TP7 5000 Test Point, Red, Thru Hole Color Keyed 0.100 x 0.100 inch 5000 Keystone
5 4 TP9, TP10, TP13, TP14 5002 Test Point, White, Thru Hole Color Keyed 0.100 x 0.100 inch 5002 Keystone
1 0 U1 BQ24270RGE IC, 1.5A, Single-Input, Single Cell Switchmode Li-Ion QFN-24 BQ24271RGE TI
BATTERY CHARGER with Power Path Management
and I2C Interface
0 1 U1 BQ24271RGE IC, 1.5A, Single-Input, Single Cell Switchmode Li-Ion QFN-24 BQ24271RGE TI
BATTERY CHARGER with Power Path Management
and I2C Interface
4 4 --- Shunt, 100-mil, Black 0.100 929950-00 3M
1 1 --- PCB 3.00 in. x 3.00 in. x 0.062 in. HPA758 Any
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4.2 Board Layout
Figure 6. Top Assembly Layer
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Figure 7. Top Layer
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Figure 8. First Internal Layer
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Figure 9. Second Internal Layer
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Figure 10. Bottom Layer
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EVALUATION BOARD/KIT/MODULE (EVM) ADDITIONAL TERMS
Texas Instruments (TI) provides the enclosed Evaluation Board/Kit/Module (EVM) under the following conditions:
The user assumes all responsibility and liability for proper and safe handling of the goods. Further, the user indemnifies TI from all claims
arising from the handling or use of the goods.
Should this evaluation board/kit not meet the specifications indicated in the User’s Guide, the board/kit may be returned within 30 days from
the date of delivery for a full refund. THE FOREGOING LIMITED WARRANTY IS THE EXCLUSIVE WARRANTY MADE BY SELLER TO
BUYER AND IS IN LIEU OF ALL OTHER WARRANTIES, EXPRESSED, IMPLIED, OR STATUTORY, INCLUDING ANY WARRANTY OF
MERCHANTABILITY OR FITNESS FOR ANY PARTICULAR PURPOSE. EXCEPT TO THE EXTENT OF THE INDEMNITY SET FORTH
ABOVE, NEITHER PARTY SHALL BE LIABLE TO THE OTHER FOR ANY INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
DAMAGES.
Please read the User's Guide and, specifically, the Warnings and Restrictions notice in the User's Guide prior to handling the product. This
notice contains important safety information about temperatures and voltages. For additional information on TI's environmental and/or safety
programs, please visit www.ti.com/esh or contact TI.
No license is granted under any patent right or other intellectual property right of TI covering or relating to any machine, process, or
combination in which such TI products or services might be or are used. TI currently deals with a variety of customers for products, and
therefore our arrangement with the user is not exclusive. TI assumes no liability for applications assistance, customer product design,
software performance, or infringement of patents or services described herein.
REGULATORY COMPLIANCE INFORMATION
As noted in the EVM User’s Guide and/or EVM itself, this EVM and/or accompanying hardware may or may not be subject to the Federal
Communications Commission (FCC) and Industry Canada (IC) rules.
For EVMs not subject to the above rules, this evaluation board/kit/module is intended for use for ENGINEERING DEVELOPMENT,
DEMONSTRATION OR EVALUATION PURPOSES ONLY and is not considered by TI to be a finished end product fit for general consumer
use. It generates, uses, and can radiate radio frequency energy and has not been tested for compliance with the limits of computing
devices pursuant to part 15 of FCC or ICES-003 rules, which are designed to provide reasonable protection against radio frequency
interference. Operation of the equipment may cause interference with radio communications, in which case the user at his own expense will
be required to take whatever measures may be required to correct this interference.
General Statement for EVMs including a radio
User Power/Frequency Use Obligations: This radio is intended for development/professional use only in legally allocated frequency and
power limits. Any use of radio frequencies and/or power availability of this EVM and its development application(s) must comply with local
laws governing radio spectrum allocation and power limits for this evaluation module. It is the user’s sole responsibility to only operate this
radio in legally acceptable frequency space and within legally mandated power limitations. Any exceptions to this are strictly prohibited and
unauthorized by Texas Instruments unless user has obtained appropriate experimental/development licenses from local regulatory
authorities, which is responsibility of user including its acceptable authorization.
For EVMs annotated as FCC – FEDERAL COMMUNICATIONS COMMISSION Part 15 Compliant
Caution
This device complies with part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) This device may not cause
harmful interference, and (2) this device must accept any interference received, including interference that may cause undesired operation.
Changes or modifications not expressly approved by the party responsible for compliance could void the user's authority to operate the
equipment.
FCC Interference Statement for Class A EVM devices
This equipment has been tested and found to comply with the limits for a Class A digital device, pursuant to part 15 of the FCC Rules.
These limits are designed to provide reasonable protection against harmful interference when the equipment is operated in a commercial
environment. This equipment generates, uses, and can radiate radio frequency energy and, if not installed and used in accordance with the
instruction manual, may cause harmful interference to radio communications. Operation of this equipment in a residential area is likely to
cause harmful interference in which case the user will be required to correct the interference at his own expense.