Texas Instruments ADS869 Series User manual

Multiplexer
Oscillator
CS
SCLK
SDI
SDO
DAISY
REFSEL
RST / PD
REFCAP
REFIO
PGA
1 M:
OVP
1 M:
2nd-Order
LPF ADC
Driver
VB0
AIN_0P
AIN_0GND OVP
PGA
1 M:
OVP
1 M:
2nd-Order
LPF ADC
Driver
VB1
AIN_1P
AIN_1GND OVP
PGA
1 M:
OVP
1 M:
2nd-Order
LPF ADC
Driver
VB2
AIN_2P
AIN_2GND OVP
PGA
1 M:
OVP
1 M:
2nd-Order
LPF ADC
Driver
VB3
AIN_3P
AIN_3GND OVP
PGA
1 M:
OVP
1 M:
2nd-Order
LPF ADC
Driver
VB4
AIN_4P
AIN_4GND OVP
PGA
1 M:
OVP
1 M:
2nd-Order
LPF ADC
Driver
VB5
AIN_5P
AIN_5GND OVP
PGA
1 M:
OVP
1 M:
2nd-Order
LPF ADC
Driver
VB6
AIN_6P
AIN_6GND OVP
PGA
1 M:
OVP
1 M:
2nd-Order
LPF ADC
Driver
VB7
AIN_7P
AIN_7GND OVP
AUX_IN
AUX_GND
18-Bit
SAR ADC
Digital
Logic
and
Interface
4.096-V
Reference
REFGND
DGNDAGND
DVDD
AVDD
Additional Channels in ADS8698
ADS8698
ADS8694
ALARM
Internal ADC Operating as 16-Bit ADC
-0.05
-0.03
-0.01
0.01
0.03
0.05
±40 ±7 26 59 92 125
Gain (%FS)
Free-Air temperature (oC) C027
----- ± 2.5*VREF
----- 1.25*VREF
----- 0.625*VREF
----- + 2.5*VREF
-----+1.25*VREF
Product
Folder
Sample &
Buy
Technical
Documents
Tools &
Software
Support &
Community
Reference
Design
ADS8694 , ADS8698
SBAS686 –JULY 2015
ADS869x 18-Bit, 500-kSPS, 4- and 8-Channel, Single-Supply, SAR ADCs with
Bipolar Input Ranges
1 Features 2 Applications
1• 18-Bit ADCs with Integrated Analog Front-End • Power Automation
• 4-, 8-Channel MUX with Auto and Manual Scan • Protection Relays
• Channel-Independent Programmable Inputs: • PLC Analog Input Modules
– ±10.24 V, ±5.12 V, ±2.56 V 3 Description
– 10.24 V, 5.12 V The ADS8694 and ADS8698 are 4- and 8-channel,
• 5-V Analog Supply: 1.65-V to 5-V I/O Supply integrated data acquisition systems based on a 18-bit
• Constant Resistive Input Impedance: 1 MΩsuccessive approximation (SAR) analog-to-digital
converter (ADC), operating at a throughput of
• Input Overvoltage Protection: Up to ±20 V 500 kSPS. The devices feature integrated analog
• On-Chip, 4.096-V Reference with Low Drift front-end circuitry for each input channel with
• Excellent Performance: overvoltage protection up to ±20 V, a 4- or 8-channel
multiplexer with automatic and manual scanning
– 500-kSPS Aggregate Throughput modes, and an on-chip, 4.096-V reference with low
– DNL: ±0.5 LSB; INL: ±1.5 LSB temperature drift. Operating on a single 5-V analog
– Low Drift for Gain Error and Offset supply, each input channel on the devices can
– SNR: 93.5 dB; THD: –105 dB support true bipolar input ranges of ±10.24 V,
±5.12 V, and ±2.56 V, as well as unipolar input
– Low Power: 65 mW ranges of 0 V to 10.24 V and 0 V to 5.12 V. The gain
• AUX Input →Direct Connection to ADC Inputs of the analog front-end for all input ranges is
• ALARM →High and Low Thresholds per Channel accurately trimmed to ensure a high dc precision. The
input range selection is software-programmable and
• SPI™-Compatible Interface with Daisy-Chain independent for each channel. The devices offer a
• Industrial Temperature Range: –40°C to 125°C 1-MΩconstant resistive input impedance irrespective
• TSSOP-38 Package (9.7 mm × 4.4 mm) of the selected input range.
The ADS8694 and ADS8698 offer a simple SPI-
Block Diagram compatible serial interface to the digital host and also
support daisy-chaining of multiple devices. The digital
supply operates from 1.65 V to 5.25 V, enabling
direct interface to a wide range of host controllers.
Device Information(1)
PART NUMBER PACKAGE BODY SIZE (NOM)
ADS869x TSSOP (38) 9.70 mm × 4.40 mm
(1) For all available packages, see the orderable addendum at
the end of the datasheet.
Gain Error versus Temperature
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.

ADS8694 , ADS8698
SBAS686 –JULY 2015 www.ti.com
Table of Contents
8.4 Device Functional Modes........................................ 34
1 Features.................................................................. 18.5 Register Maps......................................................... 47
2 Applications ........................................................... 19 Application and Implementation ........................ 63
3 Description............................................................. 19.1 Application Information............................................ 63
4 Revision History..................................................... 29.2 Typical Applications ................................................ 63
5 Device Comparison Table..................................... 310 Power-Supply Recommendations..................... 66
6 Pin Configuration and Functions......................... 311 Layout................................................................... 67
7 Specifications......................................................... 511.1 Layout Guidelines ................................................. 67
7.1 Absolute Maximum Ratings ...................................... 511.2 Layout Example .................................................... 68
7.2 ESD Ratings.............................................................. 512 Device and Documentation Support ................. 69
7.3 Recommended Operating Conditions....................... 512.1 Documentation Support ........................................ 69
7.4 Thermal Information.................................................. 512.2 Related Links ........................................................ 69
7.5 Electrical Characteristics........................................... 612.3 Community Resources.......................................... 69
7.6 Timing Requirements: Serial Interface.................... 10 12.4 Trademarks........................................................... 69
7.7 Typical Characteristics............................................ 11 12.5 Electrostatic Discharge Caution............................ 69
8 Detailed Description............................................ 20 12.6 Glossary................................................................ 69
8.1 Overview................................................................. 20 13 Mechanical, Packaging, and Orderable
8.2 Functional Block Diagram....................................... 20 Information........................................................... 70
8.3 Feature Description................................................. 21
4 Revision History
DATE REVISION NOTES
July 2014 * Initial release.
2Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated
Product Folder Links: ADS8694 ADS8698

1
2
3
4
5
6
7
8
30
29
28
27
26
25
24
CS
SCLK
SDO
ALARM
DVDD
DGND
AGND
AGND
SDI
RST/PD
DAISY
REFSEL
REFIO
REFGND
REFCAP
22
21
20
AVDD
AGND
AGND
AIN_5P
AIN_5GND
AIN_4P
AIN_4GND
9AVDD
AUX_IN
AUX_GND
AIN_6P
AIN_6GND
AIN_7P
AIN_7GND
10
11
12
13
14
15
23 AIN_3P
AIN_3GND
AIN_2P
AIN2_GND
AIN_0P
AIN_0GND
AIN_1P
AIN_1GND
16
17
18
19
31
32
33
34
35
36
37
38
AGND
ADS8698
1
2
3
4
5
6
7
8
30
29
28
27
26
25
24
CS
SCLK
SDO
ALARM
DVDD
DGND
AGND
AGND
SDI
RST/PD
DAISY
REFSEL
REFIO
REFGND
REFCAP
22
21
20
AVDD
AGND
AGND
NC
NC
NC
NC
9AVDD
AUX_IN
AUX_GND
NC
NC
NC
NC
10
11
12
13
14
15
23 AIN_3P
AIN_3GND
AIN_2P
AIN2_GND
AIN_0P
AIN_0GND
AIN_1P
AIN_1GND
16
17
18
19
31
32
33
34
35
36
37
38
AGND
ADS8694
ADS8694 , ADS8698
www.ti.com SBAS686 –JULY 2015
5 Device Comparison Table
PRODUCT RESOLUTION (Bits) CHANNELS SAMPLE RATE (kSPS)
ADS8694 18 4, single-ended 500
ADS8698 18 8, single-ended 500
6 Pin Configuration and Functions
DBT Package
38-Pin TSSOP
Top View (Not to Scale)
Pin Functions
PIN
NAME I/O DESCRIPTION
NO. ADS8694 ADS8698
1 SDI Digital input Data input for serial communication.
Active low logic input.
2 RST/PD Digital input Dual functionality to reset or power-down the device.
3 DAISY Digital input Chain the data input during serial communication in daisy-chain mode.
Active low logic input to enable the internal reference.
When low, the internal reference is enabled;
4 REFSEL Digital input REFIO becomes an output that includes the VREF voltage.
When high, the internal reference is disabled;
REFIO becomes an input to apply the external VREF voltage.
5 REFIO Analog input, output Internal reference output and external reference input pin. Decouple with REFGND on pin 6.
Reference GND pin; short to the analog GND plane.
6 REFGND Power supply Decouple with REFIO on pin 5 and REFCAP on pin 7.
7 REFCAP Analog output ADC reference decoupling capacitor pin. Decouple with REFGND on pin 6.
8 AGND Power supply Analog ground pin. Decouple with AVDD on pin 9.
9 AVDD Power supply Analog supply pin. Decouple with AGND on pin 8.
10 AUX_IN Analog input Auxiliary input channel: positive input. Decouple with AUX_GND on pin 11.
11 AUX_GND Analog input Auxiliary input channel: negative input. Decouple with AUX_IN on pin 10.
Copyright © 2015, Texas Instruments Incorporated Submit Documentation Feedback 3
Product Folder Links: ADS8694 ADS8698

ADS8694 , ADS8698
SBAS686 –JULY 2015 www.ti.com
Pin Functions (continued)
PIN
NAME I/O DESCRIPTION
NO. ADS8694 ADS8698
Analog input channel 6, positive input. Decouple with AIN_6GND on pin 13.
12 NC AIN_6P Analog input No connection for the ADS8694; this pin can be left floating or connected to AGND.
Analog input channel 6, negative input. Decouple with AIN_6P on pin 12.
13 NC AIN_6GND Analog input No connection for the ADS8694; this pin can be left floating or connected to AGND.
Analog input channel 7, positive input. Decouple with AIN_7GND on pin 15.
14 NC AIN_7P Analog input No connection for the ADS8694; this pin can be left floating or connected to AGND.
Analog input channel 7, negative input. Decouple with AIN_7P on pin 14.
15 NC AIN_7GND Analog input No connection for the ; this pin can be left floating or connected to AGND.
16 AIN_0P Analog input Analog input channel 0, positive input. Decouple with AIN_0GND on pin 17.
17 AIN_0GND Analog input Analog input channel 0, negative input. Decouple with AIN_0P on pin 16.
18 AIN_1P Analog input Analog input channel 1, positive input. Decouple with AIN_1GND on pin 19.
19 AIN_1GND Analog input Analog input channel 1, negative input. Decouple with AIN_1P on pin 18.
20 AIN2_GND Analog input Analog input channel 2, negative input. Decouple with AIN_2P on pin 21.
21 AIN_2P Analog input Analog input channel 2, positive input. Decouple with AIN_2GND on pin 20.
22 AIN_3GND Analog input Analog input channel 3, negative input. Decouple with AIN_3P on pin 23.
23 AIN_3P Analog input Analog input channel 3, positive input. Decouple with AIN_3GND on pin 22.
Analog input channel 4, negative input. Decouple with AIN_4P on pin 25.
24 NC AIN_4GND Analog input No connection for the ADS8694; this pin can be left floating or connected to AGND.
Analog input channel 4, positive input. Decouple with AIN_4GND on pin 24.
25 NC AIN_4P Analog input No connection for the ADS8694; this pin can be left floating or connected to AGND.
Analog input channel 5, negative input. Decouple with AIN_5P on pin 27.
26 NC AIN_5GND Analog input No connection for the ADS8694; this pin can be left floating or connected to AGND.
Analog input channel 5, positive input. Decouple with AIN_5GND on pin 26.
27 NC AIN_5P Analog input No connection for the ADS8694; this pin can be left floating or connected to AGND.
28 AGND Power supply Analog ground pin
29 AGND Power supply Analog ground pin
30 AVDD Power supply Analog supply pin. Decouple with AGND on pin 31.
31 AGND Power supply Analog ground pin. Decouple with AVDD on pin 30.
32 AGND Power supply Analog ground pin
33 DGND Power supply Digital ground pin. Decouple with DVDD on pin 34.
34 DVDD Power supply Digital supply pin. Decouple with DGND on pin 33.
35 ALARM Digital output Active high alarm output
36 SDO Digital output Data output for serial communication
37 SCLK Digital input Clock input for serial communication
38 CS Digital input Active low logic input; chip-select signal
4Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated
Product Folder Links: ADS8694 ADS8698

ADS8694 , ADS8698
www.ti.com SBAS686 –JULY 2015
7 Specifications
7.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)
MIN MAX UNIT
AIN_nP, AIN_nGND to GND(2) –20 20 V
AIN_nP, AIN_nGND to GND(3) –11 11 V
AUX_GND to GND –0.3 0.3 V
AUX_IN to GND –0.3 AVDD + 0.3 V
AVDD to GND or DVDD to GND –0.3 7 V
REFCAP to REFGND or REFIO to REFGND –0.3 5.7 V
GND to REFGND –0.3 0.3 V
Digital input pins to GND –0.3 DVDD + 0.3 V
Digital output pins to GND –0.3 DVDD + 0.3 V
Operating temperature, TA–40 125 °C
Storage temperature, Tstg –65 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) AVDD = 5 V or offers a low impedance of < 30 kΩ.
(3) AVDD = floating with an impedance > 30 kΩ.
7.2 ESD Ratings VALUE UNIT
Analog input pins ±4000
(AIN_nP; AIN_nGND)
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)
Electrostatic
V(ESD) V
discharge All other pins ±2000
Charged device model (CDM), per JEDEC specification JESD22-C101(2) ±500
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
7.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted) MIN NOM MAX UNIT
AVDD Analog supply voltage 4.75 5 5.25 V
DVDD Digital supply voltage 1.65 3.3 AVDD V
7.4 Thermal Information ADS8694,
ADS8698
THERMAL METRIC(1) UNIT
DBT (TSSOP)
38 PINS
RθJA Junction-to-ambient thermal resistance 68.8 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 19.9 °C/W
RθJB Junction-to-board thermal resistance 30.4 °C/W
ψJT Junction-to-top characterization parameter 1.3 °C/W
ψJB Junction-to-board characterization parameter 29.8 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance NA °C/W
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
Copyright © 2015, Texas Instruments Incorporated Submit Documentation Feedback 5
Product Folder Links: ADS8694 ADS8698

ADS8694 , ADS8698
SBAS686 –JULY 2015 www.ti.com
7.5 Electrical Characteristics
Minimum and maximum specifications are at TA= –40°C to 125°C. Typical specifications are at TA= 25°C.
AVDD = 5 V, DVDD = 3 V, VREF = 4.096 V (internal), and fSAMPLE = 500 kSPS, unless otherwise noted. TEST
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT LEVEL(1)
ANALOG INPUTS
Input range = ±2.5 × VREF –2.5 × VREF 2.5 × VREF A
Input range = ±1.25 × VREF –1.25 × VREF 1.25 × VREF A
Full-scale input span(2) Input range = ±0.625 × VREF –0.625 × VREF 0.625 × VREF V A
(AIN_nP to AIN_nGND) Input range = 2.5 × VREF 0 2.5 × VREF A
Input range = 1.25 × VREF 0 1.25 × VREF A
Input range = ±2.5 × VREF –2.5 × VREF 2.5 × VREF A
Input range = ±1.25 × VREF –1.25 × VREF 1.25 × VREF A
Operating input range,
AIN_nP Input range = ±0.625 × VREF –0.625 × VREF 0.625 × VREF V A
positive input Input range = 2.5 × VREF 0 2.5 × VREF A
Input range = 1.25 × VREF 0 1.25 × VREF A
Operating input range,
AIN_nGND All input ranges –0.1 0 0.1 V B
negative input
At TA= 25°C,
ziInput impedance 0.85 1 1.15 MΩB
all input ranges
Input impedance drift All input ranges 7 25 ppm/°C B
VIN – 2.25
With voltage at AIN_nP pin = VIN,———— A
input range = ±2.5 × VREF RIN
VIN – 2.00
With voltage at AIN_nP pin = VIN,———— A
input range = ±1.25 × VREF RIN
VIN – 1.60
With voltage at AIN_nP pin = VIN,
IIkg(in) Input leakage current ———— µA A
input range = ±0.625 × VREF RIN
VIN – 2.50
With voltage at AIN_nP pin = VIN,———— A
input range = 2.5 × VREF RIN
VIN – 2.50
With voltage at AIN_nP pin = VIN,———— A
input range = 1.25 × VREF RIN
INPUT OVERVOLTAGE PROTECTION
AVDD = 5 V or offers low –20 20 B
impedance < 30 kΩ, all input ranges
VOVP Overvoltage protection voltage V
AVDD = floating with impedance –11 11 B
> 30 kΩ, all input ranges
(1) Test Levels: (A) Tested at final test. Over temperature limits are set by characterization and simulation. (B) Limits set by characterization
and simulation, across temperature range. (C) Typical value only for information, provided by design simulation.
(2) Ideal input span, does not include gain or offset error.
6Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated
Product Folder Links: ADS8694 ADS8698

ADS8694 , ADS8698
www.ti.com SBAS686 –JULY 2015
Electrical Characteristics (continued)
Minimum and maximum specifications are at TA= –40°C to 125°C. Typical specifications are at TA= 25°C.
AVDD = 5 V, DVDD = 3 V, VREF = 4.096 V (internal), and fSAMPLE = 500 kSPS, unless otherwise noted. TEST
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT LEVEL(1)
SYSTEM PERFORMANCE
Resolution 18 Bits A
NMC No missing codes 18 Bits A
DNL Differential nonlinearity –0.99 ±0.5 2 LSB(3) A
INL Integral nonlinearity(4) –5 ±1.5 5 LSB A
EGGain error At TA= 25°C, all input ranges ±0.02 ±0.05 %FSR(5) A
Gain error matching At TA= 25°C, all input ranges ±0.02 ±0.05 %FSR A
(channel-to-channel)
Gain error temperature drift All input ranges 1 4 ppm/°C B
At TA= 25°C, ±0.5 ±1 A
input range = ±2.5 × VREF(6)
At TA= 25°C, ±0.5 ±1 A
input range = ±1.25 × VREF
At TA= 25°C,
EOOffset error ±0.5 ±1.5 mV A
input range = ±0.625 × VREF
At TA= 25°C, ±0.5 ±2 A
input range = 0 to 2.5 × VREF
At TA= 25°C, ±0.5 ±2 A
input range = 0 to 1.25 × VREF
At TA= 25°C, ±0.5 ±1 A
input range = ±2.5 × VREF(6)
At TA= 25°C, ±0.5 ±1 A
input range = ±1.25 × VREF
Offset error matching At TA= 25°C, ±0.5 ±1.5 mV A
(channel-to-channel) input range = ±0.625 × VREF
At TA= 25°C, ±0.5 ±2 A
input range = 0 to 2.5 × VREF
At TA= 25°C, ±0.5 ±2 A
input range = 0 to 1.25 × VREF
Offset error temperature drift All input ranges 1 3 ppm/°C B
SAMPLING DYNAMICS
tCONV Conversion time 825 ns A
tACQ Acquisition time 1175 ns A
Maximum throughput rate
fS500 kSPS A
without latency
(3) LSB = least significant bit.
(4) This parameter is the endpoint INL, not best-fit INL.
(5) FSR = full-scale range.
(6) Does not include the shift in offset over time.
Copyright © 2015, Texas Instruments Incorporated Submit Documentation Feedback 7
Product Folder Links: ADS8694 ADS8698

ADS8694 , ADS8698
SBAS686 –JULY 2015 www.ti.com
Electrical Characteristics (continued)
Minimum and maximum specifications are at TA= –40°C to 125°C. Typical specifications are at TA= 25°C.
AVDD = 5 V, DVDD = 3 V, VREF = 4.096 V (internal), and fSAMPLE = 500 kSPS, unless otherwise noted. TEST
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT LEVEL(1)
DYNAMIC CHARACTERISTICS
Input range = ±2.5 × VREF 91 93.5 A
Input range = ±1.25 × VREF 90 92.5 A
Signal-to-noise ratio
SNR Input range = ±0.625 × VREF 88 90.5 dB A
(VIN – 0.5 dBFS at 1 kHz) Input range = 2.5 × VREF 89.5 92 A
Input range = 1.25 × VREF 88 90.5 A
Total harmonic distortion(7)
THD All input ranges –105 dB B
(VIN – 0.5 dBFS at 1 kHz)
Input range = ±2.5 × VREF 90 93.5 A
Input range = ±1.25 × VREF 89 92.3 A
Signal-to-noise ratio
SINAD Input range = ±0.625 × VREF 87.5 90.5 dB A
(VIN – 0.5 dBFS at 1 kHz) Input range = 2.5 × VREF 88.5 91.8 A
Input range = 1.25 × VREF 87.5 90.2 A
Spurious-free dynamic range
SFDR All input ranges 106 dB B
(VIN – 0.5 dBFS at 1 kHz)
Aggressor channel input overdriven
Crosstalk isolation(8) 110 dB B
to 2 × maximum input voltage
Aggressor channel input overdriven
Crosstalk memory(9) 90 dB B
to 2 × maximum input voltage
BW(–3 dB) Small-signal bandwidth, –3 dB At TA= 25°C, all input ranges 15 kHz B
BW(–0.1 dB) Small-signal bandwidth, –0.1 dB At TA= 25°C, all input ranges 2.5 kHz B
AUXILIARY CHANNEL
Resolution 16 Bits A
V(AUX_IN) AUX_IN voltage range (AUX_IN – AUX_GND) 0 VREF V A
AUX_IN 0 VREF V A
Operating input range AUX_GND 0 V A
During sampling 75 pF C
CiInput capacitance During conversion 5 pF C
IIkg(in) Input leakage current 100 nA A
DNL Differential nonlinearity –0.99 ±0.6 1.5 LSB A
INL Integral nonlinearity –4 ±1.5 4 LSB A
EG(AUX) Gain error At TA= 25°C ±0.02 ±0.2 %FSR A
EO(AUX) Offset error At TA= 25°C –5 5 mV A
SNR Signal-to-noise ratio V(AUX_IN) = –0.5 dBFS at 1 kHz 87 89 dB A
THD Total harmonic distortion(7) V(AUX_IN) = –0.5 dBFS at 1 kHz –102 dB B
SINAD Signal-to-noise + distortion V(AUX_IN) = –0.5 dBFS at 1 kHz 86 88.5 dB A
SFDR Spurious-free dynamic range V(AUX_IN) = –0.5 dBFS at 1 kHz 103 dB B
(7) Calculated on the first nine harmonics of the input frequency.
(8) Isolation crosstalk is measured by applying a full-scale sinusoidal signal up to 10 kHz to a channel, not selected in the multiplexing
sequence, and measuring its effect on the output of any selected channel.
(9) Memory crosstalk is measured by applying a full-scale sinusoidal signal up to 10 kHz to a channel that is selected in the multiplexing
sequence, and measuring its effect on the output of the next selected channel for all combinations of input channels.
8Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated
Product Folder Links: ADS8694 ADS8698

ADS8694 , ADS8698
www.ti.com SBAS686 –JULY 2015
Electrical Characteristics (continued)
Minimum and maximum specifications are at TA= –40°C to 125°C. Typical specifications are at TA= 25°C.
AVDD = 5 V, DVDD = 3 V, VREF = 4.096 V (internal), and fSAMPLE = 500 kSPS, unless otherwise noted. TEST
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT LEVEL(1)
INTERNAL REFERENCE OUTPUT
Voltage on REFIO pin
V(REFIO_INT)(10) At TA= 25°C 4.095 4.096 4.097 V A
(configured as output)
Internal reference temperature 6 10 ppm/°C B
drift
C(OUT_REFIO) Decoupling capacitor on REFIO 10 22 µF B
Reference voltage to ADC
V(REFCAP) At TA= 25°C 4.095 4.096 4.097 V A
(on REFCAP pin)
Reference buffer output 0.5 1 ΩB
impedance
Reference buffer temperature 0.6 1.5 ppm/°C B
drift
Decoupling capacitor on
C(OUT_REFCAP) 10 22 μF B
REFCAP
C(OUT_REFCAP) = 22 µF,
Turn-on time 15 ms B
C(OUT_REFIO) = 22 µF
EXTERNAL REFERENCE INPUT
External reference voltage on
VREFIO_EXT 4.046 4.096 4.146 V C
REFIO (configured as input)
POWER-SUPPLY REQUIREMENTS
AVDD Analog power-supply voltage Analog supply 4.75 5 5.25 V B
Digital supply range 1.65 3.3 AVDD B
DVDD Digital power-supply voltage V
Digital supply range for specified 2.7 3.3 5.25 B
performance
For the ADS8698; AVDD = 5 V, fS=13 16 A
maximum and internal reference
Dynamic,
IAVDD_DYN mA
AVDD For the ADS8694; AVDD = 5 V, fS=8.5 11.5 A
maximum and internal reference
For the ADS8698; AVDD = 5 V,
device not converting and internal 10 12 A
reference
IAVDD_STC Analog supply current Static mA
For the ADS8694; AVDD = 5 V,
device not converting and internal 5.5 8.5 A
reference
At AVDD = 5 V, device in STDBY
ISTDBY Standby 3 4.5 mA A
mode and internal reference
Power-
IPWR_DN At AVDD = 5 V, device in PWR_DN 3 20 μA B
down
IDVDD_DYN Digital supply current At DVDD = 3.3 V, output = 0000h 0.5 mA A
DIGITAL INPUTS (CMOS)
VIH 0.7 × DVDD DVDD + 0.3 A
Digital input logic levels V
DVDD > 2.1 V
VIL –0.3 0.3 × DVDD A
VIH 0.8 × DVDD DVDD + 0.3 A
Digital input logic levels V
DVDD ≤2.1 V
VIL –0.3 0.2 × DVDD A
Input leakage current 100 nA A
Input pin capacitance 5 pF C
DIGITAL OUTPUTS (CMOS)
VOH IO= 500-μA source 0.8 × DVDD DVDD A
Digital output logic levels V
VOL IO= 500-μA sink 0 0.2 × DVDD A
Floating state leakage current Only for SDO 1 µA A
Internal pin capacitance 5 pF C
TEMPERATURE RANGE
TAOperating free-air temperature –40 125 °C B
(10) Does not include the variation in voltage resulting from solder-shift and long-term effects.
Copyright © 2015, Texas Instruments Incorporated Submit Documentation Feedback 9
Product Folder Links: ADS8694 ADS8698

1 2 14 15 16 17 25 26 27 28 29 30 31 32SCLK
CS
D9
#2 D8 #2 D7 #2 D6
#2 D5 #2 D4
#2
SDO
tSU_CSCK
tDV_CSDO tHT_CKDO tSU_DOCK tDZ_CSDO
Sample
N Sample
N + 1
tACQ
tCONV
tS
Data from sample N
tPH_CS
33 34
D17
#2 D16
#2
18
D3
#2 D2 #2 D1 #2 D0 #2
B15 B14 B2 B1 B0 X X X X X X
SDI XX X X X X
tPH_CK tPL_CK tSCLK
tSU_DICK tHT_CKDI
tD_CKCS
7 8 9
B9 B8 B7B10 B3
D9
#1 D8 #1 D7 #1 D6
#1 D5 #1 D4
#1
DAISY D17
#1 D16
#1 D3
#1 D2 #1 D1 #1 D0 #1
tHT_CKDSY
tSU_DSYCK
ADS8694 , ADS8698
SBAS686 –JULY 2015 www.ti.com
7.6 Timing Requirements: Serial Interface
Minimum and maximum specifications are at TA= –40°C to 125°C. Typical specifications are at TA= 25°C.
AVDD = 5 V, DVDD = 3 V, VREF = 4.096 V (internal), SDO load = 20 pF, and fSAMPLE = 500 kSPS, unless otherwise noted.
MIN TYP MAX UNIT
TIMING SPECIFICATIONS
fSSampling frequency (fCLK = max) 500 kSPS
tSADC cycle time period (fCLK = max) 2 µs
fSCLK Serial clock frequency (fS= max) 18 MHz
tSCLK Serial clock time period (fS= max) 56 ns
tCONV Conversion time 825 ns
tDZ_CSDO Delay time: CS falling to data enable 10 ns
tD_CKCS Delay time: last SCLK falling to CS rising 10 ns
tDZ_CSDO Delay time: CS rising to SDO going to 3-state 10 ns
TIMING REQUIREMENTS
tACQ Acquisition time 1175 ns
tPH_CK Clock high time 0.4 0.6 tSCLK
tPL_CK Clock low time 0.4 0.6 tSCLK
tPH_CS CS high time 30 ns
tSU_CSCK Setup time: CS falling to SCLK falling 30 ns
tHT_CKDO Hold time: SCLK falling to (previous) data valid on SDO 10 ns
tSU_DOCK Setup time: SDO data valid to SCLK falling 25 ns
tSU_DICK Setup time: SDI data valid to SCLK falling 5 ns
tHT_CKDI Hold time: SCLK falling to (previous) data valid on SDI 5 ns
tSU_DSYCK Setup time: DAISY data valid to SCLK falling 5 ns
tHT_CKDSY Hold time: SCLK falling to (previous) data valid on DAISY 5 ns
Figure 1. Serial Interface Timing Diagram
10 Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated
Product Folder Links: ADS8694 ADS8698

0
5000
10000
15000
20000
25000
30000
131062 131065 131068 131071 131074 131077 131080
Number of Hits
Output Codes C007
0
6000
12000
18000
24000
131061 131065 131069 131073 131077 131081
Number of Hits
Output Codes C008
±70
0
70
140
210
280
350
±40 ±7 26 59 92 125
Input Impedance Variation ()
Free-Air Temperature (oC) C005
----- ± 2.5*VREF
----- 1.25*VREF
----- 0.625*VREF
----- + 2.5*VREF
-----+1.25*VREF
0
160
320
480
640
800
0.85 0.88 0.91 0.94 0.97 1 1.03 1.06 1.09 1.12 1.15
Number of Samples
Input Impedance (M) C006
±15
±9
±3
3
9
15
±10 ±6 ±2 2 6 10
Analog Input Current (µA)
Input Voltage (V) C001
----- ± 2.5*V
REF
----- 1.25*VREF
----- 0.625*VREF
----- + 2.5*VREF
-----+1.25*VREF
±15
±9
±3
3
9
15
±10 ±6 ±2 2 6 10
Analog Input Current (µA)
Input Voltage (V) C002
------- 250C
--------400C
--------125
0
C
ADS8694 , ADS8698
www.ti.com SBAS686 –JULY 2015
7.7 Typical Characteristics
At TA= 25°C, AVDD = 5 V, DVDD = 3 V, internal reference VREF = 4.096 V, and fSAMPLE = 500 kSPS, unless otherwise noted.
Input range = ±2.5 × VREF
Figure 3. Input Current vs Temperature
Figure 2. Input I-V Characteristic
Number of samples = 1160
Figure 4. Input Impedance Variation vs Temperature Figure 5. Typical Distribution of Input Impedance
Mean = 131072.3, sigma = 2.02, input = 0 V, Mean = 131072.3, sigma = 2.21, input = 0 V,
range = ±2.5 × VREF range = ±1.25 × VREF
Figure 6. DC Histogram for Mid-Scale Inputs (±2.5 × VREF) Figure 7. DC Histogram for Mid-Scale Inputs (±1.25 × VREF)
Copyright © 2015, Texas Instruments Incorporated Submit Documentation Feedback 11
Product Folder Links: ADS8694 ADS8698

-1
-0.6
-0.2
0.2
0.6
1
1.4
±40 ±7 26 59 92 125
Differential Nonlinearity (LSB)
Free-Air Temperature (oC) C013
Maximum
Minimum
-2
-1
0
1
2
0 65536 131072 196608 262144
Integral Nonlinearity (LSB)
Codes (LSB) C014
0
4000
8000
12000
16000
20000
131058 131063 131068 131073 131078 131083
Number of Hits
Output Codes C011
-1
-0.6
-0.2
0.2
0.6
1
1.4
0 65536 131072 196608 262144
Differential Nonlinearity (LSB)
Codes (LSB) C012
0
6000
12000
18000
24000
131059 131063 131067 131071 131075 131079 131083
Number of Hits
Output Codes C009
0
6000
12000
18000
24000
131060 131064 131068 131072 131076 131080
Number of Hits
Output Codes
C010
ADS8694 , ADS8698
SBAS686 –JULY 2015 www.ti.com
Typical Characteristics (continued)
At TA= 25°C, AVDD = 5 V, DVDD = 3 V, internal reference VREF = 4.096 V, and fSAMPLE = 500 kSPS, unless otherwise noted.
Mean = 131072.3, sigma = 2.76, input = 0 V, Mean = 131072.3, sigma = 2.42, input = 1.25 × VREF,
range = ±0.625 × VREF range = 2.5 × VREF
Figure 8. DC Histogram for Mid-Scale Inputs (±0.625 × VREF) Figure 9. DC Histogram for Mid-Scale Inputs (2.5 × VREF)
All input ranges
Mean = 131072.3, sigma = 2.71, input = 0.625 × VREF,
range = 1.25 × VREF
Figure 11. Typical DNL for All Codes
Figure 10. DC Histogram for Mid-Scale Inputs
(1.25 × VREF)
Range = ±2.5 × VREF
All input ranges
Figure 13. Typical INL for All Codes
Figure 12. DNL vs Temperature
12 Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated
Product Folder Links: ADS8694 ADS8698

±2
±1
0
1
2
±40 ±7 26 59 92 125
Integral Nonlinearity (LSB)
Free-Air Temperature (oC) C019
Maximum
Minimum
±2
±1
0
1
2
±40 ±7 26 59 92 125
Integral Nonlinearity (LSB)
Free-AirTemperature (oC) C020
Maximum
Minimum
-2
-1.5
-1
-0.5
0
0.5
1
1.5
2
0 65536 131072 196608 262144
Integral Nonlinearity (LSB)
Codes (LSB) C017
-2
-1.5
-1
-0.5
0
0.5
1
1.5
2
0 65536 131072 196608 262144
Integral Nonlinearity (LSB)
Codes (LSB)
C018
-2
-1.5
-1
-0.5
0
0.5
1
1.5
2
0 65536 131072 196608 262144
Integral Nonlinearity (LSB)
Codes (LSB)
C015
-2
-1.5
-1
-0.5
0
0.5
1
1.5
2
0 65536 131072 196608 262144
Integral Nonlinearity (LSB)
Codes (LSB) C016
ADS8694 , ADS8698
www.ti.com SBAS686 –JULY 2015
Typical Characteristics (continued)
At TA= 25°C, AVDD = 5 V, DVDD = 3 V, internal reference VREF = 4.096 V, and fSAMPLE = 500 kSPS, unless otherwise noted.
Range = ±1.25 × VREF Range = ±0.625 × VREF
Figure 14. Typical INL for All Codes Figure 15. Typical INL for All Codes
Range = 2.5 × VREF Range = 1.25 × VREF
Figure 16. Typical INL for All Codes Figure 17. Typical INL for All Codes
Range = ±1.25 × VREF
Range = ±2.5 × VREF
Figure 19. INL vs Temperature (±1.25 × VREF)
Figure 18. INL vs Temperature (±2.5 × VREF)
Copyright © 2015, Texas Instruments Incorporated Submit Documentation Feedback 13
Product Folder Links: ADS8694 ADS8698

0
20
40
60
80
0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 2.2 2.4 2.6 2.8 3
Number of Devices
Offset Drift (ppm/oC)
C025
-1
-0.75
-0.5
-0.25
0
0.25
0.5
0.75
1
±40 ±7 26 59 92 125
Offset Error (mV)
Free-Air Temperature (oC) C026
......CH0, .......CH1, ......CH2,
.......CH3, ......CH4, .......CH5,
........CH6, .......CH7
±2
±1
0
1
2
±40 ±7 26 59 92 125
Integral Nonlinearity (LSB)
Free-Air Temperature (oC)
C022
Maximum
Minimum
-1
-0.75
-0.5
-0.25
0
0.25
0.5
0.75
1
±40 ±7 26 59 92 125
Offset Error (mV)
Free-Air Temperature (oC)
C024
----- ± 2.5*VREF
----- 1.25*VREF
----- 0.625*VREF
----- + 2.5*VREF
-----+1.25*VREF
±2
±1
0
1
2
±40 ±7 26 59 92 125
Integral Nonlinearity (LSB)
Free-AirTemperature (oC) C020
Maximum
Minimum
±2
±1
0
1
2
±40 ±7 26 59 92 125
Integral Nonlinearity (LSB)
Free-Air Temperature (oC) C021
Maximum
Minimum
ADS8694 , ADS8698
SBAS686 –JULY 2015 www.ti.com
Typical Characteristics (continued)
At TA= 25°C, AVDD = 5 V, DVDD = 3 V, internal reference VREF = 4.096 V, and fSAMPLE = 500 kSPS, unless otherwise noted.
Range = 2.5 × VREF
Range = ±0.625 × VREF
Figure 21. INL vs Temperature (2.5 × VREF)
Figure 20. INL vs Temperature (±0.625 × VREF)
Range = 1.25 × VREF
Figure 22. INL vs Temperature (1.25 × VREF) Figure 23. Offset Error vs
Temperature Across Input Ranges
Range = ±2.5 × VREF Range = ±2.5 × VREF
Figure 24. Typical Histogram for Offset Drift Figure 25. Offset Error vs Temperature Across Channels
14 Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated
Product Folder Links: ADS8694 ADS8698

±200
±160
±120
±80
±40
0
0 50000 100000 150000 200000 250000
Amplitude (dB)
Input Frequency (Hz)
C031
±200
±160
±120
±80
±40
0
0 50000 100000 150000 200000 250000
Amplitude (dB)
Input Frequency (Hz) C032
-0.5
0
0.5
1
1.5
2
0 4 8 12 16 20
Gain (%FS)
Source Resistance (k) C030
----- ± 2.5*VREF
----- 1.25*VREF
----- 0.625*VREF
----- + 2.5*VREF
-----+1.25*VREF
-0.05
-0.03
-0.01
0.01
0.03
0.05
±40 ±7 26 59 92 125
Gain (%FS)
Free-Air Temperature (oC) C029
......CH0, .......CH1, ......CH2,
.......CH3, ......CH4, .......CH5,
........CH6, .......CH7
0
20
40
60
80
100
0 0.5 1 1.5 2 2.5 3 3.5 4
Number of Units
Gain Drift (ppm/oC)
C028
-0.05
-0.03
-0.01
0.01
0.03
0.05
±40 ±7 26 59 92 125
Gain (%FS)
Free-Air temperature (oC) C027
----- ± 2.5*VREF
----- 1.25*VREF
----- 0.625*VREF
----- + 2.5*VREF
-----+1.25*VREF
ADS8694 , ADS8698
www.ti.com SBAS686 –JULY 2015
Typical Characteristics (continued)
At TA= 25°C, AVDD = 5 V, DVDD = 3 V, internal reference VREF = 4.096 V, and fSAMPLE = 500 kSPS, unless otherwise noted.
Range = ±2.5 × VREF
Figure 26. Gain Error vs Temperature Across Input Ranges Figure 27. Typical Histogram for Gain Error Drift
Range = ±2.5 × VREF
Figure 28. Gain Error vs Temperature Across Channels Figure 29. Gain Error vs External Resistance (REXT)
Number of points = 64k, fIN = 1 kHz, SNR = 93.48 dB, Number of points = 64k, fIN = 1 kHz, SNR = 92.4dB,
SINAD = 93.29 dB, THD = 106 dB, SFDR = 108 dB SINAD = 92.2dB, THD = 107 dB, SFDR = 110 dB
Figure 30. Typical FFT Plot (±2.5 × VREF) Figure 31. Typical FFT Plot (±1.25 × VREF)
Copyright © 2015, Texas Instruments Incorporated Submit Documentation Feedback 15
Product Folder Links: ADS8694 ADS8698

88
90
92
94
96
98
±40 ±7 26 59 92 125
Signal-to-Noise Ratio (dB)
Free-Air Temperature (oC)
C037
----- ± 2.5*VREF
----- 1.25*VREF
----- 0.625*VREF
----- + 2.5*VREF
-----+1.25*VREF
85
86
87
88
89
90
91
92
93
94
100 1000 10000
Signal-to-Noise + Distortion Ratio (dB)
Input Frequency (Hz) C038
----- ± 2.5*VREF
----- 1.25*VREF
----- 0.625*VREF
----- + 2.5*VREF
-----+1.25*VREF
±200
±160
±120
±80
±40
0
0 50000 100000 150000 200000 250000
Amplitude (dB)
Input Frequency (Hz) C035
88.0
89.0
90.0
91.0
92.0
93.0
94.0
100 1000 10000
Signal-to-Noise Ratio (dB)
Input Frequency (Hz) C036
----- ± 2.5*VREF
----- 1.25*VREF
----- 0.625*VREF
----- + 2.5*VREF
-----+1.25*VREF
±200
±160
±120
±80
±40
0
0 50000 100000 150000 200000 250000
Amplitude (dB)
Input Frequency (Hz) C033
±200
±160
±120
±80
±40
0
0 50000 100000 150000 200000 250000
Amplitude (dB)
Input Frequency (Hz) C034
ADS8694 , ADS8698
SBAS686 –JULY 2015 www.ti.com
Typical Characteristics (continued)
At TA= 25°C, AVDD = 5 V, DVDD = 3 V, internal reference VREF = 4.096 V, and fSAMPLE = 500 kSPS, unless otherwise noted.
Number of points = 64k, fIN = 1 kHz, SNR = 90.6dB, Number of points = 64k, fIN = 1 kHz, SNR = 91.83 dB,
SINAD = 90.45dB, THD = –106dB, SFDR = 109 dB SINAD = 91.73 dB, THD = –108 dB, SFDR = 107 dB
Figure 32. Typical FFT Plot (±0.625 × VREF) Figure 33. Typical FFT Plot (2.5 × VREF)
Number of points = 64k, fIN = 1 kHz, SNR = 90.55 dB,
SINAD = 90.3dB, THD = –106 dB, SFDR = 108 dB
Figure 34. Typical FFT Plot (1.25 × VREF)Figure 35. SNR vs Input Frequency
fIN = 1 kHz
Figure 36. SNR vs Temperature Figure 37. SINAD vs Input Frequency
16 Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated
Product Folder Links: ADS8694 ADS8698

±140
±125
±110
±95
±80
50 500 5000 50000 500000 5000000
Isolation Crosstalk (dB)
Input Frequency (Hz) C043
----- ± 2.5*VREF
----- 1.25*VREF
----- 0.625*VREF
----- + 2.5*VREF
-----+1.25*VREF
±140
±125
±110
±95
±80
50 500 5000 50000 500000 5000000
Memory Crosstalk (dB)
Input Frequency (Hz) C044
----- ± 2.5*VREF
----- 1.25*VREF
----- 0.625*VREF
----- + 2.5*VREF
-----+1.25*VREF
±120
±110
±100
±90
±80
±40 ±7 26 59 92 125
Total Harmonic Distortion (dB)
Free-Air Temperature (oC) C041
----- ± 2.5*VREF
----- 1.25*VREF
----- 0.625*VREF
----- + 2.5*VREF
-----+1.25*VREF
±140
±125
±110
±95
±80
50 500 5000 50000 500000 5000000
Memory Crosstalk (dB)
Input Frequency (Hz) C042
----- ± 2.5*VREF
----- 1.25*VREF
----- 0.625*VREF
----- + 2.5*VREF
-----+1.25*VREF
±120
±110
±100
±90
±80
10 2010 4010 6010 8010 10010
Total Harmonic Distortion (dB)
Input Frequency (Hz) C040
----- ± 2.5*VREF
----- 1.25*VREF
----- 0.625*VREF
----- + 2.5*VREF
-----+1.25*VREF
88
89
90
91
92
93
94
95
±40 ±7 26 59 92 125
Signal-to-Noise + Distortion Ratio (dB)
Free-Air Temperature (oC) C039
----- ± 2.5*VREF
----- 1.25*VREF
----- 0.625*VREF
----- + 2.5*VREF
-----+1.25*VREF
ADS8694 , ADS8698
www.ti.com SBAS686 –JULY 2015
Typical Characteristics (continued)
At TA= 25°C, AVDD = 5 V, DVDD = 3 V, internal reference VREF = 4.096 V, and fSAMPLE = 500 kSPS, unless otherwise noted.
fIN = 1 kHz
Figure 38. SINAD vs Temperature Figure 39. THD vs Input Frequency
fIN = 1 kHz
Figure 40. THD vs Temperature Figure 41. Memory Crosstalk vs Frequency
Input = 2 × maximum input voltage
Figure 42. Isolation Crosstalk vs Frequency Figure 43. Memory Crosstalk vs Frequency for
Overrange Inputs
Copyright © 2015, Texas Instruments Incorporated Submit Documentation Feedback 17
Product Folder Links: ADS8694 ADS8698

2
2.1
2.2
2.3
±40 ±7 26 59 92 125
IAVDD Standby (mA)
Free-Air Temperature (oC)
C060
4.5
4.75
5
5.25
5.5
5.75
6
±40 ±7 26 59 92 125
IAVDD Static (mA)
Free-Air Temperature(oC) C063
7.5
7.75
8
8.25
8.5
8.75
9
±40 ±7 26 59 92 125
IAVDD Static (mA)
Free-Air Temperature (oC) C059
7.5
8
8.5
9
9.5
10
±40 ±7 26 59 92 125
IAVDD Dynamic (mA)
Free-Air Temperature (oC) C062
±140
±125
±110
±95
±80
100 1000 10000 100000 1000000 10000000
Isolation Crosstalk (dB)
Input Frequency (Hz) C045
----- ± 2.5*VREF
----- 1.25*VREF
----- 0.625*VREF
----- + 2.5*VREF
-----+1.25*VREF
10
10.5
11
11.5
12
±40 ±7 26 59 92 125
IAVDD Dynamic (mA)
Free-Air Temperature (oC) C058
ADS8694 , ADS8698
SBAS686 –JULY 2015 www.ti.com
Typical Characteristics (continued)
At TA= 25°C, AVDD = 5 V, DVDD = 3 V, internal reference VREF = 4.096 V, and fSAMPLE = 500 kSPS, unless otherwise noted.
Input = 2 × maximum input voltage
Figure 45. AVDD Current vs Temperature for the ADS8698
Figure 44. Isolation Crosstalk vs Frequency for (fS= 500 kSPS)
Overrange Inputs
Figure 47. AVDD Current vs Temperature for the ADS8694
Figure 46. AVDD Current vs Temperature for the ADS8698 (fS= 500 kSPS)
(During Sampling)
Figure 48. AVDD Current vs Temperature for the ADS8694 Figure 49. AVDD Current vs Temperature
(During Sampling) (STANDBY)
18 Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated
Product Folder Links: ADS8694 ADS8698

1
2
3
4
5
6
±40 ±7 26 59 92 125
IAVDD PD (uA)
Free-Air Temperature (oC)
C077
ADS8694 , ADS8698
www.ti.com SBAS686 –JULY 2015
Typical Characteristics (continued)
At TA= 25°C, AVDD = 5 V, DVDD = 3 V, internal reference VREF = 4.096 V, and fSAMPLE = 500 kSPS, unless otherwise noted.
Figure 50. AVDD Current vs Temperature
(Power Down)
Copyright © 2015, Texas Instruments Incorporated Submit Documentation Feedback 19
Product Folder Links: ADS8694 ADS8698

Multiplexer
Oscillator
PGA
1 M:
OVP
1 M:
2nd-Order
LPF ADC
Driver
VB0
AIN_0P
AIN_0GND OVP
PGA
1 M:
OVP
1 M:
2nd-Order
LPF ADC
Driver
VB1
AIN_1P
AIN_1GND OVP
PGA
1 M:
OVP
1 M:
2nd-Order
LPF ADC
Driver
VB2
AIN_2P
AIN_2GND OVP
PGA
1 M:
OVP
1 M:
2nd-Order
LPF ADC
Driver
VB3
AIN_3P
AIN_3GND OVP
PGA
1 M:
OVP
1 M:
2nd-Order
LPF ADC
Driver
VB4
AIN_4P
AIN_4GND OVP
PGA
1 M:
OVP
1 M:
2nd-Order
LPF ADC
Driver
VB5
AIN_5P
AIN_5GND OVP
PGA
1 M:
OVP
1 M:
2nd-Order
LPF ADC
Driver
VB6
AIN_6P
AIN_6GND OVP
PGA
1 M:
OVP
1 M:
2nd-Order
LPF ADC
Driver
VB7
AIN_7P
AIN_7GND OVP
AUX_IN
AUX_GND
18-Bit
SAR ADC
Digital
Logic
and
Interface
4.096-V
Reference
REFGND
DGNDAGND
DVDD
AVDD
Additional Channels in ADS8698
ADS8698
ADS8694
ALARM
CS
SCLK
SDI
SDO
DAISY
REFSEL
RST/PD
REFCAP
REFIO
Internal ADC operating as 16-bit
ADS8694 , ADS8698
SBAS686 –JULY 2015 www.ti.com
8 Detailed Description
8.1 Overview
The ADS8694 and ADS8698 are 18-bit data acquisition systems with 4- and 8-channel analog inputs,
respectively. Each analog input channel consists of an overvoltage protection circuit, a programmable gain
amplifier (PGA), and a second-order, antialiasing filter that conditions the input signal before being fed into a 4-
or 8-channel analog multiplexer (MUX). The output of the MUX is digitized using a 18-bit analog-to-digital
converter (ADC), based on the successive approximation register (SAR) architecture. This overall system can
achieve a maximum throughput of 500 kSPS, combined across all channels. The devices feature a 4.096-V
internal reference with a fast-settling buffer and a simple SPI-compatible serial interface with daisy-chain (DAISY)
and ALARM features.
The devices operate from a single 5-V analog supply and can accommodate true bipolar input signals up to
±2.5 × VREF. The devices offer a constant 1-MΩresistive input impedance irrespective of the sampling frequency
or the selected input range. The integration of multichannel precision analog front-end circuits with high input
impedance and a precision ADC operating from a single 5-V supply offers a simplified end solution without
requiring external high-voltage bipolar supplies and complicated driver circuits.
8.2 Functional Block Diagram
20 Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated
Product Folder Links: ADS8694 ADS8698