Texas Instruments TPS65917-Q1 Product manual

TPS65917-Q1 Register Map
Technical Reference Manual
Literature Number: SLVUAH1C
June 2015–Revised April 2017

2SLVUAH1C–June 2015–Revised April 2017
Submit Documentation Feedback
Copyright © 2015–2017, Texas Instruments Incorporated
Introduction
Chapter 1
SLVUAH1C–June 2015–Revised April 2017
Introduction
This document presents a summary of the hardware interface for the TPS65917-Q1 device. Each module
instance within the design is shown along with the module register map and bit definitions for each bitfield.
1.1 Register Address Mapping
This document describes the register mapping of the TPS65917-Q1 device. The operation of the IC is
described in the device data sheet, TPS65917-Q1 Power Management Unit (PMU) for Processor.
The 3 hex digits of the physical address of the register indicated in this document are mapped as 0xPAA,
while P stands for the page number of the register, and AA stands for the register address within the
memory page. The page numbers are mapped to the slave device address as following:
Page = 0x0 — Slave Device address 0x12 for DVS registers
Page = 0x1 — Slave Device address 0x48 or 0x58 for Power registers
Page = 0x2 — Slave Device address 0x49 or 0x59 for Interfaces and Auxiliaries registers
Page = 0x3 — Slave Device address 0x4A or 0x5A for Trimming and Test registers
Page = 0x4 —Slave Device address 0x4B or 0x5B for OTP programming registers
For the reset of the registers, the registers are defined by 3 categories:
• POR: Power On Reset registers
• HWRST: Hardware Reset registers
• SWORST: Switch Off Reset registers
These categories of registers (POR, HWRST, SWORST) are described in the device data sheet. When
the reset value of a bit register is 0bX, it means the bit value is coming from the OTP memory.
NOTE: All reserved bits are read only (R). Read to an unmapped register returns previous read
value.

3
SLVUAH1C–June 2015–Revised April 2017
Submit Documentation Feedback Copyright © 2015–2017, Texas Instruments Incorporated
Register Physical Address
Chapter 2
SLVUAH1C–June 2015–Revised April 2017
Register Physical Address
2.1 Register Module Base Address and Size
Table 2-1 lists the base address and address space for the TPS65917-Q1 device functional register
modules.
Table 2-1. TPS65917-Q1 Function Register Module Name and Base Address
Module Name Base Address Size
FUNC_SMPS_DVS 0x020 32 Bytes
FUNC_BACKUP 0x118 8 Bytes
FUNC_SMPS 0x120 48 Bytes
FUNC_LDO 0x150 47 Bytes
FUNC_SPI 0x17F 1 Byte
FUNC_DVFS 0x180 8 Bytes
FUNC_PMU_CONTROL 0x1A0 32 Bytes
FUNC_RESOURCE 0x1D4 28 Bytes
FUNC_PAD_CONTROL 0x1F0 16 Bytes
FUNC_INTERRUPT 0x210 32 Bytes
FUNC_ID 0x24F 4 Bytes
FUNC_GPIO 0x280 20 Bytes
FUNC_GPADC 0x2C0 32 Bytes
FUNC_DESIGNREV 0x357 1 Byte
FUNC_TRIM_GPADC 0x3CD 18 Bytes
Complex bit access types are encoded to fit into small table cells. Table 2-2 shows the codes that are
used for access types in this document.
Table 2-2. FUNC_PAD_CONTROL Access Type Codes
Access Type Code Description
Read Type
R R Read
RC R
CRead to Clear
Write Type
W W Write

4SLVUAH1C–June 2015–Revised April 2017
Submit Documentation Feedback
Copyright © 2015–2017, Texas Instruments Incorporated
Register Descriptions
Chapter 3
SLVUAH1C–June 2015–Revised April 2017
Register Descriptions
3.1 FUNC_SMPS_DVS Registers
Table 3-1 lists the memory-mapped registers for the FUNC_SMPS_DVS. All register offset addresses not
listed in Table 3-1 should be considered as reserved locations and the register contents should not be
modified.
Table 3-1. FUNC_SMPS_DVS Registers
Address Acronym Register Name Section
22h SMPS1_FORCE SMPS1 (or SMPS12 in case of dual-phase) DVS
register.
Voltage to apply to the resource when it is a DVS force
command (OTP_Config).
RESET register domain: SWORST
Section 3.1.1
23h SMPS1_VOLTAGE SMPS1 (or SMPS12 in case of dual-phase) DVS
register.
Voltage to apply to the resource when it is not a DVS
force command (OTP_Config).r.
RESET register domain: SWORST
Section 3.1.2
26h SMPS2_FORCE SMPS2 DVS register.
Voltage to apply to the resource when it is a DVS force
command (OTP_Config).
RESET register domain: SWORST
Section 3.1.3
27h SMPS2_VOLTAGE SMPS2 DVS register.
Voltage to apply to the resource when it is not a DVS
force command (OTP_Config).
RESET register domain: SWORST
Section 3.1.4
2Eh SMPS3_FORCE SMPS3 DVS register.
Voltage to apply to the resource when it is a DVS force
command (OTP_Config).
RESET register domain: SWORST
Section 3.1.5
2Fh SMPS3_VOLTAGE SMPS3 DVS register.
Voltage to apply to the resource when it is not a DVS
force command (OTP_Config).
RESET register domain: SWORST
Section 3.1.6

www.ti.com FUNC_SMPS_DVS Registers
5
SLVUAH1C–June 2015–Revised April 2017
Submit Documentation Feedback Copyright © 2015–2017, Texas Instruments Incorporated
Register Descriptions
3.1.1 SMPS1_FORCE Register (Address = 22h) [reset = X]
SMPS1_FORCE is shown in Figure 3-1 and described in Table 3-2.
Return to Summary Table.
SMPS1 (or SMPS12 in case of dual-phase) DVS register. Voltage to apply to the resource when it is a
DVS force command (OTP_Config).
RESET register domain: SWORST
Figure 3-1. SMPS1_FORCE Register
76543210
CMD VSEL
R/W-1h R/W-X
Table 3-2. SMPS1_FORCE Register Field Descriptions
Bit Field Type Reset Description
7 CMD R/W 1h DVS command register selection:
When 0: SMPS1_FORCE.VSEL voltage is applied
When 1: SMPS1_VOLTAGE.VSEL voltage is applied (default)
CMD is effective if SMPS1_CTRL.ROOF_FLOOR_EN='0'
6-0 VSEL R/W X See VSEL cross table showed in SMPS1_VOLTAGE.VSEL register
(page1).

FUNC_SMPS_DVS Registers www.ti.com
6SLVUAH1C–June 2015–Revised April 2017
Submit Documentation Feedback
Copyright © 2015–2017, Texas Instruments Incorporated
Register Descriptions
3.1.2 SMPS1_VOLTAGE Register (Address = 23h) [reset = X]
SMPS1_VOLTAGE is shown in Figure 3-2 and described in Table 3-3.
Return to Summary Table.
SMPS1 (or SMPS12 in case of dual-phase) DVS register. Voltage to apply to the resource when it is not a
DVS force command (OTP_Config).r.
RESET register domain: SWORST
Figure 3-2. SMPS1_VOLTAGE Register
76543210
RANGE VSEL
R/W-X R/W-X
Table 3-3. SMPS1_VOLTAGE Register Field Descriptions
Bit Field Type Reset Description
7 RANGE R/W X Range of the VSEL voltage. This bit is applied to
SMPS1_VOLTAGE.VSEL and SPMS1_FORCE.VSEL
0: 0.5V to 1.65V
1: 1.0 to 3.3V
Note:RANGE bit is RO when SMPS1 is ON, RANGE bit is RW when
SMPS1 is OFF
Note: For Dual-phase mode, RANGE=1 (1V to 3.3V) is not
supported.
6-0 VSEL R/W X See VSEL cross table showed in SMPS1_VOLTAGE.VSEL register
(page1).

www.ti.com FUNC_SMPS_DVS Registers
7
SLVUAH1C–June 2015–Revised April 2017
Submit Documentation Feedback Copyright © 2015–2017, Texas Instruments Incorporated
Register Descriptions
3.1.3 SMPS2_FORCE Register (Address = 26h) [reset = X]
SMPS2_FORCE is shown in Figure 3-3 and described in Table 3-4.
Return to Summary Table.
SMPS2 DVS register. Voltage to apply to the resource when it is a DVS force command (OTP_Config).
RESET register domain: SWORST
Figure 3-3. SMPS2_FORCE Register
76543210
CMD VSEL
R/W-1h R/W-X
Table 3-4. SMPS2_FORCE Register Field Descriptions
Bit Field Type Reset Description
7 CMD R/W 1h DVS command register selection:
When 0: SMPS2_FORCE.VSEL voltage is applied
When 1: SMPS2_VOLTAGE.VSEL voltage is applied (default)
CMD is effective if SMPS2_CTRL.ROOF_FLOOR_EN='0'
6-0 VSEL R/W X See VSEL cross table showed in SMPS1_VOLTAGE.VSEL register.

FUNC_SMPS_DVS Registers www.ti.com
8SLVUAH1C–June 2015–Revised April 2017
Submit Documentation Feedback
Copyright © 2015–2017, Texas Instruments Incorporated
Register Descriptions
3.1.4 SMPS2_VOLTAGE Register (Address = 27h) [reset = X]
SMPS2_VOLTAGE is shown in Figure 3-4 and described in Table 3-5.
Return to Summary Table.
SMPS2 DVS register. Voltage to apply to the resource when it is not a DVS force command
(OTP_Config).
RESET register domain: SWORST
Figure 3-4. SMPS2_VOLTAGE Register
76543210
RANGE VSEL
R/W-X R/W-X
Table 3-5. SMPS2_VOLTAGE Register Field Descriptions
Bit Field Type Reset Description
7 RANGE R/W X Range of the VSEL voltage. This bit is applied to
SMPS2_VOLTAGE.VSEL
0: 0.5V to 1.65V
1: 1.0 to 3.3V
Note:RANGE bit is RO when SMPS2 is ON, RANGE bit is RW when
SMPS2 is OFF
6-0 VSEL R/W X See VSEL cross table showed in SMPS1_VOLTAGE.VSEL register.

www.ti.com FUNC_SMPS_DVS Registers
9
SLVUAH1C–June 2015–Revised April 2017
Submit Documentation Feedback Copyright © 2015–2017, Texas Instruments Incorporated
Register Descriptions
3.1.5 SMPS3_FORCE Register (Address = 2Eh) [reset = X]
SMPS3_FORCE is shown in Figure 3-5 and described in Table 3-6.
Return to Summary Table.
SMPS3 DVS register. Voltage to apply to the resource when it is a DVS force command (OTP_Config).
RESET register domain: SWORST
Figure 3-5. SMPS3_FORCE Register
76543210
CMD VSEL
R/W-1h R/W-X
Table 3-6. SMPS3_FORCE Register Field Descriptions
Bit Field Type Reset Description
7 CMD R/W 1h DVS command register selection:
When 0: SMPS3_FORCE.VSEL voltage is applied
When 1: SMPS3_VOLTAGE.VSEL voltage is applied (default)
CMD is effective if SMPS3_CTRL.ROOF_FLOOR_EN='0'
6-0 VSEL R/W X See VSEL cross table showed in SMPS1_VOLTAGE.VSEL register
(page1).

FUNC_SMPS_DVS Registers www.ti.com
10 SLVUAH1C–June 2015–Revised April 2017
Submit Documentation Feedback
Copyright © 2015–2017, Texas Instruments Incorporated
Register Descriptions
3.1.6 SMPS3_VOLTAGE Register (Address = 2Fh) [reset = X]
SMPS3_VOLTAGE is shown in Figure 3-6 and described in Table 3-7.
Return to Summary Table.
SMPS3 DVS register. Voltage to apply to the resource when it is not a DVS force command
(OTP_Config).
RESET register domain: SWORST
Figure 3-6. SMPS3_VOLTAGE Register
76543210
RANGE VSEL
R/W-X R/W-X
Table 3-7. SMPS3_VOLTAGE Register Field Descriptions
Bit Field Type Reset Description
7 RANGE R/W X Range of the VSEL voltage. This bit is applied to
SMPS3_VOLTAGE.VSEL and SPMS3_FORCE.VSEL
0: 0.5V to 1.65V
1: 1.0 to 3.3V
Note:RANGE bit is RO when SMPS3 is ON, RANGE bit is RW when
SMPS3 is OFF
6-0 VSEL R/W X See VSEL cross table showed in SMPS1_VOLTAGE.VSEL register
(page1).

www.ti.com FUNC_BACKUP Registers
11
SLVUAH1C–June 2015–Revised April 2017
Submit Documentation Feedback Copyright © 2015–2017, Texas Instruments Incorporated
Register Descriptions
3.2 FUNC_BACKUP Registers
Table 3-8 lists the memory-mapped registers for the FUNC_BACKUP. All register offset addresses not
listed in Table 3-8 should be considered as reserved locations and the register contents should not be
modified.
Table 3-8. FUNC_BACKUP Registers
Address Acronym Register Name Section
118h BACKUP0 Backup register #0 which can be used for storage by the
application firmware when the external host is power
down.
These registers will retain their content as long as VRTC
is active.
RESET register domain: POR
Section 3.2.1
119h BACKUP1 Backup register #1 which can be used for storage by the
application firmware when the external host is power
down.
These registers will retain their content as long as VRTC
is active.
RESET register domain: POR
Section 3.2.2
11Ah BACKUP2 Backup register #2 which can be used for storage by the
application firmware when the external host is power
down.
These registers will retain their content as long as VRTC
is active.
RESET register domain: POR
Section 3.2.3
11Bh BACKUP3 Backup register #3 which can be used for storage by the
application firmware when the external host is power
down.
These registers will retain their content as long as VRTC
is active.
RESET register domain: POR
Section 3.2.4
11Ch BACKUP4 Backup register #4 which can be used for storage by the
application firmware when the external host is power
down.
These registers will retain their content as long as VRTC
is active.
RESET register domain: POR
Section 3.2.5
11Dh BACKUP5 Backup register #5 which can be used for storage by the
application firmware when the external host is power
down.
These registers will retain their content as long as VRTC
is active.
RESET register domain: POR
Section 3.2.6
11Eh BACKUP6 Backup register #6 which can be used for storage by the
application firmware when the external host is power
down.
These registers will retain their content as long as VRTC
is active.
RESET register domain: POR
Section 3.2.7
11Fh BACKUP7 Backup register #7 which can be used for storage by the
application firmware when the external host is power
down.
These registers will retain their content as long as VRTC
is active.
RESET register domain: POR
Section 3.2.8

FUNC_BACKUP Registers www.ti.com
12 SLVUAH1C–June 2015–Revised April 2017
Submit Documentation Feedback
Copyright © 2015–2017, Texas Instruments Incorporated
Register Descriptions
3.2.1 BACKUP0 Register (Address = 118h) [reset = 0h]
BACKUP0 is shown in Figure 3-7 and described in Table 3-9.
Return to Summary Table.
Backup register #0 which can be used for storage by the application firmware when the external host is
power down. These registers will retain their content as long as VRTC is active.
RESET register domain: POR
Figure 3-7. BACKUP0 Register
76543210
BACKUP
R/W-0h
Table 3-9. BACKUP0 Register Field Descriptions
Bit Field Type Reset Description
7-0 BACKUP R/W 0h

www.ti.com FUNC_BACKUP Registers
13
SLVUAH1C–June 2015–Revised April 2017
Submit Documentation Feedback Copyright © 2015–2017, Texas Instruments Incorporated
Register Descriptions
3.2.2 BACKUP1 Register (Address = 119h) [reset = 0h]
BACKUP1 is shown in Figure 3-8 and described in Table 3-10.
Return to Summary Table.
Backup register #1 which can be used for storage by the application firmware when the external host is
power down. These registers will retain their content as long as VRTC is active.
RESET register domain: POR
Figure 3-8. BACKUP1 Register
76543210
BACKUP
R/W-0h
Table 3-10. BACKUP1 Register Field Descriptions
Bit Field Type Reset Description
7-0 BACKUP R/W 0h

FUNC_BACKUP Registers www.ti.com
14 SLVUAH1C–June 2015–Revised April 2017
Submit Documentation Feedback
Copyright © 2015–2017, Texas Instruments Incorporated
Register Descriptions
3.2.3 BACKUP2 Register (Address = 11Ah) [reset = 0h]
BACKUP2 is shown in Figure 3-9 and described in Table 3-11.
Return to Summary Table.
Backup register #2 which can be used for storage by the application firmware when the external host is
power down. These registers will retain their content as long as VRTC is active.
RESET register domain: POR
Figure 3-9. BACKUP2 Register
76543210
BACKUP
R/W-0h
Table 3-11. BACKUP2 Register Field Descriptions
Bit Field Type Reset Description
7-0 BACKUP R/W 0h

www.ti.com FUNC_BACKUP Registers
15
SLVUAH1C–June 2015–Revised April 2017
Submit Documentation Feedback Copyright © 2015–2017, Texas Instruments Incorporated
Register Descriptions
3.2.4 BACKUP3 Register (Address = 11Bh) [reset = 0h]
BACKUP3 is shown in Figure 3-10 and described in Table 3-12.
Return to Summary Table.
Backup register #3 which can be used for storage by the application firmware when the external host is
power down. These registers will retain their content as long as VRTC is active.
RESET register domain: POR
Figure 3-10. BACKUP3 Register
76543210
BACKUP
R/W-0h
Table 3-12. BACKUP3 Register Field Descriptions
Bit Field Type Reset Description
7-0 BACKUP R/W 0h

FUNC_BACKUP Registers www.ti.com
16 SLVUAH1C–June 2015–Revised April 2017
Submit Documentation Feedback
Copyright © 2015–2017, Texas Instruments Incorporated
Register Descriptions
3.2.5 BACKUP4 Register (Address = 11Ch) [reset = 0h]
BACKUP4 is shown in Figure 3-11 and described in Table 3-13.
Return to Summary Table.
Backup register #4 which can be used for storage by the application firmware when the external host is
power down. These registers will retain their content as long as VRTC is active.
RESET register domain: POR
Figure 3-11. BACKUP4 Register
76543210
BACKUP
R/W-0h
Table 3-13. BACKUP4 Register Field Descriptions
Bit Field Type Reset Description
7-0 BACKUP R/W 0h

www.ti.com FUNC_BACKUP Registers
17
SLVUAH1C–June 2015–Revised April 2017
Submit Documentation Feedback Copyright © 2015–2017, Texas Instruments Incorporated
Register Descriptions
3.2.6 BACKUP5 Register (Address = 11Dh) [reset = 0h]
BACKUP5 is shown in Figure 3-12 and described in Table 3-14.
Return to Summary Table.
Backup register #5 which can be used for storage by the application firmware when the external host is
power down. These registers will retain their content as long as VRTC is active.
RESET register domain: POR
Figure 3-12. BACKUP5 Register
76543210
BACKUP
R/W-0h
Table 3-14. BACKUP5 Register Field Descriptions
Bit Field Type Reset Description
7-0 BACKUP R/W 0h

FUNC_BACKUP Registers www.ti.com
18 SLVUAH1C–June 2015–Revised April 2017
Submit Documentation Feedback
Copyright © 2015–2017, Texas Instruments Incorporated
Register Descriptions
3.2.7 BACKUP6 Register (Address = 11Eh) [reset = 0h]
BACKUP6 is shown in Figure 3-13 and described in Table 3-15.
Return to Summary Table.
Backup register #6 which can be used for storage by the application firmware when the external host is
power down. These registers will retain their content as long as VRTC is active.
RESET register domain: POR
Figure 3-13. BACKUP6 Register
76543210
BACKUP
R/W-0h
Table 3-15. BACKUP6 Register Field Descriptions
Bit Field Type Reset Description
7-0 BACKUP R/W 0h

www.ti.com FUNC_BACKUP Registers
19
SLVUAH1C–June 2015–Revised April 2017
Submit Documentation Feedback Copyright © 2015–2017, Texas Instruments Incorporated
Register Descriptions
3.2.8 BACKUP7 Register (Address = 11Fh) [reset = 0h]
BACKUP7 is shown in Figure 3-14 and described in Table 3-16.
Return to Summary Table.
Backup register #7 which can be used for storage by the application firmware when the external host is
power down. These registers will retain their content as long as VRTC is active.
RESET register domain: POR
Figure 3-14. BACKUP7 Register
76543210
BACKUP
R/W-0h
Table 3-16. BACKUP7 Register Field Descriptions
Bit Field Type Reset Description
7-0 BACKUP R/W 0h

FUNC_SMPS Registers www.ti.com
20 SLVUAH1C–June 2015–Revised April 2017
Submit Documentation Feedback
Copyright © 2015–2017, Texas Instruments Incorporated
Register Descriptions
3.3 FUNC_SMPS Registers
Table 3-17 lists the memory-mapped registers for the FUNC_SMPS. All register offset addresses not
listed in Table 3-17 should be considered as reserved locations and the register contents should not be
modified.
Table 3-17. FUNC_SMPS Registers
Address Acronym Register Name Section
120h SMPS1_CTRL SMPS1 (or SMPS12 in case of dual-phase) control
register.
RESET register domain: HWRST (MODE_ACTIVE and
MODE_SLEEP are in SWORST domain)
Notes: MODE_SLEEP is used when NSLEEP,
ENABLE1, ENABLE2 signals select the resource.
MODE_ACTIVE is used when none of NSLEEP,
ENABLE1, ENABLE2 signals select resource (see
Resources SLEEP/ACTIVE assignments table in the
Data Manual for details).
Section 3.3.1
122h SMPS1_FORCE SMPS1 (or SMPS12 in case of dual-phase) DVS
register.
Voltage to apply to the resource when it is a DVS force
command (OTP_Config).
RESET register domain: SWORST
Section 3.3.2
123h SMPS1_VOLTAGE SMPS1 (or SMPS12 in case of dual-phase) DVS
register.
Voltage to apply to the resource when it is not a DVS
force command (OTP_Config).
RESET register domain: SWORST
Section 3.3.3
124h SMPS2_CTRL SMPS2 control register.
RESET register domain: HWRST (MODE_ACTIVE and
MODE_SLEEP are in SWORST domain)
Notes: MODE_SLEEP is used when NSLEEP,
ENABLE1, ENABLE2 signals select the resource.
MODE_ACTIVE is used when none of NSLEEP,
ENABLE1, ENABLE2 signals select resource (see
Resources SLEEP/ACTIVE assignments table in the
Data Manual for details).
Section 3.3.4
126h SMPS2_FORCE SMPS2 DVS register.
Voltage to apply to the resource when it is a DVS force
command (OTP_Config).
RESET register domain: SWORST
Section 3.3.5
127h SMPS2_VOLTAGE SMPS2 DVS register.
Voltage to apply to the resource when it is not a DVS
force command (OTP_Config).
RESET register domain: SWORST
Section 3.3.6
12Ch SMPS3_CTRL SMPS3 control register.
RESET register domain: HWRST (MODE_ACTIVE and
MODE_SLEEP are in SWORST domain)
Notes: MODE_SLEEP is used when NSLEEP,
ENABLE1, ENABLE2 signals select the resource.
MODE_ACTIVE is used when none of NSLEEP,
ENABLE1, ENABLE2 signals select resource (see
Resources SLEEP/ACTIVE assignments table in the
Data Manual for details).
Section 3.3.7
12Eh SMPS3_FORCE SMPS3
DVS register.
Voltage to apply to the resource when it is a DVS force
command (OTP_Config).
RESET register domain: SWORST
Section 3.3.8
12Fh SMPS3_VOLTAGE SMPS3 DVS register.
Voltage to apply to the resource when it is not a DVS
force command (OTP_Config).
RESET register domain: SWORST
Section 3.3.9