Texas Instruments SLVU013 User manual

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June 1999 Mixed-Signal Linear Products
User’s Guide
SLVU013

IMPORTANT NOTICE
TexasInstruments andits subsidiaries(TI) reservethe rightto makechanges totheir productsor todiscontinue
any product or service without notice, and advise customers to obtain the latest version of relevant information
to verify, before placing orders, that information being relied on is current and complete. All products are sold
subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those
pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TIdeemsnecessarytosupport thiswarranty.Specific testingofall parametersofeachdeviceis notnecessarily
performed, except those mandated by government requirements.
CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF
DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL
APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR
WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER
CRITICALAPPLICATIONS.INCLUSIONOFTIPRODUCTSINSUCHAPPLICATIONSISUNDERSTOODTO
BE FULLY AT THE CUSTOMER’S RISK.
In order to minimize risks associated with the customer’s applications, adequate design and operating
safeguards must be provided by the customer to minimize inherent or procedural hazards.
TIassumes noliabilityforapplicationsassistance orcustomer productdesign. TIdoes notwarrantorrepresent
thatanylicense,eitherexpressorimplied,isgrantedunderanypatentright,copyright,maskworkright,orother
intellectual property right of TI covering or relating to any combination, machine, or process in which such
semiconductor products or services might be or are used. TI’s publication of information regarding any third
party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.
Copyright 1999, Texas Instruments Incorporated

Information About Cautions and Warnings
iii
Read This First
Preface
Read This First
About This Manual
This user’s guide describes techniques for designing synchronous buck
convertersusingTI’sSLVP1111–114evaluationmodules(EVM)andTPS56xx
ripple regulator controllers.
How to Use This Manual
This document contains the following chapters:
Chapter 1 Introduction
Chapter 2 Design Procedure
Chapter 3 Test Results
Information About Cautions and Warnings
This book may contain cautions and warnings.
This is an example of a caution statement.
A caution statement describes a situation that could potentially
damage your software or equipment.
This is an example of a warning statement.
A warning statement describes a situation that could potentially
cause harm to you.
The information in a caution or a warning is provided for your protection.
Please read each caution and warning carefully.

Trademarks
iv
Related Documentation From Texas Instruments
 Synchronous Buck Converter Design Using TPS56xx Controllers in
SLVP10x EVMs User’s Guide
(literature number SLVU007).
TPS56xx data sheet (literature number SLVS177A)
Designer’s Notebook The TPS56xx Family of Power Supply Controllers
(literature number SLVT140A)
Designing Fast Response Synchronous Buck Regulators Using the
TPS5210 (literaure number SLVA044).
FCC Warning
Thisequipmentisintendedforuseinalaboratorytestenvironmentonly.Itgen-
erates,uses,andcanradiate radio frequency energy and has notbeentested
for compliance with the limits of computing devices pursuant to subpart J of
part 15 of FCC rules, which are designed to provide reasonable protection
against radio frequency interference. Operation of this equipment in other en-
vironmentsmaycauseinterferencewith radio communications, in which case
the user at his own expense will be required to take whatever measures may
be required to correct this interference.
Trademarks
TI is a trademark of Texas Instruments Incorporated.

Running Title—Attribute Reference
v
Chapter Title—Attribute Reference
Contents
1 Introduction 1-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.1 Synchronous Buck Regulator Operation 1-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.2 Hysteretic Control Operation 1-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.3 Design Strategy 1-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.4 Design Specification Summary 1-5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.5 Schematic 1-7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.6 Bill of Materials 1-8. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.7 Board Layout 1-10. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2 Design Procedure 2-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.1 TPS56xx Functions 2-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.1.1 VCC Undervoltage Lockout 2-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.1.2 Inhibit 2-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.1.3 Slowstart Design 2-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.1.4 Hysteresis Setting 2-5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.1.5 Noise Suppression 2-7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.1.6 Overcurrent Protection 2-7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.1.7 Overvoltage Protection 2-10. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.1.8 Power Good 2-10. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.1.9 Bias 2-10. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.1.10 Gate Drivers 2-10. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.2 External Component Selection 2-14. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.2.1 Duty Cycle Estimate 2-14. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.2.2 Input Capacitance 2-14. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.2.3 Output Filter Design 2-14. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.2.4 Switching Frequency Analysis 2-17. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.2.5 Power MOSFET Selection 2-20. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3 Test Results 3-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.1 Test Summary 3-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.1.1 Static Line and Load Regulation 3-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.1.2 Output Voltage Ripple 3-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.1.3 Efficiency and Power Losses 3-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.1.4 Output Start-Up and Overshoot 3-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.1.5 Frequency Variation 3-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.1.6 Load Current Transient Response 3-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.1.7 Features 3-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.1.8 Conclusion 3-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.2 Test Setup 3-5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.3 Test Results 3-7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Running Title—Attribute Reference
vi
Figures
1–1 Simplified Synchronous Buck Converter Schematic 1-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1–2 Simplified Hysteretic Controlled Output Voltage Waveform 1-3. . . . . . . . . . . . . . . . . . . . . . . . . .
1–3 SLVP111–114 EVM Converter Schematic Diagram 1-7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1–4 Top Assembly 1-10. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1–5 Bottom Assembly (Top View) 1-10. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1–6 Top Layer 1-10. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1–7 Bottom Layer (Top VIew) 1-11. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2–1 TPS56xx Functional Block Diagram 2-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2–2 Block Diagram Showing Noise Suppression Circuits 2-7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2–3 VDS Sensing Circuit 2-8. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2–4 Gate Driver Block Diagram 2-11. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2–5 I–V Characteristic Curve for Low-Side Gate Drivers 2-12. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2–6 Output Ripple Voltage Detail 2-18. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3–1 Test Setup 3-6. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3–2 SLVP111 Measured Load Regulation 3-7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3–3 SLVP111Measured Efficiency 3-7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3–4 SLVP111Measured Power Dissipation 3-8. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3–5 SLVP111Measured Switching Frequency 3-8. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3–6 SLVP111 Measured Switching Waveforms 3-9. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3–7 SLVP111Measured Start-Up (INHIBIT) Waveforms 3-9. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3–8 SLVP111 Measured Start-Up (VCC) Waveforms 3-10. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3–9 SLVP111Measured Start-Up (VIN) Waveforms 3-10. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3–10 SLVP111 Measured Load Transient Waveforms 3-11. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3–11 SLVP112 Measured Load Regulation 3-11. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3–12 SLVP112 Measured Efficiency 3-12. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3–13 SLVP112 Measured Power Dissipation 3-12. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3–14 SLVP112 Measured Switching Frequency 3-13. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3–15 SLVP112 Measured Switching Waveforms 3-13. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3–16 SLVP112 Measured Start-Up (INHIBIT) Waveforms 3-14. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3–17 SLVP112 Measured Start-Up (VCC) Waveforms 3-14. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3–18 SLVP112 Measured Start-Up (VIN) Waveforms 3-15. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3–19 SLVP112 Measured Load Transient Waveforms 3-15. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3–20 SLVP113 Measured Load Regulation 3-16. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3–21 SLVP113 Measured Efficiency 3-16. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3–22 SLVP113 Measured Power Dissipation 3-17. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3–23 SLVP113 Measured Switching Frequency 3-17. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3–24 SLVP113 Measured Switching Waveforms 3-18. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3–25 SLVP113 Measured Start-Up (INHIBIT) Waveforms 3-18. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3–26 SLVP113 Measured Start-Up (VCC) Waveforms 3-19. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Running Title—Attribute Reference
vii
Contents
3–27 SLVP113 Measured Start-Up (VIN) Waveforms 3-19. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3–28 SLVP113 Measured Load Transient Waveforms 3-20. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3–29 SLVP114 Measured Load Regulation 3-20. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3–30 SLVP114 Measured Efficiency 3-21. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3–31 SLVP114 Measured Power Dissipation 3-21. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3–32 SLVP114 Measured Switching Frequency 3-22. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3–33 SLVP114 Measured Switching Waveforms 3-22. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3–34 SLVP114 Measured Start-Up (INHIBIT) Waveforms 3-23. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3–35 SLVP114 Measured Start-Up (VCC) Waveforms 3-23. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3–36 SLVP114 Measured Start-Up (VIN) Waveforms 3-24. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3–37 SLVP114 Measured Load Transient Waveforms 3-24. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Tables
1–1 Summary of EVM Converter Modules 1-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1–2 EVM Converter Operating Specifications 1-5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1–3 SLVP111–114 EVMs Bill of Materials 1-8. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

viii

1-1
Introduction
Introduction
The SLVP111/112/113/114 evaluation modules (EVMs) have been designed
and tested using the TPS56xx hysteretic controllers. These boards are
synchronous dc-dc buck converters with fixed output voltages of 3.3 V, 2.5 V,
1.8 V and 1.5 V respectively. They use only surface mount components and
are design examples of how to use TI’s TPS56xx controllers in high density,
low loss applications with tight static and dynamic output voltage
requirements. Detailed test results taken from the EVMs are presented.
Designsimplicity,lowcomponentcount,andlowercostmakebuckconverters
popularsolutions where low input voltagesare available for the converterand
where isolation is not a requirement.
This user’s guide describes techniques for designing synchronous buck
converters using TI’s SLVP111–114 EVMs and TPS56xx ripple regulator
controllers. Synchronous buck converters provide an elegant power supply
solution for rapidly transitioning DSP loads (such as the Texas Instruments
TMS320C62x/67x family), fast memory, and similar processors. An order of
magnitude improvement in dynamic response of this converter over standard
control methods reduces hold-up capacitance needs near the transitioning
loads, thus saving cost and board space.
Topic Page
1.1 Synchronous Buck Regulator Operation 1–2. . . . . . . . . . . . . . . . . . . . . . . .
1.2 Hysteretic Control Operation 1–3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.3 Design Strategy 1–4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.4 Design Specification Summary 1–5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.5 Schematic 1–7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.6 Bill of Materials 1–8. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.7 Board Layout 1–10. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Chapter 1

Synchronous Buck Regulator Operation
1-2
1.1 Synchronous Buck Regulator Operation
The synchronous buck converter is a variation of the traditional buck
converter. The main switching device is usually a power MOSFET and is
driveninthesamemannerasinatraditionalbuckconverter.Thefreewheeling
rectifier, usually a Schottky device, is replaced by a power MOSFET and is
driven in a complementary or synchronous fashion relative to the main
switching device; when one MOSFET is on, the other is off. The freewheeling
MOSFET is selected so that its ON voltage drop is less than the forward drop
of the original freewheeling rectifier, thus increasing conversion efficiency. A
very important design issue when using a synchronous buck converter is
preventingcross-conductionofthetwopowerMOSFETs,i.e.,preventingboth
MOSFETs from being on simultaneously. A small amount of deadtime is
necessary.
Figure 1 shows a simplified schematic of a synchronous buck converter. The
TPS56xxsensesthe output voltage andthen drives Q1and Q2 depending on
thesensedvoltage.TheTPS56xxsensesthevoltageatthejunctionofQ1,Q2,
and L1 and uses it to actively prevent simultaneous conduction of Q1 and Q2.
Figure 1–1.Simplified Synchronous Buck Converter Schematic
TPS56xx
Q1
Q2
+
+
VI
VO
L1
C

Hysteretic Control Operation
1-3
Introduction
1.2 Hysteretic Control Operation
Hysteretic control, also called bang-bang control or ripple regulator control,
maintains the output voltage within the hysteresis band centered about the
internal reference voltage. Figure 1–2 shows a simplified example of a
hysteretic controlled output voltage using the TPS5625 with a reference
voltage of 2.500 V and a hysteresis band of 50 mV. If the output voltage is at
or below the level of the reference minus one-half of the hysteresis band
(VLo = 2.475 V), the TPS5625 turns off the low-side MOSFET (Q2 in Figure
1–1) and turns on the high-side MOSFET (Q1 in Figure 1–1) of the
synchronous buck converter power stage. This is the power stage on-state,
anditcausestheoutputvoltagetoincrease.When theoutputvoltagereaches
orexceedsthe reference plus one-half ofthehysteresis band (VHi = 2.525 V),
the TPS5625 turns off the high-side MOSFET and turns on the low-side
MOSFET. This is the power stage off-state, and it causes the output voltage
todecrease. This hysteretic method ofcontrol keeps the output voltagewithin
thehysteresis band around the referencevoltage. If output-load current steps
orinput-voltage transients force the outputvoltage out of the hysteresisband,
theTPS5625setsthepower-stageMOSFETsinthecontinuousonoroffstate
as required to return the output voltage to the hysteresis band. Thus, the
output voltage is corrected as quickly as the output filter allows. There are no
erroramplifiersensingandadjustingdelays,asisthecasewitheithervoltage-
orcurrent-modecontrollers.Otheradvantagesofhystereticcontrolincludeno
loop compensation design and no input filter interaction problems.
Figure 1–2.Simplified Hysteretic Controlled Output Voltage Waveform
Output
Voltage VHi
VLo
Hysteresis
On Time Off Time Time
2.525 V
2.500 V
2.475 V
Ts

Design Strategy
1-4
1.3 Design Strategy
The SLVP111–114 evaluation modules (EVMs) are optimized for 5-V main
inputvoltageand6-Aoutputcurrent.TheEVMsneedanadditionallowcurrent
12-V (30 mA max) input voltage for the controller. TI’s application report,
Providing a DSP Power Solution from 5 V or 3.3 V Only Systems , TI literature
numberSPRA525describeshowonecanimplementasimpleboostcircuitfor
5-Vonlyinputvoltageapplications.TheseEVMsarepintopincompatiblewith
SLVP104/105/106/115 evaluation boards with 8 A output current, which
combine surface mount and through hole components. This surface mount
versionhasthesamelength,2″,andwidth,0.75″,buttheheightissignificantly
lower, 0.375″versus 0.6″for through hole version.
The TI SLVP111–114 evaluation modules (EVM) provide synchronous buck
convertercircuitsforevaluatingthecapabilitiesoftheTPS56xxfamilyofripple
regulator controllers. The EVM converters can provide proven, demonstrated
reference designs to aid in the rapid development of application-specific
synchronous buck converters. Output capacities of the EVM converters are
optimized for the Siliconix Si4410 power MOSFET device.
The 6-ampere output current level is a reasonable selection criteria for
powering circuit cards with multiple DSPs, and for providing the regulated
voltagetootherhardwareonthecircuitcard. Component size can bereduced
for designs requiring lower power levels.
The TPS56xx controllers each provide one of four popular output voltage
levels. The last two digits of the part number correlate to the set-point voltage
level: TPS5633 is the 3.3-V controller, TPS5625 is the 2.5-V controller,
TPS5618 is the 1.8-V controller, and TPS5615 is the 1.5-V controller. Many
digital devices, memories, and DSP I/O circuits use the 3.3-V level. The core
oftheTMS320C6201requires2.5-V.AlloftheotherDSPsintheTMS320C62x
and the TMS320C67x family need 1.8 V. The GTL bus, as well as various
processors and future DSPs, may require the 1.5-V controller. An external
resistordividercanbeusedtofinetunetheoutputvoltagesofthesecontrollers
for other applications including output voltages up to approximately
VIN – 0.5 V.
Table 1–1 summarizes the four EVM converter modules.
Table 1–1.Summary of EVM Converter Modules
EVM Part Number EVM Board
Number Controller Output Voltage Max. Output Current
TPS5633EVM–111 SLVP111 TPS5633 3.3 V 6 A†
TPS5625EVM–112 SLVP112 TPS5625 2.5 V 6 A†
TPS5618EVM–113 SLVP113 TPS5618 1.8 V 6 A†
TPS5615EVM–114 SLVP114 TPS5615 1.5 V 6 A†
†Output current is limited by the temperature rise of the power MOSFETs chosen. Higher or
lower current designs are possible.

Design Specification Summary
1-5
Introduction
1.4 Design Specification Summary
This section summarizes the design requirements of the EVM converters.
Although every attempt was made to accurately describe the performance of
the EVM converters and the TPS56xx controllers, in case of conflicts, the
TPS56xx data sheet takes precedence over this document.
The TPS56xx family of controllers provides the necessary regulation
functions. In addition to a reference voltage accuracy of ±1% over the full
operating temperature range, the controller has remote sense inputs to
provide a precisely regulated output voltage. The controller also provides
undervoltage lock-out, overload protection, overvoltage protection, and
overtemperature protection. The controller has a logic level INHIBIT input to
control the converter turn-on and turn-off and a power good output to indicate
output voltage status. Undervoltage lock-out prevents operation of the power
supply when the 12 Vdc input voltage is not sufficient for proper operation.
Overload protection protects the power supply from accidental overloads or
shortcircuits.Overvoltageprotectionpreventsdamagetotheloadintheevent
of an internal power supply failure or presence of high voltages on the output
from an external condition. Both overvoltage and overcurrent cause a latched
shutdown. Both power MOSFETs are driven to an OFF state. Recovery from
shutdownrequiresremovalofthe12Vcontrolinputsupplyforreset.Table1–2
lists the operating specifications of the EVM converters.
Table 1–2.EVM Converter Operating Specifications
Specification Min Typ Max Units
Power input voltage range 4.5 6 V
Control input voltage range 10.8 13.2 V
Static voltage tolerance†
SLVP111 (3.3 V)
SLVP112 (2.5 V)
SLVP113 (1.8 V)
SLVP114 (1.5 V)
3.27
2.47
1.78
1.48
3.30
2.50
1.80
1.50
3.33
2.53
1.82
1.52
V
V
V
Line regulation‡±0.05% ±0.1%
Load regulation§±0.2% ±0.4%
Transient response¶±100
50 mV pk µsec
Output current range#06A
Current limit#10 A
Operatin
g
fre
q
uenc
yk
O erating
frequency
SLVP111 (3.3 V) 135 kHz
()
SLVP112 (2.5 V) 225 kHz
SLVP113 (1.8 V)
SLVP114 (1 8 V)
295
360
kHz
kH
S
LVP114
(
1.8 V
)
360 kHz

Design Specification Summary
1-6
Table 1–2.EVM Converter Operating Specifications (Continued)
Specification Min Typ Max Units
Output ripple||
SLVP111 (3.3 V)
SLVP112 (2.5 V)
SLVP113 (1.8 V)
SLVP114 (1.5 V)
66
50
36
30
mV p–p
mV p–p
mV p–p
mV p–p
Efficiency, 6 A load
SLVP111 (3.3 V)
SLVP112 (2.5 V)
SLVP113 (1.8 V)
SLVP114 (1.5 V)
90%
86.4%
83.2%
79.8%
Efficiency, 4 A load
SLVP111 (3.3 V)
SLVP112 (2.5 V)
SLVP113 (1.8 V)
SLVP114 (1.5 V)
91.6%
88.6%
85.1%
81.9%
†Vi = 5 V, Io = 6 A
‡Io = 6 A, Vi = 5 V ±10%
§Vi = 5 V
¶Vi = 5 V, Io stepped repetitively from 0 A to 6.5 A
#Output current rating is limited by thermal considerations. Load currents above this rating may
cause damage to the power supply.
|| Unless otherwise specified, all test conditions are TA= 25_C, Vi = 5 V, Io = 6 A, Vo = nominal.
kVi = 5 V, Io = 6 A, Vo = nominal

Schematic
1-7
Introduction
1.5 Schematic
Figure 1–3 shows the EVM converter schematic diagram. The schematic
diagrams for the other EVM converters are identical except for the controller
IC used.
Figure 1–3.SLVP111–114 EVM Converter Schematic Diagram
IOUT
AGND2
OCP
VHYST
VREFB
VSENSE
ANAGND
SLOWST
BIAS
LODRV
LOHIB
DRVGND
LOWDR
DRV
PWRGD
NC
NC
NC
NC
NC
INHIBIT
IOUTLO
LOSENSE
HISENSE
BOOTLO
HUGHDR
BOOT
VCC
1
2
3
4
5
6
7
8
9
10
11
12
13
14 15
16
17
18
19
20
21
22
23
24
25
26
27
28
C16
1µF
C8
1µF
R15
1 M
C7
1µFR3
10 Ω
Q2
Si4410
R4
10 Ω
C6
0.1 µF
U1
TPS5633 (See Note)
C5 0.1 µF
R2
10 kΩ
R1
1 kΩ
+C1
33 µF
10 V
L1
2.2 µH
+
C2 150 µF
6.3 V
+
C3 150 µF
6.3 V
+
C4 150 µF
6.3 V
Q1
Si4410
C9
2.2 µF
R5
2.7 Ω
C15
0.01 µF
L2
1.5 µH
+
C10
150 µF
4 V
+
C11
150 µF
+
C12
150 µF
+
C13
150 µFC14
10 µF
R6
4.7 Ω
J1–18 J1–17 J1–16 J1–15
SLVP111 = 3.3 V SLVP112 = 2.5 V SLVP113 = 1.8 V SLVP114 = 1.5 V
O
V
J1–4 J1–2 J1–11 J1–14 J1–13 J1–12 PWR
GND
SENSEH
V
SENSEL/
VANAGND
R12
4.7 Ω
C18
0.1 µF
R8
100 Ω1%
C22
1µF
C21
0.1 µF
R11
20 kΩ
1%
C20
1000 pF
R10
100 Ω
1%
C17
0.1 µF
R10
1%
20 kΩ
C19
0.01 µF
R13
750 Ω
R7
1 kΩ
R9
11 kΩ
J1–5 J1–6 J1–9 J1–10 J1–7 J1–8 J1–3 J1–1
VI
RETURN
12 V
RETURN
PG
INHIBIT
NOTE: Last two digits of U1 indicates output voltage option
TPS5633 = 3.3 V (SLVP111) TPS5625 = 2.5 V (SLVP112) TPS5618 = 1.8 V (SLVP113) TPS5618 = 1.5 V (SLVP114)

Bill of Materials
1-8
1.6 Bill of Materials
Table 1–3 lists materials required for the SLVP111–114 EVMs.
Table 1–3.SLVP111–114 EVMs Bill of Materials
Ref Des Part Number Description MFG
C1 10TPA33M Capacitor, POSCAP, 33 µF, 10 V, 20% Sanyo
C2 6TPB150M Capacitor, POSCAP, 150 µF, 6.3 V, 20% Sanyo
C3 6TPB150M Capacitor, POSCAP, 150 µF, 6.3 V, 20% Sanyo
C4 6TPB150M Capacitor, POSCAP, 150 µF, 6.3 V, 20% Sanyo
C5 GRM39X7R104K016A Capacitor, Ceramic, 0.1 µF, 16 V, 10%, X7R muRata
C6 GRM39X7R104K016A Capacitor, Ceramic, 0.1 µF, 16 V, 10%, X7R muRata
C7 GRM42–6Y5V105Z016A Capacitor, Ceramic, 1.0 µF, 16 V, +80%–20% muRata
C8 GRM42–6Y5V105Z016A Capacitor, Ceramic, 1.0 µF, 16V, +80%–20% muRata
C9 GRM42–6Y5V225Z016A Capacitor, Ceramic, 2.2 µF, 16V, Y5V muRata
C10 4TPC150M Capacitor, POSCAP, 150 µF, 4 V, 20% Sanyo
C11 4TPC150M Capacitor, POSCAP, 150 µF, 4 V, 20% Sanyo
C12 4TPC150M Capacitor, POSCAP, 150 µF, 4 V, 20% Sanyo
C13 4TPC150M Capacitor, POSCAP, 150 µF, 4 V, 20% Sanyo
C14 GRM235Y5V106Z016A Capacitor, Ceramic, 10 µF, 16 V, Y5V muRata
C15 GRM42-6Y5V103Z025A Capacitor, Ceramic, 0.01 µF, 25 V, +80%–20%, Y5V muRata
C16 GRM42–6Y5V105Z016A Capacitor, Ceramic, 1.0 µF, 16 V, +80%–20% muRata
C17 GRM39X7R104K016A Capacitor, Ceramic, 0.1 µF, 16 V, 10%, X7R muRata
C18 GRM39X7R104K016A Capacitor, Ceramic, 0.1 µF, 16 V, 10%, X7R muRata
C19 GRM39X7R103K025A Capacitor, Ceramic, 0.01 µF, 25 V, 10%, X7R muRata
C20 GRM39X7R102K050A Capacitor, Ceramic, 1000 pF, 50 V, 10%, X7R muRata
C21 GRM39X7R104K016A Capacitor, Ceramic, 0.1 µF, 16 V, 10%, X7R muRata
C22 GRM42–6Y5V105Z016A Capacitor, Ceramic, 1.0 µF, 16 V, +80%–20% muRata
J1 S1122–18–ND Header, RA, 18-pin, 0.23 Posts x 0.20 Tails Sullins
L1 DO3316P–222HC Inductor, 2.2 µH, 7.4 A Coilcraft
L2 DO3316P–152HC Inductor, 1.5 µH, 9 A Coilcraft
Q1 Si4410DY FET, N-ch, 30-V, 10-A, 13-mΩSiliconix
Q2 Si4410DY FET, N-ch, 30-V, 10-A, 13-mΩSiliconix
R1 Std Resistor, Chip, 1 kΩ, 1/16W, 5%
R2 Std Resistor, Chip, 10 kΩ, 1/16W, 5%
R3 Std Resistor, Chip, 10 Ω, 1/10W, 5%
R4 Std Resistor, Chip, 10 Ω, 1/10W, 5%
R5 Std Resistor, Chip, 2.7 Ω, 1/4W, 5%
R6 Std Resistor, Chip, 4.7 Ω, 1/16W, 5%

Bill of Materials
1-9
Introduction
Table 1–3.SLVP111–114 EVMs Bill of Materials (Continued)
Ref Des Part Number Description MFG
R7 Std Resistor, Chip, 1 kΩ, 1/16W, 5%
R8 Std Resistor, Chip, 100 Ω, 1/16W, 1%
R9 Std Resistor, Chip, 11 kΩ, 1/16W, 5%
R10 Std Resistor, Chip, 100 Ω, 1/16W, 1%
R11 Std Resistor, Chip, 20 kΩ, 1/16W, 1%
R12 Std Resistor, Chip, 4.7 Ω, 1/16W, 5%
R13 Std Resistor, Chip, 750 Ω, 1/16W, 5%
R14 Std Resistor, Chip, 20 kΩ, 1/16W, 1%
R15 Std Resistor, Chip, 1 MΩ, 1/16W, 5%
U1a TPS5633PWP IC, PWM Ripple Controller, Fixed 3.3-V (SLVP111 only) TI
U1b TPS5625PWP IC, PWM Ripple Controller, Fixed 2.5-V (SLVP112 only) TI
U1c TPS5618PWP IC, PWM Ripple Controller, Fixed 1.8-V (SLVP113 only) TI
U1d TPS5615PWP IC, PWM Ripple Controller, Fixed 1.5-V (SLVP114 only) TI

Board Layout
1-10
1.7 Board Layout
Figures 1–4 through 1–7 show the board layouts for the SLVP111–114
evaluation modules.
Figure 1–4.Top Assembly
Top Assembly
Figure 1–5.Bottom Assembly (Top View)
Bottom Assembly (Top View)
Figure 1–6.Top Layer
Top Layer

Board Layout
1-11
Introduction
Figure 1–7.Bottom Layer (Top VIew)
Bottom Layer (Top View)

1-12