Texas Instruments DAC80502-01 User manual

EVM User's Guide: DAC80502-01EVM
DAC80502-01 Evaluation Module
Description
The DAC80502-01EVM is an easy-to-use platform
to evaluate the functionality and performance
of the DAC80502 and DAC80501 devices. The
DAC80502-01EVM has optional circuits and jumpers
to configure the device for different applications. The
DAC80502 and DAC80501 are both installed on the
EVM.
DAC80501 is a single-channel, buffered, low-voltage-
output digital-to-analog converter (DAC) in 16-bit
resolution. DAC80502 is a dual-channel, buffered,
low-voltage-output DAC in 16-bit resolution. The
devices provide unipolar output voltage up to 5 V.
Get Started
1. Order the EVM.
2. Configure EVM jumpers.
3. Install the DAC805xxEVM GUI from ti.com.
4. Connect USB and external power supplies.
5. Launch the DAC805xxEVM GUI.
Features
• Configurable circuit to evaluate the DACx0501 and
DACx0502 family of devices
• Onboard VDD (5-V or 3.3-V) support via USB and
on-board voltage regulators
• FT4232 easily writes to the DAC using the
DAC805xxEVM GUI
• Option for external reference voltage or on-board
2.5-V reference voltage
• Trigger output is available for synchronous
measurement
• External SPI and I2C connections available
Applications
•Oscilloscopes and digitizers
•Parametric measurement unit (PMU)
•Data acquisition (DAQ)
•Flat panel display (FPD) shorting bar pattern
generator
•Small cell base station
•Analog output module
•Process analytics (pH, gas, concentration, force
and humidity)
•Programmable dc power supply
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1 Evaluation Module Overview
1.1 Introduction
The DACx050x digital-to-analog converter (DAC) is a highly accurate, low-power device with voltage output.
The DACx050x is specified monotonic by design and offer linearity of less than 1 LSB. These devices include a
2.5-V, 5-ppm/°C internal reference, giving full-scale output voltage ranges of 1.25 V, 2.5 V, or 5 V.
The DACx050x incorporates a power-on-reset (POR) circuit that makes sure the DAC output powers up at
zero-scale or mid-scale, and remains at that scale until a valid code is written to the device. These devices
consume a low current of 1 mA, and include a power-down feature that reduces current consumption to typically
15 µA at 5 V.
The digital interface of the DACx050x can be configured to SPI or I2C mode using the SPI2C pin. In SPI mode,
the DACx050x uses a versatile 3-wire serial interface that operates at clock rates of up to 50 MHz. In I2C mode,
the DACx050x operates in standard mode (100Kbps), fast mode (400Kbps), and fast mode plus (1.0Mbps).
This user's guide describes the characteristics, operation, and recommended use cases of the
DAC80502-01EVM. This document provides examples and instructions on how to use the DAC80502-01EVM
board and included software. Throughout this document, the terms evaluation board, evaluation module, and
EVM are synonymous with the DAC80502-01EVM. This document also includes schematics, the reference
printed circuit board (PCB) layouts, and a complete bill of materials (BOM).
1.2 Kit Contents
Table 1-1 details the contents of the EVM kit. Contact the TI Product Information Center at [phone] if any
component is missing. Download the latest versions of the related software on the TI website, www.ti.com.
Table 1-1. DAC80502-01EVM Kit Contents
Item Quantity
DAC80502-01EVM board 1
USB micro-B plug to USB-A plug cable 1
1.3 Specification
The EVM is intended to provide basic functional evaluation of the device. The layout is not intended to be a
model for the target circuit, nor laid out for electromagnetic compatibility (EMC) testing. The EVM consists of a
printed-circuit board (PCB), which has the DAC80501 and DAC80502 installed.
1.4 Device Information
Table 1-2 lists the devices supported by the DAC80502-01EVM. DACx050x is used as a generic name for these
devices. This document focuses on the DAC80501 and DAC80502 that come pre-installed on the EVM.
Table 1-2. DAC80502-01EVM Supported Devices
DACx050x DAC Resolution Number of DACs
DAC60501 12-bit 1
DAC70501 14-bit 1
DAC80501 16-bit 1
DAC60502 12-bit 2
DAC70502 14-bit 2
DAC80502 16-bit 2
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2 Hardware
2.1 Hardware Setup
This section describes the overall system setup for the EVM. A computer runs software that communicates with
the FTDI controller onboard using I2C or SPI protocols.
2.1.1 Hardware Theory of Operation
The DAC80502-01EVM is connected to the computer through the on-board FTDI digital controller using the
USB cable that is supplied with the EVM. The evaluation board features connectors and test points for all
communication lines, DAC outputs, and supplies. Figure 2-1 shows a block diagram of the DAC80502-01EVM.
DAC80502-01EVM Power Supplies
USB Micro
LDOs
FTDI Controller
Trigger
Level Shifter
Digital
Headers
Supply
Selection
DAC80501 DAC80501
Output
DAC80502 DAC80502
Outputs
Figure 2-1. Theory of Operation Block Diagram
The USB connection provides the 5-V supply to the EVM. Voltage regulators generate 3.3 V and 1.8 V from the
USB 5-V supply. These 3.3-V and 1.8-V supplies are used to power the FTDI controller.
The DAC80501 and DAC80502 VDD supplies can use the on-board 5-V or 3.3-V supplies depending on the
jumper J6 setting. By default, VDD is connected to the on-board 5-V supply. Alternatively, VDD can be supplied
externally through banana jack J4. Remove the jumper connector on J6 before connecting external supplies to
VDD.
The device reference voltage can be supplied by an onboard 2.5-V voltage regulator by shorting jumper J10
for DAC80502 and J12 for DAC80501, or from an external supply with SMA connector J9. Make sure that the
internal reference is powered off before connecting any other voltage supply to the VREFIO pin.
Each of the DAC outputs have footprints available for capacitor and resistor loads that are unpopulated by
default.
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2.1.2 Jumper Definitions
The jumpers must be connected properly to operate the DAC80502-01EVM. Table 2-1 provides the details of the
configurable jumper settings of the DAC80502-01EVM. Figure 2-2 shows the default jumper connections on the
board.
Table 2-1. DAC80502-01EVM Jumper Definitions
Designator Name Positions
J1 FTDI DIS SHORT 1-2 – FTDI communication is disabled.
OPEN – FTDI communication is enabled (default).
J5 I2C-SPI
SHORT 1-2 – SPI2C connected to ground for SPI communication (default).
SHORT 2-3 – SPI2C connected to VDD for I2C Configuration.
OPEN – SPI2C floating, invalid position.
J6 VDD SEL
SHORT 1-2 – VDD is connected to USB 5 V (default).
SHORT 3-4 – VDD is connected to on-board 3.3 V.
OPEN – VDD is externally powered.
J8 SDA - PICO
SHORT 1-2 – Connects the DAC80501 and the DAC80502 SDIN/SDA pins to the FTDI PICO
pin for SPI mode (default).
SHORT 2-3 – Connects the DAC80501 and the DAC80502 SDIN/SDA pins to the FTDI SDA
pin for I2C Mode.
OPEN – Open if external communication is used.
J10 U2 VREF = 2.5V
SHORT 1-2 – Connects the DAC80502 VREFIO pin to the on-board 2.5-V reference.
Make sure the internal reference is powered off before closing this jumper.
OPEN – Open if internal reference or external reference via J9 is used (default).
If an external reference is used, then turn off the internal reference.
J11 SCL - SCLK
SHORT 1-2 – Connects the DAC80501 and the DAC80502 SCLK/SCL pins to the FTDI SCLK
pin for SPI mode (default).
SHORT 2-3 – Connects the DAC80501 and the DAC80502 SCLK/SCL pins to the FTDI SCL
pin for I2C Mode.
J12 U1 VREF = 2.5V
SHORT 1-2 –Connects the DAC80501 VREFIO pin to the on-board 2.5-V reference.
Make sure the internal reference is powered off before closing this jumper.
OPEN – Open if internal reference or external reference via J9 is used (default).
If an external reference is used, then turn off the internal reference.
J13 U1 A0 Select
SHORT 1-2 – DAC80501 SPI configuration (default).
SHORT all else – DAC80501 I2C configuration, see Table 2-7 for jumper configurations.
OPEN – Open if external communication is used.
J14 U2 A0 Select
SHORT 1-2 – DAC80502 SPI configuration (default)
SHORT all else – DAC80502 I2C configuration, see Table 2-7 for jumper configurations.
OPEN – Open if external communication is used.
J19 RST Select SHORT 1-2 – DAC80502 RSTSEL pin is connected to VDD.
OPEN – DAC80502 RSTSEL pin is connected to GND (default).
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Figure 2-2. DAC80502-01EVM Default Jumper Settings
2.1.3 Connector Definitions
Table 2-2 shows the power connector definitions of the DAC80502-01EVM.
Table 2-2. Power Connector Definitions
Designator Definition
J2 SMA connector for FTDI Trigger Input (unpopulated)
J3 USB connector
J4 DAC80501 and DAC80502 VDD supply (2.7 V to 5.5 V)
J7 DAC80501 and DAC80502 ground
J9
SMA connector for DAC80501 and DAC80502 external reference
voltage (unpopulated)
The DAC references are connected to this SMA by resistors R15
(DAC80501) and R19 (DAC80502)
To avoid shorting the two references together, R19 is unpopulated by
default
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Table 2-3 shows output connector definitions for the DAC80502-01EVM.
Table 2-3. Output Connector Definitions
Designator Definition
J17 SMA connector for DAC80502 VOUTA
(unpopulated)
J18 SMA connector for DAC80502 VOUTB
(unpopulated)
J21 SMA connector for DAC80501 VOUT
(unpopulated)
Table 2-4 shows output header J16 definitions for the DAC80502-01EVM.
Table 2-4. Output Header J16 Definitions
Pin Definition
1 DAC80501 VOUT
3 DAC80502 VOUTA
5 DAC80502 VOUTB
2, 4, 6 Ground
2.1.4 Test Points
The DAC80502-01EVM has a variety of test points available for measuring and debugging purposes. Table 2-5
explains the purpose of each test point.
Table 2-5. DAC80502-01EVM Test Points
Test Point Net Description
TP1 3p3V On-board 3.3-V supply
TP2 1p8V On-board 1.8-V supply
TP3 5V_USB On-board USB 5-V supply
TP4 AD6 FTDI Trigger test point (unpopulated)
TP5, TP6, TP7, TP8 GND Ground test points
TP9 VDD VDD test point
TP10 VREF_2 DAC80502 reference test point
TP11 VREF_1 DAC80501 reference test point
TP12 GND Dedicated ground test point for measuring VOUT noise
TP14 VOUT Dedicated DAC80501 VOUT test point for measuring VOUT
noise
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2.2 Hardware Overview
This section details how to configure the EVM for voltage outputs using I2C and SPI. The following subsections
provide detailed information on the EVM hardware and jumper positions for the two communication modes (see
also Section 2.1.2).
2.2.1 Electrostatic Discharge Caution
CAUTION
Many of the components on the DAC80502-01EVM are susceptible to damage by electrostatic
discharge (ESD). Customers are advised to observe proper ESD handling precautions when
unpacking and handling the EVM, including the use of a grounded wrist strap at an approved ESD
workstation.
2.2.2 Connecting the FTDI Digital Controller
To connect the FTDI digital controller on the EVM board to the computer, align and firmly connect the USB
connector to the J3 connector. Verify the connection is snug; a loose connection can cause intermittent
operation. A 100 mil header (J15) is available for external communication. Table 2-6 lists the J15 pin definitions.
To use external communication, close jumper J1 to disable the connection to the FTDI controller. When using
I2C, TI recommends to close the J8 and J11 jumpers in the I2C positions, as the jumpers connect the pull-up
resistors R12 and R13 to the communication lines.
Table 2-6. Digital Header J15 Pin Definitions
Pin Definition
2 DAC80501 and DAC80502 SPI2C
4 DAC80501 and DAC80502 SCLK/SCL
6 DAC80501 and DAC80502 SDIN/SDA
8 DAC80502 SYNC/A0
10 DAC80501 SYNC/A0
1, 3, 5, 7, 9 Ground
2.2.3 SPI Configuration
Figure 2-3 shows the DAC80502-01EVM configured for SPI communication.
Figure 2-3. DAC80502-01EVM SPI Configuration
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2.2.4 I2C Configuration
Figure 2-4 shows the DAC80502-01EVM configured for I2C communication.
Figure 2-4. DAC80502-01EVM I2C Configuration
The jumper connections on J13 and J14 determine the device address of the DAC80501 and DAC80502,
respectively. Table 2-7 shows the required configuration of the two A0 jumpers for specific device addresses.
Table 2-7. I2C Device Address Map
A0 Connection [A6:A0]
GND 1001 000
VDD 1001 001
SDA 1001 010
SCL 1001 011
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3 Software
3.1 Software Setup
This section provides the procedure for EVM software installation.
3.1.1 Software Installation
Note
Do not connect the EVM to the computer while the software is installing.
Download the latest version of the EVM graphical user interface (GUI) installer from the Order and start
development subsection of the DAC80502-01EVM tool folder on TI.com. Run the GUI installer to install
the DAC805xx GUI software on your computer. The software installation automatically copies the required
LabVIEW™ software files and drivers to the computer.
When the DAC805xx GUI is launched, an installation dialog window opens and prompts the user to select an
installation directory. If left unchanged, Figure 3-1 shows that the software location defaults to C:\Program Files
(x86)\Texas Instruments\DAC805xxEVM.
Figure 3-1. Software Installation Path
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The EVM software also installs the Future Technology Devices International Limited (FTDI) USB drivers using
a separate executable file. Figure 3-2 shows the FTDI USB drivers installation window that is automatically
launched after the DAC805xx software installation is complete.
Figure 3-2. FTDI USB Drivers
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3.2 Software Overview
This section discusses how to use the DAC8050xxEVM software.
3.2.1 Launching the Software
If installed in the default directory, then launch the DAC8050xxEVM software by searching for "DAC805xxEVM"
in the Windows® Start menu.
Figure 3-3 shows the Device Setting configuration menu that is present when the GUI is launched. Select either
the DAC80501 or DAC80502 device from the drop-down menu and click CONFIG. The software only supports
one device at a time.
Figure 3-3. DAC805xxEVM GUI Device Settings at Launch
After a device is selected, the Interface Settings menu pops up. This menu is shown in Figure 3-4. From this
menu, select the interface protocol, as well as the I2C address. Select the CONFIG button to save the current
settings and launch the main GUI.
Figure 3-4. DAC8050xxEVM Interface Settings Menu
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Figure 3-5 shows the GUI after launch with the DAC80501 register map loaded. Figure 3-6 shows the GUI after
launch with the DAC80502 register map loaded.
Figure 3-5. DAC805xxEVM GUI DAC80501 Selection at Launch
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Figure 3-6. DAC805xxEVM GUI DAC80502 Selection at Launch
If the FTDI controller is not connected to the computer when the software is launched, then the GUI defaults to
demo mode. Figure 3-7 illustrates the bottom-left corner of the GUI that shows the hardware connection status:
DEMO MODE or CONNECTED. After the FTDI controller is properly connected to the computer, restart the
DAC805xxEVM software to detect the device.
Figure 3-7. FTDI Digital Controller Connection Status
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3.2.2 Software Features
The DAC805xxEVM GUI allows for I2C or SPI communication to the DAC80501 and DAC80502. Although the
entire register map is available for use, some features have been abstracted into user controls in the High-Level
Configuration page for easy operation.
3.2.2.1 Low Level Configuration Page
Figure 3-8 shows the Low Level Configuration page of the DAC805xxEVM GUI. This page allows direct access
to all registers on the DAC80501. Figure 3-9 shows the Low Level Configuration page for the DAC80502.
The Register Map section in the center of the page lists all the registers. Directly above the Register Map section
are four buttons that allow for read and write access to all registers.
Select a register on the Register Map list to show a description of the values in that register, as well as
information on the register address, default value, size, and current value. Data are written to the registers by
entering a value in the value column of the GUI.
Figure 3-8. DAC80501 Low Level Configuration Page
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Figure 3-9. DAC80502 Low Level Configuration Page
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3.2.2.2 High Level Configuration Page
The High Level Configuration page is used to set the configuration of the DAC805xxEVM GUI. The page is
comprised of one tab: DAC80501 if the DAC80501 device was selected, or DAC80502 if the DAC80502 device
was selected. These two tabs act as shortcuts to configure the DAC80501 and DAC80502 for basic functionality
and testing.
Figure 3-10 shows the DAC80501 tab of the High Level Configuration page. This tab is used to set the gain and
output for the DAC. The internal reference and the reference division can also be powered on and off here.
Figure 3-10. DAC80501 Tab of the High Level Configuration Page
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Figure 3-11 shows the DAC80502 tab from the High Level Configuration page. This tab is used to set the gain
and output for the DACs. The internal reference and the reference division can also be powered on and off here.
Figure 3-11. DAC80502 Tab of the High Level Configuration Page
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4 Hardware Design Files
4.1 Schematics
The DAC80502-01EVM schematics are shown in Figure 4-1 through Figure 4-2.
VBUS 1
D- 2
D+ 3
ID 4
GND 5
67 8
11 10
9
J3
L1
10.0
R2
10.0
R3
GND GND GND GND GND GND
GND GND
USB_DM_N
USB_DP_P
100nF
C6
100nF
C10
5V_USB
GND
GND
3p3V
IN
1
2
EN
3NC 4
OUT 5
GND
TPS72118DBVRU3
GND
GND
1p8V
5V -> 3.3V 3.3V -> 1.8V
EECS
1
VCORE
2
OSCI
3
OSCO
4
VPHY
5
REF
6
DM
7
DP
8
VPLL
9
TEST
10
RESET
11
ADBUS0 12
ADBUS1 13
ADBUS2 14
ADBUS3 15
VCCIO
16
ADBUS4 17
ADBUS5 18
ADBUS6 19
ADBUS7 20
GND 21
BDBUS0 22
BDBUS1 23
BDBUS2 24
BDBUS3 25
BDBUS4 26
BDBUS5 27
BDBUS6 28
BDBUS7 29
SUSPEND
30
VCORE
31
CDBUS0 32
CDBUS1 33
CDBUS2 34
CDBUS3 35
VCCIO
36
CDBUS4 37
CDBUS5 38
CDBUS6 39
CDBUS7 40
GND 41
DDBUS0 42
VREGOUT
43
VREGIN
44
GND 45
DDBUS1 46
DDBUS2 47
DDBUS3 48
DDBUS4 49
VCCIO
50
DDBUS5 51
DDBUS6 52
DDBUS7 53
PWREN
54
EEDATA
55 EECLK
56
PAD 57
U5
FT4232H-56Q-TRAY
USB_DM_N
USB_DP_P
GND
GND
470nF
C9
47.0k
R5
12.0k
R4
GND
GND
0
R7
20pF
C11
20pF
C12
1.00M
R6
FTDI_XSCI
FTDI_XSCO
TP1
3.3V
TP2
1.8V
FTDI_SCLK
FTDI_PICO
FTDI_CS_1
FTDI_CS_2
GND GND GND
TP5
GND
TP6
GND
TP7
GND
1p8V GND
FTDI_CS_2
FTDI_CS_1
VDD
100nF
C3
GND
100nF
C4
GND
DUT_SCLK
DUT_PICO
DUT_CS_2
3p3V
3p3V
3p3V
3p3V
12
D1
12
D2
12
D3
FTDI_PICO
TP8
GND
4.7µF
C1
4.7µF
C2
4.7µF
C5
100nF
C7
100nF
C8
VDD3p3V
GND
1
2
J1
FTDI DIS
FTDI_DIS
GND
10k
R1
3p3V
1 2
Y1
TP4
AD6
SH1
OUT 5
GND 2
NC 4
EN
3
IN
1
TLV75533PDBVR
U8
GND
F1
5V_USB
TP3
5V_USB
1
2
3
4
5
J2
TRIGGER
GND
FTDI_DIS
FTDI_DIS
FTDI_SDA_IN
FTDI_SDA_OUT
FTDI_SCL
FTDI_SCL
FTDI_SDA_OUT
FTDI_SDA_IN
2 4
SN74LVC1G07QDBVRQ1
U6A
NC
1
GND 3 VCC
5
SN74LVC1G07QDBVRQ1
U6B
VDD GND
DUT_SCL
DUT_SDA
100nF
C16
GND
VCCA
1
A1
2
A2
3
A3
4
A4
5
OE
12
VCCB 11
B1Y 10
B3Y 8
GND 6
B2Y 9
B4Y 7
TXU0104RUT
U4
DUT_CS_1
FTDI_SCLK
A1
2
A2
3
A3
4
A4Y
5
OE
12
VCCA
1
B1Y 10
B2Y 9
B3Y 8
B4 7
GND 6
VCCB 11
TXU0304RUT
U10
GND
Figure 4-1. DAC80502-01EVM FTDI Schematic
VIN
2
TEMP
3GND 4
TRIM/NR 5
VOUT 6
REF5025AID
U7A
GND
100nF
C25
GND
GND
J4
VDD
J7
GND
10uF
C13
TP9
VDD
VDD
NC 7
DNC 1
DNC 8
REF5025AID
U7B
GND
TP11
U1 VREF
1
2
J12
U1 VREF = 2.5V
VREF_1
GND VDD
10nF
C17
1k
R8
10nF
C18
1k
R9
10nF
C19
1k
R10
SH4
1 2
3 4
J6
VDD SEL
VDD5V_USB
3p3V
SH3
GND
0R16
0R17
0R18
1
2
3
J8
I2C-SPI
1
2
3
J11
I2C-SPI
SCLK_SCL
DUT_SCLK
SCL
SDIN_SDA
DUT_PICO
SDA
SYNC_A0DUT_CS_1
VDD
1
2
3
J5
I2C-SPI
SPI2C
GND
VDD
VDD
SDA
SCL
SYNC_A1DUT_CS_2
VDD
SDA
SCL
100
R11
SCLK_SCL
SDIN_SDA
SYNC_A0
GND
VDD DAC0
SPI2C
VREF_1
GND
VDD
1VOUTA 2
RSTSEL 3
AGND 4
VREFIO 10
SCLK/SCL
6
SYNC/A0
7
VOUTB 9
SPI2C
5
SDIN/SDA
8
DAC80502DRX
U2
SCLK_SCL
SDIN_SDA
SYNC_A1
SPI2C
GND
VDD
GND
VREF_2
DUT_SCLK
DUT_PICO
DUT_CS_1
DUT_CS_2
DUT_SDA
DUT_SCL
DAC1
DAC2
DAC0
DAC1
DAC2
VDD
RSTSEL
GND
VDD
RSTSEL
1
2
J10
U2 VREF = 2.5V
100
R14
100nF
C20
GND
TP10
U2 VREF
VREF_2
SH2
SH9
SH5
SH6
SH7
SH8
SH10
SPI2C
SDIN_SDA
SYNC_A1
SYNC_A0
1
2
J19
RST Select
1
2 3 4 5
J9
0R15
GND
0R19
1
2
3
4
5
J17
1
2
3
4
5
J18
GND
10k R20
GND
SCLK_SCL
1
2
3
4
5
J21
VOUT0
VOUT1
VOUT2
VOUT0
VOUT1
VOUT2
GND
GND
TP12
GND
10pF
C21
GND
TP14
100nF
C14
100nF
C15
2.00k
R13
2.00k
R12
SPI = GROUND. this is correct on the layout page.
12
34
56
78
910
J13
U1 A0 Select
12
34
56
78
910
J14
U2 A0 Select
1 2
3 4
5 6
7 8
9 10
J15
DIGITAL
1 2
3 4
5 6
J16
61300621121
VDD
1
SYNC/A0
6
SCLK/SCL
5
SDIN/SDA
7
SPI2C
4
VOUT 2
VREFIO 8
AGND 3
DAC80501ZDQFT
U1
1µF
C26
6.3V
22µF
C27
1µF
C22
Figure 4-2. DAC80502-01EVM DUT Schematic
Hardware Design Files www.ti.com
18 DAC80502-01 Evaluation Module SLAU919 – NOVEMBER 2023
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4.2 PCB Layout
Figure 4-3 through Figure 4-6 show the board layout for the DAC80502-01EVM.
Figure 4-3. DAC80502-01EVM PCB Top Layer Layout
Figure 4-4. DAC80502-01EVM PCB Mid Layer 1 Layout (Ground Plane)
www.ti.com Hardware Design Files
SLAU919 – NOVEMBER 2023
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DAC80502-01 Evaluation Module 19
Copyright © 2023 Texas Instruments Incorporated

Figure 4-5. DAC80502-01EVM PCB Mid Layer 2 Layout (Power Plane)
Figure 4-6. DAC80502-01EVM PCB Bottom Layer Layout
Hardware Design Files www.ti.com
20 DAC80502-01 Evaluation Module SLAU919 – NOVEMBER 2023
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Copyright © 2023 Texas Instruments Incorporated