Texas Instruments TPSF12C3QEVM User manual

User’s Guide
TPSF12C3QEVM Active EMI Filter Evaluation Module for
Three-Phase AC Power Systems
ABSTRACT
The TPSF12C3QEVM evaluation module (EVM) is specifically designed to conveniently evaluate the
performance of the TPSF12C3-Q1 power-supply active filter IC. The solution helps to substantially reduce the
total size of the common-mode (CM) electromagnetic interference (EMI) filter in three-phase AC power systems,
either with or without a neutral connection.
The TPSF12C3-Q1 provides a very low impedance path for CM noise in the frequency range of interest for EMI
measurement and helps to meet prescribed limits for international EMI standards, such as:
• CISPR 11, EN 55011 – Industrial, Scientific and Medical (ISM) applications
• CISPR 25, EN 55025 – Automotive applications
• CISPR 32, EN 55032 – Multimedia applications
• MIL-STD-461 – Military and defense applications
• RTCA DO-160 – Airborne applications
Enabling up to 25 dB of CM noise reduction at the lower end of specified frequency ranges (for example,
150 kHz to 3 MHz) significantly reduces the size, cost and weight of the common-mode filter implementation,
specifically the common-mode chokes. The device senses the high-frequency noise on each power line using
a set of sense capacitors and injects noise-canceling currents back into the power lines using an injection
capacitor.
A header on the EVM provides connections to the sense and inject capacitors, which are high-voltage rated
components located off-board at or near the passive filter solution. Also included on the EVM are connections for
the bias power supply (VDD and GND), which is set between 8 V and 16 V, and a remote enable (EN) signal.
The GND terminal of the EVM refers to the chassis or Earth ground of the system.
Note
The damping and compensation component values included with this EVM can require modification,
depending on the specifics of the EMI filter implementation and the target application. Refer to the
TPSF12C3-Q1 Standalone Active EMI Filter for Common-mode Noise Mitigation in Three-Phase
AC Automotive Power Systems data sheet and TPSF12C3-Q1 quickstart calculator for additional
guidance pertaining to AEF circuit operation, passive component selection and expected EMI
performance.
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Table of Contents
1 High-Density EVM Description.............................................................................................................................................. 3
1.1 Typical Applications............................................................................................................................................................3
1.2 Features and Electrical Performance.................................................................................................................................3
2 EVM Performance Specifications..........................................................................................................................................4
3 EVM Photo...............................................................................................................................................................................5
4 EVM Setup, Connections and Validation..............................................................................................................................6
4.1 EVM Setup......................................................................................................................................................................... 6
4.2 EVM Connections.............................................................................................................................................................. 7
4.3 EVM Performance Validation............................................................................................................................................. 8
5 Test Data and Performance Curves...................................................................................................................................... 9
5.1 EMI Performance............................................................................................................................................................... 9
5.2 Surge Immunity.................................................................................................................................................................. 9
6 EVM Documentation............................................................................................................................................................. 11
6.1 Schematic.........................................................................................................................................................................11
6.2 Bill of Materials.................................................................................................................................................................12
6.3 PCB Layout...................................................................................................................................................................... 13
6.4 Assembly Drawings..........................................................................................................................................................16
6.5 Multi-Layer Stackup......................................................................................................................................................... 17
7 Device and Documentation Support...................................................................................................................................18
7.1 Device Support.................................................................................................................................................................18
7.2 Documentation Support................................................................................................................................................... 18
List of Figures
Figure 3-1. TPSF12C3QEVM Photo............................................................................................................................................5
Figure 4-1. EVM Setup Schematic for a Three-Phase, Four-Wire System................................................................................. 6
Figure 4-2. EVM Setup Schematic for a Three-Phase, Three-Wire System............................................................................... 7
Figure 5-1. CM Conducted Emissions with AEF Enabled (Blue) and Disabled (Red).................................................................9
Figure 5-2. IEC 61000-4-5 Positive Surge, 5-kV Single Strike – 1 µs/div (a), 200 µs/div (b).......................................................9
Figure 5-3. IEC 61000-4-5 Negative Surge, 5-kV Single Strike – 1 µs/div (a), 200 µs/div (b).....................................................9
Figure 5-4. IEC 61000-4-5 Surge, 5-kV Repetitive Strike at 10-Second Intervals – Positive (a), Negative (b)......................... 10
Figure 6-1. EVM Schematic....................................................................................................................................................... 11
Figure 6-2. 3D Top View............................................................................................................................................................ 13
Figure 6-3. 3D Bottom View.......................................................................................................................................................13
Figure 6-4. Top Layer Copper....................................................................................................................................................14
Figure 6-5. Layer 2 Copper........................................................................................................................................................14
Figure 6-6. Layer 3 Copper........................................................................................................................................................15
Figure 6-7. Bottom Layer Copper (Viewed From Top)...............................................................................................................15
Figure 6-8. Top Assembly (Top View)........................................................................................................................................ 16
Figure 6-9. Bottom Assembly (Bottom View).............................................................................................................................16
Figure 6-10. Layer Stackup....................................................................................................................................................... 17
List of Tables
Table 2-1. Electrical Performance Specifications.........................................................................................................................4
Table 4-1. EVM Header Connections.......................................................................................................................................... 6
Table 6-1. EVM Component BOM............................................................................................................................................. 12
Table 6-2. Sense and Inject Capacitors (Not Supplied)............................................................................................................. 12
Trademarks
HotRod ™ is a trademark of Texas Instruments.
All trademarks are the property of their respective owners.
Table of Contents www.ti.com
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1 High-Density EVM Description
The TPSF12C3QEVM features the TPSF12C3-Q1 active EMI filter (AEF) IC designed to reduce common-mode
(CM) electromagnetic interference (EMI) in three-phase AC power systems. The AEF solution configured with
voltage sense and current inject (VSCI) uses a capacitive multiplier circuit to emulate the Y-capacitors in a
conventional passive filter design. The device senses the CM voltage disturbance on the power lines of a
three-phase, three-wire or four-wire system using a set of sense capacitors and injects a noise-canceling current
back into the power lines using an injection capacitor. The effective active capacitance is set by the AEF circuit
gain and the injection capacitance. The AEF sensing and injection impedances use relatively low capacitance
values with small component footprints – no magnetic components required. The device includes integrated
filtering, compensation and protection circuitry, and an enable input.
The TPSF12C3-Q1 provides a very low impedance path for CM noise in the frequency range of interest for
EMI measurement. Enabling up to 25 dB of CM noise reduction at the lower end of specified frequency ranges
(for example, 100 kHz to 3 MHz) significantly reduces the footprint, volume, weight and cost of the CM filter
implementation, especially the CM choke components that are designed to attenuate lower-order harmonics
– and hence are large size. The resultant lower size of the CM chokes implies reduced parasitic winding
capacitance, which serves to improve attenuation at high frequencies.
Acting as a daughter board, this low-voltage EVM provides a header to facilitate easy connection to the EMI filter
passive components, which typically includes the common-mode chokes and Y-capacitors. The header terminals
provide connections to:
• Four sense capacitors
• An inject capacitor
• VDD bias supply: 8 V to 16 V (typical 12 V)
• A remote ON, OFF signal
• Chassis ground
The recommended PCB layout minimizes overall noise signature and required board area.
1.1 Typical Applications
•On-board charger (OBC) for electric vehicles
•Welders and other industrial systems
• Three-phase AC/DC regulators for servers and telecom
•Inverters and motor drives
1.2 Features and Electrical Performance
• Improved common-mode EMI performance for applications with three-phase AC inputs
– Helps to meet EMI standards, such as CISPR 11 and CISPR 32 Class B (for ISM and multimedia
applications, respectively) or CISPR 25 Class 5 (for automotive)
– Voltage-sense, current-inject AEF solution presents low impedance over the EMI frequency range
• Up to 25 dB reduction in the common-mode EMI signature from 100 kHz to 3 MHz
• Reduces the size, weight and cost of the common-mode chokes
• Simple external configuration for three-phase AC power systems
– Integrated sensing filter and summing network
– Low Y-capacitor touch current at line frequency maintains safety
– Simplified compensation network
• Inherent protection features for robust and reliable design
– Withstands 5-kV surge with minimal external component count
• Helps meet IEC 61000-4-5 surge immunity specification when operating in the electrical installation
• Integrated surge protection at the SENSE inputs
– Wide supply voltage (VDD) range of 8 V to 16 V, nominally 12 V
• VDD undervoltage lockout (UVLO) set to turn on and off at 7.7 V and 6.7 V, respectively
– 175°C thermal shutdown protection with hysteresis
– Integrated pullup resistor from VDD to EN allows use of an open-drain/collector device for disable function
• Fully assembled, tested and proven 4-layer PCB design with total footprint of 1" × 0.8" (25.4 mm × 20.3 mm)
• The EVM includes a right-angle header for easy hookup to an EMI filter board
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2 EVM Performance Specifications
Unless otherwise indicated, VVDD = 12 V.
Table 2-1. Electrical Performance Specifications
PARAMETER CONDITIONS MIN TYP MAX UNIT
INPUT CHARACTERISTICS
Supply voltage, VVDD (1) Operating range 8 12 16
V
UVLO turn-on threshold, VVDD-UV-R VVDD rising 7.7
UVLO turn-off threshold, VVDD-UV-F VVDD falling 6.7
UVLO hysteresis, VVDD-UV-HYS 1
Supply current, disabled, IVDD-OFF EN tied to GND 50 µA
Supply current, enabled, IVDD-ON EN open 12.5 mA
OUTPUT CHARACTERISTICS
Inject voltage, VINJ Operating range 2 VVDD – 2 V
Inject current, IINJ VVDD = 8 V to 16 V –80 80 mA
SYSTEM CHARACTERISTICS
EMI reduction(2) 100 kHz to 3 MHz 25 dB
Ambient temperature, TA–40 105 °C
Junction temperature, TJ–40 150
(1) The nominal supply voltage (relative to chassis GND) of this EVM is 12 V.
(2) The expected EMI reduction with this EVM is approximately 25 dB (device enabled vs. disabled) when swept from 100 kHz to 3 MHz.
This performance metric can change based on the operating supply voltage, ambient temerature, passive filter component values,
compensation and damping component values, and other parameters.
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3 EVM Photo
Figure 3-1 highlights the AEF solution and the connection interface using header J1 to the EMI filter in the
application circuit. S1, S2, S3 and S4 connect to the sense capacitors, and INJ connects to the inject capacitor.
GND is tied to Earth or chassis ground of the system.
Figure 3-1. TPSF12C3QEVM Photo
CAUTION
Caution Hot surface.
Contact may cause burns.
Do not touch.
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4 EVM Setup, Connections and Validation
4.1 EVM Setup
Referencing the header connections described in Table 4-1, use the recommended setup from the schematic
of Figure 4-1 to evaluate the performance of the TPSF12C3-Q1 in a three-phase, four-wire system. The AEF
circuit effectively replaces the Y-capacitors normally placed between the CM chokes (and tied from power lines
to chassis ground) in a conventional 2-stage, 4th-order CLCL fully passive CM filter design.(1) (2)
VDD
NC
COMP1
COMP2
IGND
INJ
NC
EN
NC
REFGND
SENSE1
SENSE2
SENSE3
SENSE4
TI standalone active EMI filter EVM
Chassis (PE)
To enable the IC, leave EN open or
connect it to VDD using a jumper
Chassis-referred bias power supply
CSEN2 CINJ
CSEN1
Y-rated sense and
inject capacitors
Voltage range: 8 V to 16 V
Current rating: 50 mA max.
S2 S1
GND
INJ VDD
EN
S4 S3
J1
CSEN3
CSEN4
LCM1-AEF LCM2-AEF
CX1
CX2
CX3
CX7
CX8
CX9
CX4
CX5
CX6
CY1 CY2 CY3 CY4
AC/DC
regulator
Chassis
AC
source
L1
L2
L3
N
PE
= AC/DC regulator
= Three-phase AEF IC
Y-rated sense and
inject capacitors
= 8-pin header
= Three-phase AC source
with neutral
=
Figure 4-1. EVM Setup Schematic for a Three-Phase, Four-Wire System
Table 4-1. EVM Header Connections
POSITION(3) LABEL DESCRIPTION
1 S4 Sense 4 input – connect to a Y-rated sense capacitor, CSEN4 (or connect to GND in a system without neutral)
2 S3 Sense 3 input – connect to a Y-rated sense capacitor, CSEN3
3 S2 Sense 2 input – connect to a Y-rated sense capacitor, CSEN2
4 S1 Sense 1 input – connect to a Y-rated sense capacitor, CSEN1
5 GND Ground – connect to the chassis ground of the system
6 INJ Inject output – connect to a Y-rated inject capacitor, CINJ
7 VDD Supply voltage connection – connect to a 12-V bias power supply referenced to GND
8 EN Enable input – leave open or tie high to enable the IC; tie to GND to disable
(1) Refer to the TPSF12C3-Q1 data sheet for absolute maximum and operating ratings associated with the features of this IC.
(2) Working at an ESD-protected workstation, ensure that any wrist straps, bootstraps or mats are connected and referencing the user to
Earth ground before power is applied to the EVM.
(3) Pin positions of header J1 designate left to right when viewed from the top side of the EVM.
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Alternatively, for a three-wire system without neutral, connect S4 to GND and tie the inject capacitor to the
star-point of X-capacitors CX4, CX5, CX6 as shown in Figure 4-2.
VDD
NC
COMP1
COMP2
IGND
INJ
NC
EN
NC
REFGND
SENSE1
SENSE2
SENSE3
SENSE4
TI standalone active EMI filter EVM
Chassis (PE)
To enable the IC, leave EN open or
connect it to VDD using a jumper
Chassis-referred bias power supply
CSEN2 CINJ
CSEN1
Y-rated sense and
inject capacitors
Voltage range: 8 V to 16 V
Current rating: 50 mA max.
S2 S1
GND
INJ VDD
EN
S4 S3
J1
CSEN3
LCM1-AEF LCM2-AEF
CX1
CX2
CX3
CX7
CX8
CX9
CX4
CX5
CX6
CY1 CY2 CY3
AC/DC
regulator
Chassis
AC
source
L1
L2
L3
PE
= AC/DC regulator
= Three-phase AEF IC
Y-rated sense and
inject capacitors
= 8-pin header
= Three-phase AC source
(no neutral)
=
Figure 4-2. EVM Setup Schematic for a Three-Phase, Three-Wire System
An AC/DC regulator as shown in Figure 4-1 and Figure 4-2 represents a typical three-phase regulator and
is drawn here for illustrative purposes. The setup is essentially agnostic to regulator topology. Note that
the appropriate three-phase LISN connects between the input source and the EMI filter for conducted EMI
measurement. To accurately benchmark the AEF circuit performance in terms of CM noise reduction, use a
three-phase DM/CM separator at the LISN outputs to extract the CM noise signature from the total noise
measurement.
The EVM daughter-card mounts to the main EMI filter solution. As illustrated in Figure 4-1 and Figure 4-2,
an 8-pin right-angle header, part number TSW-108-08-G-S-RA, connects the EVM to a corresponding female
receptacle, part number SSW-108-01-G-S, which mounts on the EMI filter board that carries the passive filter
components – CM chokes and Y-capacitors – as well as the sense and inject capacitors. Both header and
receptacle, manufactured by Samtec, are included with the EVM. See Bill of Materials.
4.2 EVM Connections
As highlighted in Table 4-1, header J1 provides an interface from the EVM to the EMI filter board with access to
the following terminals: S1, S2, S3, S4, GND, INJ, VDD and EN.
Connect sense pins S1, S2, S3 and S4 to the four sense capacitors, designated as CSEN1, CSEN2, CSEN3 and
CSEN4 in Figure 4-1. Connect the opposite terminals of the sense capacitors to the L1, L2, L3 and NEUTRAL
lines between the CM chokes, LCM1 and LCM2. The connections are similar for a three-wire system where the
neutral is unavailable, except S4 is tied to GND as shown in Figure 4-2.
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Connect INJ to the inject capacitor, CINJ, whose opposite terminal then connects to the NEUTRAL line (or to the
X-capacitor star-point for a three-wire system). The X-capacitors at this position set a low impedance between
the power lines from a CM standpoint – this means that a single inject capacitor is adequate for AEF current
injection. Finally, connect a nominal 12-V bias supply from VDD to GND to power the AEF circuit.
4.3 EVM Performance Validation
1. Before plugging in the EVM to the EMI filter board, connect the bottom terminals of the sense and inject
Y-caps to GND (Earth or chassis ground connection).
2. Turn the regulator ON. Perform measurements of the common-mode and total EMI to benchmark the
existing passive filter solution. Extract the common-mode component using a DM/CM separator between the
LISN and EMI test receiver.
3. Turn the regulator OFF. Wait for all high-voltage capacitors to fully discharge.
4. Plug in the EVM to the main filter board.
5. Apply a VDD bias supply voltage of 8 V to 16 V (nominal 12 V) with ripple voltage less than 50 mV
peak-to-peak.
6. Probe the INJ pin of the EVM with respect to GND – it must be stable with a DC level of VVDD/2. If the INJ
pin voltage is oscillating, some of the passive components on the EVM must be modified.
7. If the INJ pin voltage is stable, turn the regulator ON. Repeat the measurements for common-mode and total
EMI.
8. Power down the regulator and EVM.
9. If the EMI measurement in step 5 is lower compared to the result in step 2, the AEF circuit functions
correctly. Conversely, if the EMI measurement in step 5 is NOT lower than that from step 2, probe the INJ pin
voltage while the regulator is operational. Ensure that the INJ pin voltage is not getting clipped close to the
positive or negative supply rails (within 2 V of each rail).
• If the INJ pin voltage is getting clipped, increase the inject capacitance or the regulator-side Y-
capacitance values.
Note
The sense and inject capacitors are Y-rated components supplied by the user, and the EVM as
provided is essentially a low-voltage design. Typical values for the sense and inject capacitances
are 680 pF and 4.7 nF, respectively. Depending on the EMI filter implementation in the target
application, the default damping and compensation component values installed on the EVM can
require suitable modification by the user to achieve acceptable loop stability. Check the variation
of effective capacitance values (of the inject capacitor in particular) over the applicable operating
temperature range.
Refer to the TPSF12C3-Q1 Standalone Active EMI Filter for Common-mode Noise Mitigation in
Three-Phase AC Automotive Power Systems data sheet and TPSF12C3-Q1 quickstart calculator for
additional context pertaining to EVM component selection and optimization.
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5 Test Data and Performance Curves
Because actual performance data can be affected by measurement techniques and environmental variables,
these curves are presented for reference and can differ from actual field measurements. Unless otherwise
indicated, VVDD = VEN = 12 V.
5.1 EMI Performance
See the Schematic and Bill of Materials for details of the EVM components for this measurement.
Figure 5-1. CM Conducted Emissions with AEF Enabled (Blue) and Disabled (Red)
5.2 Surge Immunity
VLINE 500 V/DIV
VSENSE1 10 V/DIV
ISENSE1 2 A/DIV
VINJ-C 20 V/DIV
1 µs/DIV
INJ TVS diode clamps
SENSE internal
protection clamps
VLINE 500 V/DIV
VSENSE1 10 V/DIV
ISENSE1 2 A/DIV
VINJ-C 20 V/DIV
200 µs/DIV
Negative undershoot
eventually decays
INJ TVS diode clamps
SENSE internal
protection clamps
(a) (b)
Figure 5-2. IEC 61000-4-5 Positive Surge, 5-kV Single Strike – 1 µs/div (a), 200 µs/div (b)
(a) (b)
INJ TVS diode clamps
SENSE internal
protection clamps
INJ TVS diode clamps
SENSE internal
protection clamps
Positive overshoot
eventually decays
VLINE 500 V/DIV
VINJ-C 20 V/DIV
VSENSE1 10 V/DIV
ISENSE1 2 A/DIV
1 s/DIV
VLINE 500 V/DIV
VINJ-C 20 V/DIV
VSENSE1 10 V/DIV
ISENSE1 2 A/DIV
200 s/DIV
Figure 5-3. IEC 61000-4-5 Negative Surge, 5-kV Single Strike – 1 µs/div (a), 200 µs/div (b)
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VLINE 500 V/DIV
ISENSE1 2 A/DIV
IINJ 10 A/DIV
VSENSE1 10 V/DIV
10 s/DIV
(a) (b)
VLINE 500 V/DIV
ISENSE1 2 A/DIV
IINJ 10 A/DIV
VSENSE1 10 V/DIV
10 s/DIV
Figure 5-4. IEC 61000-4-5 Surge, 5-kV Repetitive Strike at 10-Second Intervals – Positive (a), Negative (b)
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6 EVM Documentation
6.1 Schematic
Figure 6-1 shows the EVM schematic.
IGND
VDD
SEN1
SEN2
SEN3
SEN4
INJ1
IGND
200
R4
1.00k
R3
49.9
R2
1.50k
R5
698
R1
EN
COMP1
COMP2
INJECT
SOD-323
5.5V
D1
STS321050B331
SEN4 SEN3 SEN2 SEN1
IGND IGND IGND IGND
SENSE TVS DIODES
5.5V Breakdown Voltage
SOD-323
5.5V
D2
STS321050B331
SOD-323
5.5V
D3
STS321050B331
SOD-323
5.5V
D4
STS321050B331
SOD-323
26.7V
D5
INJ1
STS321240B301
IGND
INJECT TVS DIODES
26.7V Breakdown Voltage
10pF
C7
C5
1µF
10pF
C4
SEN2
SEN4
SEN3
SEN1
VDD
EN
INJ1
IGND
4.7nF
C1
SENSE1
4
SENSE2
5
SENSE3
6
SENSE4
7
11 COMP2
COMP1
10
VDD 2
EN
8
IGND 14
INJ 13
NC 1
NC 3
NC 12
REFGND 9
U1
TPSF12C3QDYYRQ1
10nF
C6
22nF
C3
1
2
3
4
5
6
7
8
J1
8.2nF
C2
Figure 6-1. EVM Schematic
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6.2 Bill of Materials
Table 6-1. EVM Component BOM
REF DES QTY VALUE DESCRIPTION PACKAGE PART NUMBER MANUFACTURER
C1 1 4.7 nF CAP, CERM, 4.7 nF, 50 V, X7R 0603 C0603C472J5RACTU Kemet
C2 1 8.2 nF CAP, CERM, 8.2 nF, 50 V, X7R 0603 GRM188R71H822KA01D MuRata
C3 1 22 nF CAP, CERM, 22 nF, 50 V, X7R 0603 C0603C223K5RACTU Kemet
C5 1 1 µF CAP, CERM, 1 µF, 25 V, X7R 0603 CGA3E1X7R1E105K080AC TDK
C6 1 10 nF CAP, CERM, 10 nF, 50 V, X7R 0603 C0603X103K5RACTU Kemet
C7 1 10 pF CAP, CERM, 10 pF, 50 V, C0G/NP0 0603 CGA3E2C0G1H100D080AA TDK
D3 1 24 V TVS diode ESD suppressor, 50 V at 8 A SOD-323 STS321240B301 Eaton
J1 1 — Header, 100 mil, 8 × 1, Gold, R/A, TH – TSW-108-08-G-S-RA Samtec
J2 1 — Receptacle, 8 × 1, 2.54 mm, Gold, TH – SSW-108-01-G-S Samtec
R1 1 698 Ω RES, 698 Ω, 1%, 0.1 W 0603 CRCW0603698RFKEA Vishay-Dale
R2 1 49.9 Ω RES, 49.9 Ω, 1%, 0.1 W 0603 CRCW060349R9FKEA Vishay-Dale
R3 1 1 kΩ RES, 1 kΩ, 1%, 0.1 W 0603 CRCW06031K00FKEA Vishay-Dale
R4 1 200 Ω RES, 200 Ω, 1%, 0.1 W 0402 CRCW0603200RFKEA Vishay-Dale
R5 1 1.5 kΩ RES, 1.5 kΩ, 1%, 0.1 W 0402 CRCW06031K50FKEA Vishay-Dale
U1 1 — TPSF12C3-Q1 common-mode AEF IC TSOT23-14 TPSF12C3QDYYRQ1 Texas Instruments
Table 6-2. Sense and Inject Capacitors (Not Supplied)
REF DES QTY VALUE DESCRIPTION PACKAGE PART NUMBER MANUFACTURER
CSEN1, CSEN2, CSEN3,
CSEN4
4 680 pF CAP, CERM, 680 pF, 300 VAC, Y2 Disc DE2B3SA681KN3AX02F MuRata
CINJ 1 4.7 nF CAP, CERM, 4.7 nF, 300 VAC, Y2 Disc DE2E3SA472MA3BX02F MuRata
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6.3 PCB Layout
Figure 6-2 through Figure 6-7 show the PCB layout images, including 3D views, copper layers, assembly
drawings, and layer stackup diagram. The PCB is 62-mils standard thickness with 1-oz copper on all layers.
Figure 6-2. 3D Top View
Figure 6-3. 3D Bottom View
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Figure 6-4. Top Layer Copper
Figure 6-5. Layer 2 Copper
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Figure 6-6. Layer 3 Copper
Figure 6-7. Bottom Layer Copper (Viewed From Top)
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6.4 Assembly Drawings
Figure 6-8. Top Assembly (Top View)
Figure 6-9. Bottom Assembly (Bottom View)
EVM Documentation www.ti.com
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6.5 Multi-Layer Stackup
Figure 6-10. Layer Stackup
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7 Device and Documentation Support
7.1 Device Support
7.1.1 Development Support
For development support see the following:
• TPSF12C3-Q1 Quickstart calculator
• TPSF12C3-Q1 EVM Altium layout source files
• TPSF12C3-Q1 PSPICE for TI and SIMPLIS simulation models
• TPSF12C1-Q1 EVM user's guide
• For TI's reference design library, visit TI Reference Design library
• To design a low-EMI power supply, review TI's comprehensive EMI Training Series
• TI Reference Designs:
–Automotive wide VIN front-end reference design for digital cockpit processing units
• Technical Articles:
– Texas Instruments, How to reduce EMI and shrink power-supply size with an integrated active EMI filter
– Texas Instruments, How device-level features and package options can help minimize EMI In automotive
designs
– Texas Instruments, How to use slew rate for EMI control
• To view a related device of this product, see the TPSF12C1-Q1 single-phase active EMI filter for common-
mode EMI mitigation
7.2 Documentation Support
7.2.1 Related Documentation
For related documentation, see the following:
• Texas Instruments, An Engineer's Guide To EMI In DC/DC Regulators e-book
• Texas Instruments, Enhanced HotRod ™ QFN Package: Achieving Low EMI Performance in Industry’s
Smallest 4-A Converter application report
• Texas Instruments, Designing High Performance, Low-EMI, Automotive Power Supplies application report
• Texas Instruments, EMI Filter Components And Their Nonidealities For Automotive DC/DC Regulators
technical brief
• Texas Instruments, AN-2162 Simple Success With Conducted EMI From DC/DC Converters Application
Report application report
• Texas Instruments, Simplify Low EMI Design with Power Modules white paper
Device and Documentation Support www.ti.com
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STANDARD TERMS FOR EVALUATION MODULES
1. Delivery: TI delivers TI evaluation boards, kits, or modules, including any accompanying demonstration software, components, and/or
documentation which may be provided together or separately (collectively, an “EVM” or “EVMs”) to the User (“User”) in accordance
with the terms set forth herein. User's acceptance of the EVM is expressly subject to the following terms.
1.1 EVMs are intended solely for product or software developers for use in a research and development setting to facilitate feasibility
evaluation, experimentation, or scientific analysis of TI semiconductors products. EVMs have no direct function and are not
finished products. EVMs shall not be directly or indirectly assembled as a part or subassembly in any finished product. For
clarification, any software or software tools provided with the EVM (“Software”) shall not be subject to the terms and conditions
set forth herein but rather shall be subject to the applicable terms that accompany such Software
1.2 EVMs are not intended for consumer or household use. EVMs may not be sold, sublicensed, leased, rented, loaned, assigned,
or otherwise distributed for commercial purposes by Users, in whole or in part, or used in any finished product or production
system.
2Limited Warranty and Related Remedies/Disclaimers:
2.1 These terms do not apply to Software. The warranty, if any, for Software is covered in the applicable Software License
Agreement.
2.2 TI warrants that the TI EVM will conform to TI's published specifications for ninety (90) days after the date TI delivers such EVM
to User. Notwithstanding the foregoing, TI shall not be liable for a nonconforming EVM if (a) the nonconformity was caused by
neglect, misuse or mistreatment by an entity other than TI, including improper installation or testing, or for any EVMs that have
been altered or modified in any way by an entity other than TI, (b) the nonconformity resulted from User's design, specifications
or instructions for such EVMs or improper system design, or (c) User has not paid on time. Testing and other quality control
techniques are used to the extent TI deems necessary. TI does not test all parameters of each EVM.
User's claims against TI under this Section 2 are void if User fails to notify TI of any apparent defects in the EVMs within ten (10)
business days after delivery, or of any hidden defects with ten (10) business days after the defect has been detected.
2.3 TI's sole liability shall be at its option to repair or replace EVMs that fail to conform to the warranty set forth above, or credit
User's account for such EVM. TI's liability under this warranty shall be limited to EVMs that are returned during the warranty
period to the address designated by TI and that are determined by TI not to conform to such warranty. If TI elects to repair or
replace such EVM, TI shall have a reasonable time to repair such EVM or provide replacements. Repaired EVMs shall be
warranted for the remainder of the original warranty period. Replaced EVMs shall be warranted for a new full ninety (90) day
warranty period.
WARNING
Evaluation Kits are intended solely for use by technically qualified,
professional electronics experts who are familiar with the dangers
and application risks associated with handling electrical mechanical
components, systems, and subsystems.
User shall operate the Evaluation Kit within TI’s recommended
guidelines and any applicable legal or environmental requirements
as well as reasonable and customary safeguards. Failure to set up
and/or operate the Evaluation Kit within TI’s recommended
guidelines may result in personal injury or death or property
damage. Proper set up entails following TI’s instructions for
electrical ratings of interface circuits such as input, output and
electrical loads.
NOTE:
EXPOSURE TO ELECTROSTATIC DISCHARGE (ESD) MAY CAUSE DEGREDATION OR FAILURE OF THE EVALUATION
KIT; TI RECOMMENDS STORAGE OF THE EVALUATION KIT IN A PROTECTIVE ESD BAG.

www.ti.com
2
3Regulatory Notices:
3.1 United States
3.1.1 Notice applicable to EVMs not FCC-Approved:
FCC NOTICE: This kit is designed to allow product developers to evaluate electronic components, circuitry, or software
associated with the kit to determine whether to incorporate such items in a finished product and software developers to write
software applications for use with the end product. This kit is not a finished product and when assembled may not be resold or
otherwise marketed unless all required FCC equipment authorizations are first obtained. Operation is subject to the condition
that this product not cause harmful interference to licensed radio stations and that this product accept harmful interference.
Unless the assembled kit is designed to operate under part 15, part 18 or part 95 of this chapter, the operator of the kit must
operate under the authority of an FCC license holder or must secure an experimental authorization under part 5 of this chapter.
3.1.2 For EVMs annotated as FCC – FEDERAL COMMUNICATIONS COMMISSION Part 15 Compliant:
CAUTION
This device complies with part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) This device may not
cause harmful interference, and (2) this device must accept any interference received, including interference that may cause
undesired operation.
Changes or modifications not expressly approved by the party responsible for compliance could void the user's authority to
operate the equipment.
FCC Interference Statement for Class A EVM devices
NOTE: This equipment has been tested and found to comply with the limits for a Class A digital device, pursuant to part 15 of
the FCC Rules. These limits are designed to provide reasonable protection against harmful interference when the equipment is
operated in a commercial environment. This equipment generates, uses, and can radiate radio frequency energy and, if not
installed and used in accordance with the instruction manual, may cause harmful interference to radio communications.
Operation of this equipment in a residential area is likely to cause harmful interference in which case the user will be required to
correct the interference at his own expense.
FCC Interference Statement for Class B EVM devices
NOTE: This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to part 15 of
the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential
installation. This equipment generates, uses and can radiate radio frequency energy and, if not installed and used in accordance
with the instructions, may cause harmful interference to radio communications. However, there is no guarantee that interference
will not occur in a particular installation. If this equipment does cause harmful interference to radio or television reception, which
can be determined by turning the equipment off and on, the user is encouraged to try to correct the interference by one or more
of the following measures:
•Reorient or relocate the receiving antenna.
•Increase the separation between the equipment and receiver.
•Connect the equipment into an outlet on a circuit different from that to which the receiver is connected.
•Consult the dealer or an experienced radio/TV technician for help.
3.2 Canada
3.2.1 For EVMs issued with an Industry Canada Certificate of Conformance to RSS-210 or RSS-247
Concerning EVMs Including Radio Transmitters:
This device complies with Industry Canada license-exempt RSSs. Operation is subject to the following two conditions:
(1) this device may not cause interference, and (2) this device must accept any interference, including interference that may
cause undesired operation of the device.
Concernant les EVMs avec appareils radio:
Le présent appareil est conforme aux CNR d'Industrie Canada applicables aux appareils radio exempts de licence. L'exploitation
est autorisée aux deux conditions suivantes: (1) l'appareil ne doit pas produire de brouillage, et (2) l'utilisateur de l'appareil doit
accepter tout brouillage radioélectrique subi, même si le brouillage est susceptible d'en compromettre le fonctionnement.
Concerning EVMs Including Detachable Antennas:
Under Industry Canada regulations, this radio transmitter may only operate using an antenna of a type and maximum (or lesser)
gain approved for the transmitter by Industry Canada. To reduce potential radio interference to other users, the antenna type
and its gain should be so chosen that the equivalent isotropically radiated power (e.i.r.p.) is not more than that necessary for
successful communication. This radio transmitter has been approved by Industry Canada to operate with the antenna types
listed in the user guide with the maximum permissible gain and required antenna impedance for each antenna type indicated.
Antenna types not included in this list, having a gain greater than the maximum gain indicated for that type, are strictly prohibited
for use with this device.