Trenz Electronic TE0714 TRM User manual

Online version of this document:
https://wiki.trenz-electronic.de/display/PD/TE0714+TRM
TE0714 TRM
Revision v.55
Exported on 2019-03-04

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1 Table of Contents
1 Table of Contents................................................................................................................................................... 2
2 Table of Figures...................................................................................................................................................... 4
3 Table of Tables....................................................................................................................................................... 5
4 Overview................................................................................................................................................................. 6
4.1 Key Features........................................................................................................................................................... 6
4.2 Block Diagram ........................................................................................................................................................ 6
4.3 Main Components.................................................................................................................................................. 7
4.4 Initial Delivery State............................................................................................................................................... 8
4.5 Control Signals....................................................................................................................................................... 8
5 Signals, Interfaces and Pins................................................................................................................................... 9
5.1 JTAG Interface........................................................................................................................................................ 9
5.2 Board to Board (B2B) I/Os ..................................................................................................................................... 9
6 On-board Peripherals .......................................................................................................................................... 10
6.1 Quad SPI Flash ..................................................................................................................................................... 10
6.2 On-board LED....................................................................................................................................................... 10
6.3 Clock ..................................................................................................................................................................... 10
7 Power and Power-On Sequence ......................................................................................................................... 11
7.1 Power Consumption ............................................................................................................................................ 11
7.2 Power Distribution Dependencies ...................................................................................................................... 11
7.3 Power-On Sequence ............................................................................................................................................ 11
7.4 Power Rails........................................................................................................................................................... 12
7.5 Bank Voltages....................................................................................................................................................... 12
8 Board to Board Connectors................................................................................................................................. 13
8.1 Connector Speed Ratings .................................................................................................................................... 13
8.2 Current Rating...................................................................................................................................................... 14
8.3 Connector Mechanical Ratings............................................................................................................................ 14
9 Technical Specifications...................................................................................................................................... 15
9.1 Absolute Maximum Ratings................................................................................................................................. 15
9.2 Recommended Operating Conditions ................................................................................................................ 15
9.3 Physical Dimensions ............................................................................................................................................ 15
10 Variants Currently In Production ........................................................................................................................ 17
11 Revision History ................................................................................................................................................... 18
11.1 Hardware Revision History.................................................................................................................................. 18
11.2 Document Change History .................................................................................................................................. 18
12 Disclaimer............................................................................................................................................................. 21

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12.1 Data privacy ......................................................................................................................................................... 21
12.2 Document Warranty............................................................................................................................................. 21
12.3 Limitation of Liability........................................................................................................................................... 21
12.4 Copyright Notice .................................................................................................................................................. 21
12.5 Technology Licenses............................................................................................................................................ 21
12.6 Environmental Protection ................................................................................................................................... 21
12.7 REACH, RoHS and WEEE ...................................................................................................................................... 21

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2 Table of Figures
Figure 1: TE0714 block diagram ........................................................................................................................................7
Figure 2: TE0714 main components..................................................................................................................................7
Figure 3: Power Distribution............................................................................................................................................11
Figure 4: Power-On Sequency .........................................................................................................................................12
Figure 5: Physical dimensions drawing...........................................................................................................................16

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3 Table of Tables
Table 1: Initial delivery state of programmable devices on the module.......................................................................8
Table 2: Boot signals........................................................................................................................................................8
Table 3: JTAG signals. ......................................................................................................................................................9
Table 4: B2B I/Os ..............................................................................................................................................................9
Table 5: LED connection. ...............................................................................................................................................10
Table 6: Clock signals.....................................................................................................................................................10
Table 7: Power Consumption ........................................................................................................................................11
Table 8: Power Rails.......................................................................................................................................................12
Table 9: Bank Voltages...................................................................................................................................................12
Table 10: Connectors. ......................................................................................................................................................13
Table 11: Speed rating. ....................................................................................................................................................13
Table 12: Module absolute maximum ratings. ...............................................................................................................15
Table 13: Recommended Operating Conditions ............................................................................................................15
Table 14: Trenz Electronic Shop Overview .....................................................................................................................17
Table 15: Hardware Revision History..............................................................................................................................18
Table 16: Document change history ...............................................................................................................................18

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4 Overview
The Trenz Electronic TE0714 is an industrial-grade SoM (System on Module) based on Xilinx Artix-7, 16 MByte Flash
memory and powerful switching mode power supplies for all on-board voltages. A large number of configurable I/
O's is provided via rugged high-speed stacking strips.TE0714 is the smallest module with transceiver (3 x 4 cm).
Refer to http://trenz.org/te0714-info for the current online version of this manual and other available
documentation.
4.1 Key Features
•Xilinx Artix-7 FPGA (A15T, A35T, A50T)
•Rugged for shock and high vibration
•16 MByte QSPI Flash memory
•Differential MEMS oscillator for MGT clocking
•MEMS oscillator for PL clocks (Optional)
•Plug-on module with 2 × 100-pin high-speed hermaphroditic strips
•138 FPGA I/O's (Max 68 differential)
•5 IO's (QSPI or user I/O's)
•XADC analog input
•4 GTP (high-performance transceiver) lanes
•GT reference clock inputs
•Optimized I/O and power pins for good signal integrity
•On-board high-efficiency DC-DC converters
•Power supply for all on-board components
•eFUSE bit-stream encryption (AES)
•One user configurable LED
Different configurations for cost and performance optimization available upon request. Available options are:
•FPGA Type (A15T, A35T, A50T), temperature grade
•GT clock frequency (or none if not implemented)
•PL clock frequency and precision (or none if not implemented)
•Config and B14 bank Voltage: 1.8V or 3.3V
•SPI Flash type (or none if not implemented)
•LED Color (or none if not implemented)
•PUDC Pin strapping (pull high or pull down)
•GT power enable pin strapping (default power enabled or disabled)
4.2 Block Diagram

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Figure 1: TE0714 block diagram
4.3 Main Components
Figure 2: TE0714 main components
1. Xilinx Artix-7 FPGA (XC7A series), U4
2. 16 MByte SPI Flash, U7
3. B2B connector Samtec Razor Beam™LSHM-150, JM2
4. B2B connector Samtec Razor Beam™LSHM-150, JM1
5. 25 MHz oscillator, U8
6. Single output low-dropout linear regulator (1.2V_MGT), U6
7. Single output low-dropout linear regulator (1.0V_MGT), U5
8. Low-jitter precision LVDS 125 MHz oscillator (GT Clock), U2
9. Red indication LED, D4
10. Step-down DC-DC converter (1.0V), U1
11. PFET load switch with configurable slew rate (3.3V), Q1
12. Low-power step-down DC-DC converter (1.8V), U3
13. Voltage detector for circuit initialization and timing supervision, U23

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4.4 Initial Delivery State
Storage device name Content Notes
SPI Flash OTP Area Empty, not
programmed
Except serial number programmed by
flash vendor
SPI Flash Quad Enable bit Programmed
SPI Flash main array demo design
eFUSE USER Not programmed
eFUSE Security Not programmed
Table 1: Initial delivery state of programmable devices on the module.
4.5 Control Signals
Boot process is controlled by signals on the board to board (B2B) connector.
Signal Direction Signal State Description
BOOTMODE input high or open Master SPI, x4 Mode
low or ground Slave SelectMAP
PROG_B input pulsed low Clear FPGA configuration (falling edge) and
initiate a new configuration sequenz (next
rising edge).
DONE output high Completion of configuration sequence.
Table 2: Boot signals.
SPI FPGA pins D02 and D03 have no pull-ups on the module, so with PUDC=High option, those pins are
floating if there are no pull-ups on baseboard. As those pins have SPI RESET function when Quad mode is
not enabled, it is mandatory to either add pull-ups on user baseboard or program the Quad Enable bit in
Flash nonvolatile status register.
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1 https://shop.trenz-electronic.de/de/Download/?path=Trenz_Electronic/Pinout
5 Signals, Interfaces and Pins
5.1 JTAG Interface
JTAG access to the Xilinx Artix-7 FPGA deviceis provided through connector JM1.
Signal Name B2B Pin
TCK JM1:89
TDI JM1:85
TDO JM1:87
TMS JM1:91
Table 3: JTAG signals.
5.2 Board to Board (B2B) I/Os
FPGA bank number and number of I/O signals connected to the B2B connector:
FPGA
Bank
B2B Connector I/O Signal
Count
Voltage
Level
Notes
14 JM1 6 VCCIO_0
14 JM2 36 VCCIO_0 NB! 17 LVDS pairs possible.
15 JM2 48 VCCIO15 Supplied by the baseboard.
34 JM1 48 VCCIO34 Supplied by the baseboard.
216 JM1 16 MGT_AVC
C
MGT_AVT
T
4 x GTP lanes.
Table 4: B2B I/Os
Please refer to thePin-out1 tables page for additional information.

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6 On-board Peripherals
6.1 Quad SPI Flash
On-board SPI flash memory S25FL127S (U7) is used to store initial FPGA configuration. Besides FPGA configuration,
remaining free flash memory can be used for user application storage. All four SPI data lines are connected to the
FPGA allowing x1, x2 or x4 data bus widths. Maximum data rate depends on the bus width and clock frequency
used.
6.2 On-board LED
There is one LED on TE0714 module.
LED Color FPGA Notes
D4 Red K18 User programmable
Table 5: LED connection.
6.3 Clock
Cloc
k
Default
Frequen
cy
I
C
F
P
G
A
Notes
CLK
25M
Hz
25 MHz U
8
T
1
4
Frequency depends on the module variant. Output is compatible
to 3.3V and 1.8V I/O standard of the FPGA bank.
MGT
_CL
K
125MHz U
2
B
6/
B
5
Frequency depends on the module variant
Table 6: Clock signals.
SPI Flash QE (Quad Enable) bit must be set to high or FPGA is unable to load its configuration from flash.
By default this bit is set to high at the manufacturing plant.
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7 Power and Power-On Sequence
To power-up a module, power supply with minimum current capability of 1A is recommended.
TE0714 needs one single power supply with nominal of 3.3V.
7.1 Power Consumption
Test Condition (25 °C ambient) VIN Current mA Notes
TE0714-35, TEBT0714, empty design, GT not enabled 110mA
Table 7: Power Consumption
Actual power consumption depends on the FPGA design and ambient temperature.
7.2 Power Distribution Dependencies
Figure 3: Power Distribution
7.3 Power-On Sequence
There is no specific or special power-on sequence, single power source is needed as VIN, rest of the sequence is
automatic.

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Figure 4: Power-On Sequency
7.4 Power Rails
Voltages on B2B-
Connector
B2B JM1-Pin B2B JM2-Pin Direction Note
VIN 98, 100 - input supply voltage
VCCIO_0 - 54 input high range bank voltage
VCCIO_15 - 53 input high range bank voltage
VCCIO_34 62 - input high range bank voltage
3.3V 84 - output internal 3.3V voltage level
1.8V - 17 output internal 1.8V voltage level
Table 8: Power Rails
7.5 Bank Voltages
Bank Voltage Notes
0 Config and B14 1.8V or 3.3V Depends on module variant
15 User Supplied from baseboard via B2B connector, max 3.3V
34 User Supplied from baseboard via B2B connector, max 3.3V
Table 9: Bank Voltages

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2 https://www.samtec.com/technical-specifications/Default.aspx?SeriesMaster=LSHM
8 Board to Board Connectors
3 x 4 modules use two Samtec Razor Beam LSHM connectors2on the bottom side.
•2 x REF-189016-02 (compatible to LSHM-150-04.0-L-DV-A-S-K-TR), (100 pins, "50" per row).
When using the same type on baseboard, the mating height is 8mm. Other mating heights are possible by using
connectors with a different height.
Order
number
Connector on baseboard compatible to Mating
height
23836 REF-189016-01 LSHM-150-02.5-L-DV-A-S-K-
TR
6.5 mm
LSHM-150-03.0-L-DV-A-S-K-
TR
LSHM-150-03.0-L-DV-A-S-K-
TR
7.0 mm
23838 REF-189016-02 LSHM-150-04.0-L-DV-A-S-K-
TR
8.0 mm
LSHM-150-06.0-L-DV-A-S-K-
TR
LSHM-150-06.0-L-DV-A-S-K-
TR
10.0mm
Table 10: Connectors.
The module can be manufactured using other connectors upon request.
8.1 Connector Speed Ratings
The LSHM connector speed rating depends on the stacking height; please see the following table:
Stacking height Speed rating
12 mm, Single-Ended 7.5 GHz / 15 Gbps
12 mm, Differential 6.5 GHz / 13 Gbps
5 mm, Single-Ended 11.5 GHz / 23 Gbps
5 mm, Differential 7.0 GHz / 14 Gbps
Table 11: Speed rating.
These connectors are hermaphroditic. Odd pin numbers on the module are connected to even pin
numbers on the baseboard and vice versa.
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8.2 Current Rating
Current rating of Samtec Razor Beam™LSHM B2B connectors is 2.0A per pin (2 adjacent pins powered).
8.3 Connector Mechanical Ratings
•Shock: 100G, 6 ms Sine
•Vibration: 7.5G random, 2 hours per axis, 3 axes total

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3 https://www.xilinx.com/support/documentation/data_sheets/ds181_Artix_7_Data_Sheet.pdf
4 https://www.xilinx.com/support/documentation/data_sheets/ds181_Artix_7_Data_Sheet.pdf
5 https://www.xilinx.com/support/documentation/data_sheets/ds181_Artix_7_Data_Sheet.pdf
6 https://www.xilinx.com/support/documentation/data_sheets/ds181_Artix_7_Data_Sheet.pdf
7 https://www.xilinx.com/support/documentation/data_sheets/ds181_Artix_7_Data_Sheet.pdf
8 https://www.xilinx.com/support/documentation/data_sheets/ds181_Artix_7_Data_Sheet.pdf
9 https://www.xilinx.com/support/documentation/data_sheets/ds181_Artix_7_Data_Sheet.pdf
9 Technical Specifications
9.1 Absolute Maximum Ratings
Parameter Min Max Units Reference Document
VIN supply voltage -0.1 6.0 V -
HR I/O banks supply voltage (VCCO) -0.5 3.6 V Xilinxdatasheet DS1813
HR I/O banks input voltage -0.4 VCCO + 0.55 V Xilinxdatasheet DS1814
GTP transceivers Tx/Rx input voltage -0.5 1.26 V Xilinxdatasheet DS1815
Voltage on module JTAG pins -0.4 VCCO_0 +
0.55
VXilinxdatasheet DS1816
Storage temperature -40 +85 °C -
Table 12: Module absolute maximum ratings.
9.2 Recommended Operating Conditions
Parameter Min Max Units Reference Document
VIN supply voltage 3.135 3.45 V -
HR I/O banks supply voltage (VCCO) 1.14 3.465 V Xilinxdatasheet DS1817
HR I/O banks input voltage -0.20 VCCO + 0.20 V Xilinxdatasheet DS1818
Voltage on module JTAG pins 3.135 3.465 V Xilinxdatasheet DS1819
Table 13: Recommended Operating Conditions
9.3 Physical Dimensions
• Module size: 40 mm × 30 mm. Please download the assembly diagram for exact numbers.
•Mating height with standard connectors: 8 mm

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10 https://shop.trenz-electronic.de/de/Download/?path=Trenz_Electronic/TE0714
•PCB thickness: 1.6 mm
•Highest part on PCB: approximately 2.5 mm. Please download the step model for exact numbers.
All dimensions are shown in mm. Additional sketches, drawings and schematics can be found here10.
Figure 5: Physical dimensions drawing

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11 https://shop.trenz-electronic.de/en/Products/Trenz-Electronic/TE07XX-Artix-7/TE0714-Artix-7/
12 https://shop.trenz-electronic.de/de/Produkte/Trenz-Electronic/TE07XX-Artix-7/TE0714-Artix-7/
10 Variants Currently In Production
Trenz shop TE0714 overview page
English page11 German page12
Table 14: Trenz Electronic Shop Overview
On REV 01 JM2 Pin 54 was connected to GND. When R27 is not populated, REV 02 is backwards compatible
to REV 01. When R27 is set, check your baseboard to not connect this pin to GND. For all new baseboards
JM2.54 should be used as VCCIO output (it will then be 1.8V or 3.3V depending the voltage settings on the
module.


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13 https://wiki.trenz-electronic.de/display/PD/PCN-20160815+TE0714-01+to+TE0714-02+hardware+revision+upgrade
14 https://shop.trenz-electronic.de/Download/?path=Trenz_Electronic/Modules_and_Module_Carriers/3x4/TE0714/REV02
15 https://shop.trenz-electronic.de/de/Download/?path=Trenz_Electronic/TE0714/REV01
16 https://wiki.trenz-electronic.de/display/~j.hartfiel
11 Revision History
11.1 Hardware Revision History
Date Revision PCN Documentation Link Note
2016-08-04 02 PCN-2016081513 TE0714-0214 VCCIO0 added to B2B
01 - TE0714-0115 -
Table 15: Hardware Revision History
Hardware revision number is printed on the PCB board next to the module model number separated by the dash.

11.2 Document Change History
Date Revision Authors Description
2019-03-04
v.55 (see
page 6)
John Hartfiel16 •Restore and modify v.50
•Correction max IO count on key features
•Change history table
•typo correction
2019-01-07 v.50 John Hartfiel •Updated to TRM version 2.2
•Style modifications
2018-09-19 v.48 Martin Rohrmüller •Updated to TRM version 2.1
•Updated B2B Connectors
•Style modifications

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17 https://wiki.trenz-electronic.de/display/~a.naseri
18 https://wiki.trenz-electronic.de/display/~antti.lukats
19 https://wiki.trenz-electronic.de/display/~e.vassilakis
20 https://wiki.trenz-electronic.de/display/~j.hartfiel
21 https://wiki.trenz-electronic.de/display/~j.kumann
22 https://wiki.trenz-electronic.de/display/~k.moeller
23 https://wiki.trenz-electronic.de/display/~m.rohrmueller
Date Revision Authors Description
2018-09-17 v.38 Martin Rohrmüller •Added power rail section
•Added Rev 02 Flash PCN
•Corrected table headings
2018-09-17 v.36 Martin Rohrmüller •Update to TRM version 2.0 with DrawIO Figures
•Added Figure Power Distribution
2018-04-04 v.35 Martin Rohrmüller Corrected clock net designator in table.
2017-05-28 v.27 Jan Kumann •Board-to-Board I/O section added.
•New physical dimensions images.
•Documents sections rearranged.
2017-03-20 v.26 John Hartfiel •Notes on Clocking section.
2017-01-27 v.25 Jan Kumann •New block diagram.
2016-12-01 v.17 Jan Kumann •Changes in the document structure, few
corrections.
2016-11-18 v.14 Thorsten Trenz,
Emmanuel
Vassilakis
•Hardware revision 02 specific changes.
2016-06-01 v.9 Antti Lukats •Initial version.
-- all Ali Naseri17 , Antti
Lukats18 ,
Emmanuel
Vassilakis19 , John
Hartfiel20 , Jan
Kumann21 ,
Kerstin Möller22 ,
Martin
Rohrmüller23 ,
Susanne
--

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24 https://wiki.trenz-electronic.de/display/~s.kunath
25 https://wiki.trenz-electronic.de/display/~tht
Date Revision Authors Description
Kunath24 ,
Thorsten Trenz25
Table 16: Document change history