VIPA SSM-BG41 User manual

Subject to change to cater for technical progress
Manual
SSM-BG41/BG42/
BG43
Order-No.: VIPA SSM-HB29E
Rev. 99/49

Lerrzeichen

Manual BG41/BG42/BG43
Subject to change to cater for technical progress
The information in this manual is supplied without liability. Its contents may be amended at any
stage without prior notice. The software described in this manual is subject to the conditions of a
general licensing agreeement. The user has a copy licence, which entitles one to use the software
within their company.
Contravention will result in liability for damages.
© Copyright 2000 VIPA, Gesellschaft für Visualisierung und Prozeßautomatisierung mbH,
Ohmstraße 4, D-91074 Herzogenaurach
Phone.: [phone]
Fax.: [phone]
EMail: [email protected]
http://www.vipa.de
Hotline: [phone]
All rights reserved
VIPA®is the registered trademark of VIPA Gesellschaft für Visualisierung und Prozeßautomatisierung mbH
SIMATIC®is the registered trademark of Siemens AG
STEP®5 is the registered trademark of Siemens AG
All other trademarks mentioned within the text are trademarks of the respective holders and are recognized as protected.

Manual BG41/BG42/BG43
Subject to change to cater for technical progress
About this Manual
This manual describes the operation of the communication processors SSM-BG41/42/43. The
modular communication processor SSM is an intelligent carrier building block, upon which a series
of input, output and communication modules can be equipped.
Depending on the building block, up to 3 expansion boards can be optionally combined.
It can be inserted into automation equipment 115U (without fan) up to 188U, as well as into central
or add-on equipment.
Overview
Chapter 1: Introduction
In this chapter you will find general safety information on the handling of
building blocks liable to electrostatic danger. An overview of the modules which
can be used is also provided.
Chapter 2: Interface building blocks
The building blocks BG41, BG42 and BG43 are introduced in this chapter, as well
as the block diagram firmware and details on memory distribution firmware.
Chapter 3: Interface modules
Chapter 3 attends to the usable modules. You will find a description to the
structure, mode of operation and allocation of pins. The use with or without data
handling blocks will be described for the module SSI, counter, analogue
input/output and DCF77.
Chapter 4: Software
In this chapter you will find instructions on how to parameterize the buidling
blocks. For parameterizing you can use the VIPA data handling blocks or you can
parameterize the building block via interface channel. The large part of the chapter
attends to the use of building blocks with procedures e.g. STX/ETX and 3964(R)
with or without RK512.
Chapter 5: Installation
The configuration of a building block is described in this chapter. Instructions are
given on how to adjust the address, on the function of the plug connector and on
the voltage supply of modules. Within this chapter you are also provided with
information on the start-up response of a configured building block, as well as
help in fault diagnosis. Apart from construction guidelines, which contain
information on the interference immune construction of stored programmable
controls, program examples of different transmission protocols are also detailed.
Chapter 6: Technical Data
In this chapter technical data on building blocks and modules is provided.

Manual BG41/BG42/BG43 Contents
Rev. 99/49 i
Contents
1 INTRODUCTION...........................................................................................................1-1
1.1 Safety and handling precautions for the user....................................................1-1
1.1.1 Handling electrostatically sensitive modules....................................................1-1
1.1.2 Shipping electrostatically sensitive modules ....................................................1-2
1.1.3 Tests and modifications to electrostatically sensitive modules.........................1-2
1.2 General ..................................................................................................................1-3
1.3 Area of employment..............................................................................................1-3
1.4 Deliverable interface building blocks..................................................................1-4
2 INTERFACE BUILDING BLOCKS................................................................................2-1
2.1 Principle of data transmission.............................................................................2-1
2.2 Building block structure.......................................................................................2-2
2.2.1 Building block BG41.........................................................................................2-2
2.2.2 Building block BG42.........................................................................................2-4
2.2.3 Building block BG43.........................................................................................2-6
2.3 Allocation of the backplane connector...............................................................2-8
2.3.1 Backplane connector X1..................................................................................2-8
2.3.2 Backplane connector X2..................................................................................2-8
2.4 Block diagram of firmware...................................................................................2-9
2.5 Firmware’s memory distribution .........................................................................2-9
3 INTERFACE MODULES...............................................................................................3-1
3.1 General ..................................................................................................................3-1
3.1.1 Voltage supply 5V and 24V..............................................................................3-1
3.1.2 LED indicators on the modules........................................................................3-2
3.1.3 Selection table: function - module - function blocks.........................................3-3
3.2 Functional description and allocation of terminal pins.....................................3-4
3.2.1 20mA current loop-modul (MD25)....................................................................3-4
3.2.2 RS232C module (MD22)..................................................................................3-9
3.2.3 20mA current loop/RS232C combination module (MD26).............................3-12
3.2.4 RS422/RS485 module (MD21).......................................................................3-14
3.2.5 RS422P (MD33) and RS485P (MD34) module floating.................................3-20
3.2.6 CENTRONICS module (MD24)......................................................................3-22
3.2.7 SSI module (MD39)........................................................................................3-24
3.2.8 Counter module (MD18,19)............................................................................3-33
3.2.9 Analogue input (MD40-44) and output module (MD45-49)...........................3-47
3.2.10 DCF77 antenna module (MD36)..................................................................3-74

Contents Manual BG41/BG42/BG43
ii Rev. 99/49
4 SOFTWARE ..................................................................................................................4-1
4.1 Handling with VIPA data handling blocks...........................................................4-2
4.1.1 Important advice...............................................................................................4-2
4.1.2 Overview of parameterizing possibilities...........................................................4-2
4.1.3 Changing the standard parameters..................................................................4-4
4.1.4 Selection of function.......................................................................................4-10
4.1.5 Data handling without a protocol and procedure............................................4-12
4.1.6 Data handling with procedure STX/ETX.........................................................4-18
4.1.7 Handling with procedure 3964(R)...................................................................4-20
4.1.8 Handling with prozedure 3964(R) with RK512................................................4-41
4.2 Application of interfaces without data handling blocks...................................4-84
4.2.1 Address allocation ..........................................................................................4-84
4.2.2 Interface channel............................................................................................4-85
4.2.3 Parameter channel.........................................................................................4-87
4.2.4 Acknowledgement and error code..................................................................4-88
4.2.5 PLC interface parameter channel...................................................................4-89
5 STARTUP......................................................................................................................5-1
5.1 Startup procedure .................................................................................................5-1
5.2 Presetting...............................................................................................................5-2
5.2.1 Mounting place in PLC-115U............................................................................5-2
5.2.2 Mounting places in PLC-135U..........................................................................5-3
5.2.3 Mounting place in PLC-150U............................................................................5-4
5.2.4 Mounting place in PLC-155U............................................................................5-5
5.2.5 Mounting place in EG-185U..............................................................................5-6
5.2.6 Mounting places in PLC-188U..........................................................................5-7
5.2.7 Setting the address with DIL switches S1 and S2 ...........................................5-8
5.2.8 Plug connectors J6, J11 and J12....................................................................5-10
5.2.9 Voltage supply of the module .........................................................................5-12
5.3 Software installation of VIPA’s data handling blocks......................................5-15
5.4 Startup response.................................................................................................5-17
5.5 Error diagnosis....................................................................................................5-18
5.5.1 Errors in serial communication .......................................................................5-18
5.5.2 Application of the diagnostic interface............................................................5-19
5.6 Examples .............................................................................................................5-21
5.6.1 STX/ETX.........................................................................................................5-21
5.6.2 3964R.............................................................................................................5-25
5.6.3 3964R with RK512..........................................................................................5-28
5.7 Structure guidelines............................................................................................5-31
5.7.1 What does EMC mean? .................................................................................5-31
5.7.2 Overview of the possible effects of interferences...........................................5-31
5.7.3 The most important basic rules to guarantee EMC ........................................5-32
5.7.4 Screening of cables........................................................................................5-33

Manual BG41/BG42/BG43 Contents
Rev. 99/49 iii
6 TECHNICAL DATA.......................................................................................................6-1
6.1 Interface building blocks......................................................................................6-1
6.2 Module ...................................................................................................................6-2
6.2.1 20mA current loop module...............................................................................6-2
6.2.2 20mA-/RS232C combination module...............................................................6-3
6.2.3 RS232C module...............................................................................................6-3
6.2.4 RS422/RS485 module .....................................................................................6-4
6.2.5 RS422P/RS485P module.................................................................................6-4
6.2.6 CENTRONICS module.....................................................................................6-5
6.2.7 SSI module.......................................................................................................6-5
6.2.8 Counter module (5V/24V) ................................................................................6-6
6.2.9 Analogue input module ....................................................................................6-7
6.2.10 Analogue output module................................................................................6-9
6.2.11 DCF77 antenna module...............................................................................6-10
6.3 FB’s memory space requirement ......................................................................6-11
6.4 Overview cycle load............................................................................................6-12
Appendix................................................................................................... A-1
A List of figures.......................................................................................................... A-1
B Index of tables ........................................................................................................ B-1
C Index........................................................................................................................ C-1

Contents Manual BG41/BG42/BG43
iv Rev. 99/49

1 Introduction
1.1 Safety and handling precautions for the user 1-1
1.1.1 Handling electrostatically sensitive modules 1-1
1.1.2 Shipping electrostatically sensitive modules 1-2
1.1.3 Tests and modifications to electrostatically sensitive modules 1-2
1.2 General 1-3
1.3 Area of employment 1-3
1.4 Deliverable interface building blocks 1-4

Manual BG41/BG42/BG43 Introduction
Rev. 99/49 1-1
1 Introduction
1.1 Safety and handling precautions for the user
1.1.1 Handling electrostatically sensitive modules
VIPA building blocks are equipped with highly integrated components in MOS-technology. These
components are highly sensitive to excess voltage, which can for example result from electrostatic
discharge.
Building blocks at risk are characterized by the following symbol:
The symbol is to be found on building blocks, building block carriers or on the packaging and
indicate building blocks liable to electrostatic danger.
Building blocks liable to electrostatic danger can be destroyed by energies or voltage, which lie far
below the human’s point of perception. If a person, who is not electrically discharged, handles
building blocks liable to electrostatic danger, such voltages may occur, leading to damage of
components and therefore reducing the functionability of the building blocks or rendering them
completely useless. Only a very small percentage of such damaged building blocks will be
immediately recognized as faulty. The fault may first become apparent after being in operation for a
longer period of time.
Due to static discharge, damaged components can develop a temporary fault by changes in
temperature, vibrations or a change in load.
Functional interferences and failures can only be effectively prevented by a consistent employment
of protective devices and a responsible compliance with the handling regulations.

Safety and handling precautions for the user Manual BG41/BG42/BG43
1-2 Rev. 99/49
1.1.2 Shipping electrostatically sensitive modules
Always use the original packaging for dispatch. The prepared building blocks could additionally be
wrapped with a conductive packaging. Conductive packaging is antistatic foil or metallozed plastic-
film containers..
A battery is to be found on the interface building block as a compensating
charge for the clock. Insure that the battery’s connections are not touched or
short-circuited, when dispatched in conductive packaging
1.1.3 Tests and modifications to electrostatically sensitive modules
The following aspects are to be observed, when measuring building blocks liable to electrostatic
danger:•=Floating measuring equipment is to be temporarily discharged.
•=Measuring equipment to be used is to be earthed.
When altering building blocks liable to electrostatic danger, one is to ensure that an earthed
soldering iron is used.
When working with or on building blocks liable to electrostatic danger, one is
to ensure that both the people and the working material are sufficiently
earthed.

Manual BG41/BG42/BG43 Introduction
Rev. 99/49 1-3
1.2 General
The building blocks are differentiated by the number of existing interfaces, which can be adapted by
means of VIPA interface modules to different physical modes of transmission and can be used for
particular functions. They can be linked with any peripheral device, which uses the corresponding
transmission technology.
Every VIPA interface building block (BG41, BG42, BG43) is additionally equipped with a battery-
backed real-time clock and a diagnostic interface, which can be connected to a diagnostic adapter
(UPI-FOX).
1.3 Area of employment
The VIPA interface building block is used in PLC systems as an interface for the input and output of
data. It is equipped with transmitting and receiving buffers (each with 256 bytes), which are run by
the Z80 processor situated on the module. The module’s 25-pole SubD sockets are pin-compatible
with CP 525 when using serial communication modules.
The interface building block can, for example, be used to connect a keyboard, a terminal, a printer
or to communicate with a computer. Data for output or input can be filed in data handling blocks in
the programmable controller (PLC).
If no personal parameters are set, the following values for each interface are preset by serial
transmission:
•Noprotocol
• Rate of transmission 9600 baud
•Startbit 1
•Databit 8
• Parity check even parity
•Stopbit 2

Deliverable interface building blocks Manual BG41/BG42/BG43
1-4 Rev. 99/49
The interfaces can be adapted to certain physical modes of transmission by modules, which are
inserted in the designed slots of the mother circuit board.
The following VIPA modules can be presently used:
•=20mA Current Loop Module (Order No.: VIPA SSM-MD25)
•=20mA Current Loop/ RS232C Combination module (Order No.: VIPA SSM-MD26)
•=RS232C Module (Order No.: VIPA SSM-MD22)
•=RS422 / RS485 Module (non-floating) (Order No.: VIPA SSM-MD21)
•=RS422P Module (floating) (Order No.: VIPA SSM-MD33)
•=RS485P Module (floating) (Order No.: VIPA SSM-MD34)
•=CENTRONICS Module (Order No.: VIPA SSM-MD24)
•=5V Counter Module (Order No.: VIPA SSM-MD19)
•=24V Counter Module (Order No.: VIPA SSM-MD18)
•=Analogue Input Module (Order No.: VIPA SSM-MD40 to -MD44)
•=Analague Output Module (Order No.: VIPA SSM-MD45 to -MD49)
•=SSI Module (Order No.: VIPA SSM-MD39)
1.4 Deliverable interface building blocks
•=1 Module Slot (Order No.: VIPA SSM-BG41)
•=2 Module Slots (Order No.: VIPA SSM-BG42)
•=3 Module Slots (Order No.: VIPA SSM-BG43)
Fig. 1-1:Deliverable interface building blocks

2 Interface modules
2.1 Principle of data transmission 2-1
2.2 Building block structure 2-2
2.2.1 Building block BG41 2-2
2.2.2 Building block BG42 2-4
2.2.3 Building block BG43 2-6
2.3 Allocation of the backplane connector 2-8
2.3.1 Backplane connector X1 2-8
2.3.2 Backplane connector X2 2-8
2.4 Block diagram of firmware 2-9
2.5 Firmware’s memory distribution 2-9

Manual BG41/BG42/BG43 Interface building blocks
Rev. 99/49 2-1
2 Interface building blocks
2.1 Principle of data transmission
Data, which is written into the corresponding data channel from the PLC, is recorded by the
building block in the appropriate transmission buffer (256 Byte) and from there is sent through the
interface. In the other direction (Interface →PLC) the data received is recorded in the appropriate
receiving buffer and can be read by the PLC over the data channel.
back
plane
bus
Fig. 2-1:Data transfer via interface ( Example Module BG41)

Building block structure Manual BG41/BG42/BG43
2-2 Rev. 99/49
2.2 Building block structure
2.2.1 Building block BG41
The interface building block BG41 is a flat building block in double
Euro-format with two 48-pole base plugs in the construction system
ES 902. It has a width of 1 1/3 mounting places.
The building block BG41 has 1 interface, which can be adapted to
certain physical modes of transmission by means of interface
modules.
The front panel of the module consists of:
(1) A 25-pole SubD socket for the interface with
(2) hexagonal threaded bolts for fastening the plugs
(3) Two or four LEDs above the 25-pole SubD socket, which
provide information on the operational state and on each
connected module (see chapter 3).
(4) An 8-pole mini DIN socket for the service interface.
Fig. 2-2:Front panel of building block BG41

Manual BG41/BG42/BG43 Interface building blocks
Rev. 99/49 2-3
Fig. 2-3:Position of jumpers and DIL switches on BG41

Building block structure Manual BG41/BG42/BG43
2-4 Rev. 99/49
2.2.2 Building block BG42
The interface building block BG41 is a flat building block in double Euro-
format with two 48-pole base plugs in the construction system ES 902. It has a
width of 1 1/3 mounting places.
The building block BG42 has 2 interfaces, which could be adapted to certain
physical modes of transmission by means of interface modules.
The front panel of the module consists of:
(1) Two 25-pole SubD socket for the two interfaces with
(2) hexagonal threaded bolts for fastening the plugs
(3) Two or four LEDs above the 25-pole SubD sockets, which provide
information on the operational state and on each connected module
(see chapter 3).
(4) An 8-pole mini DIN socket for the service interface.
Fig. 2-4:Front panel of building block BG42