Xilinx Spartan-6 FPGA Series User manual

XPM 0402809-01
Getting Started with
the Spartan-6 FPGA
SP605 Embedded Kit
UG727 (v1.1) June 21, 2010

SP605 Getting Started Guide www.xilinx.com UG727 (v1.1) June 21, 2010
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Revision History
The following table shows the revision history for this document.
Date Version Revision
12/08/09 1.0 Initial Xilinx release.
06/21/10 1.1 Changed “Embedded Development Kit” to “Embedded Kit” throughout. Updated
ISE® software tool version from 11.1 to 12.1. Updated procedures and GUI screens
for software version 12.1.

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Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Preface: About This Guide
Additional Documentation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Additional Resources . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Typographical. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Online Document . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Getting Started with the Spartan-6 FPGA SP605 Embedded Kit
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
SP605 Embedded Kit Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
What’s Inside the Box . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
What’s Available Online . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Getting Started with the Video Demonstration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Processor System Used for the Video Demo. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Video Demo Hardware Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Video Demo Hardware Setup Instructions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Running the Video Demo . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Getting Started with the PetaLinux Demonstration . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Processor System Used for the PetaLinux Demo . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
PetaLinux Demo Hardware Setup Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Running the PetaLinux Demo . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Installation and Licensing of ISE Design Suite 12.1 . . . . . . . . . . . . . . . . . . . . . . . . . . 18
ISE 12.1 Software Installation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Downloading and Installing Tool Licenses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Communicating with the SP605 USB-UART . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Installing the USB-UART driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Connecting to the SP605 UART . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Configuring the Host Computer. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Testing the USB-UART Driver Installation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Next Steps . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Data Sheet . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
DS757 SP605 Embedded Kit MicroBlaze Processor Subsystem Data Sheet . . . . . . . . . . 32
Tutorials. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
UG729 SP605 MicroBlaze Processor Subsystem Software Tutorial. . . . . . . . . . . . . . . . . 32
UG728 SP605 MicroBlaze Processor Subsystem Hardware Tutorial. . . . . . . . . . . . . . . . 32
Reference Designs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
MicroBlaze Processor Subsystem . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
MicroBlaze Processor Subsystem with Video Pipeline Demo. . . . . . . . . . . . . . . . . . . . . 32
Getting Help and Support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Appendix A: Warranty
Table of Contents

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Preface
About This Guide
This guide provides information for getting started with the Spartan®-6 FPGA SP605
Embedded Kit.
Additional Documentation
The following documents are available for download at
http://www.xilinx.com/products/spartan6/.
• Spartan-6 Family Overview
This overview outlines the features and product selection of the Spartan-6 family.
• Spartan-6 FPGA Data Sheet: DC and Switching Characteristics
This data sheet contains the DC and switching characteristic specifications for the
Spartan-6 family.
• Spartan-6 FPGA Packaging and Pinout Specifications
This specification includes the tables for device/package combinations and maximum
I/Os, pin definitions, pinout tables, pinout diagrams, mechanical drawings, and
thermal specifications.
• Spartan-6 FPGA Configuration User Guide
This all-encompassing configuration guide includes chapters on configuration
interfaces (serial and parallel), multi-bitstream management, bitstream encryption,
boundary-scan and JTAG configuration, and reconfiguration techniques.
• Spartan-6 FPGA SelectIO Resources User Guide
This guide describes the SelectIO™ resources available in all Spartan-6 devices.
•Spartan-6FPGAClockingResources User Guide
This guide describes the clocking resources available in all the Spartan-6 devices,
including the DCMs and PLLs
• Spartan-6 FPGA Block RAM Resources User Guide
This guide describes the Spartan-6 device block RAM capabilities.
• Spartan-6 FPGA GTP Transceivers User Guide
This guide describes the GTP transceivers available in the Spartan-6 LXT FPGAs.
• Spartan-6 FPGA DSP48A1 Slice User Guide
This guide describes the architecture of the DSP48A1 slice in Spartan-6 FPGAs and
provides configuration examples.
• Spartan-6 FPGA Memory Controller User Guide

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Preface: About This Guide
This guide describes the Spartan-6 FPGA memory controller block, a dedicated
embedded multi-port memory controller that greatly simplifies interfacing Spartan-6
FPGAs to the most popular memory standards.
• Spartan-6 FPGA PCB Designer’s Guide
This guide provides information on PCB design for Spartan-6 devices, with a focus on
strategies for making design decisions at the PCB and interface level.
Additional Resources
To find additional documentation, see the Xilinx website at:
http://www.xilinx.com/support/documentation/index.htm.
To search the Answer Database of silicon, software, and IP questions and answers, or to
create a technical support WebCase, see the Xilinx website at:
http://www.xilinx.com/support.
Conventions
This document uses the following conventions. An example illustrates each convention.
Typographical
The following typographical conventions are used in this document:
Convention Meaning or Use Example
Courier font
Messages, prompts, and
program files that the system
displays
speed grade: - 100
Courier bold Literal commands that you enter
in a syntactical statement ngdbuild design_name
Helvetica bold
Commands that you select from
a menu File →Open
Keyboard shortcuts Ctrl+C
Italic font
Variables in a syntax statement
for which you must supply
values
ngdbuild design_name
References to other manuals See the Command Line Tools User
Guide for more information.
Emphasis in text
If a wire is drawn so that it
overlaps the pin of a symbol, the
two nets are not connected.
Square brackets [ ]
An optional entry or parameter.
However, in bus specifications,
such as bus[7:0], they are
required.
ngdbuild [option_name]
design_name

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Conventions
Online Document
The following conventions are used in this document:
Braces { } A list of items from which you
must choose one or more lowpwr ={on|off}
Vertical bar | Separates items in a list of
choices lowpwr ={on|off}
Vertical ellipsis
.
.
.
Repetitive material that has
been omitted
IOB #1: Name = QOUT’
IOB #2: Name = CLKIN’
.
.
.
Horizontal ellipsis . . . Repetitive material that has
been omitted
allow block block_name loc1
loc2 ... locn;
Convention Meaning or Use Example
Convention Meaning or Use Example
Blue text Cross-reference link to a location
in the current document
See the section “Additional
Resources” for details.
Refer to “Title Formats” in
Chapter 1 for details.
Blue, underlined text Hyperlink to a website (URL) Go to http://www.xilinx.com
for the latest speed files.

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Preface: About This Guide

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UG727 (v1.1) June 21, 2010
Getting Started with the
Spartan-6 FPGA SP605 Embedded Kit
Introduction
The Spartan®-6 FPGA Embedded Kit conveniently delivers the key components of the
Xilinx® Embedded Targeted Design Platform (TDP) required for developing embedded
software and hardware in a wide range of applications in Broadcast, Industrial, Medical,
Aerospace and Defense markets. For software developers, a familiar Eclipse-based IDE,
GNU tools, OSes, libraries and a pre-verified reference design enables them to start
programming right away. Similarly, hardware designers now have immediate access to a
pre-integrated MicroBlaze™ processor subsystem that includes the most commonly used
peripheral IP cores, enabling them to begin at once developing their custom logic.
This Getting Started Guide will walk you through the steps to set up the SP605 board and
run the out-of-box video and Linux demonstrations that are designed to illustrate the
flexibility and capability of a MicroBlaze processor subsystem for embedded design. Then,
if you have not already installed the Xilinx ISE® software, you will be directed through the
steps to install the software, get updates, and generate a license. Finally this guide will
point you to next steps in using the embedded software and hardware tutorials included in
this kit.
SP605 Embedded Kit Contents
What’s Inside the Box
• SP605 Evaluation Board with the XC6SLX45T-3FGG484 FPGA along with:
• Power Supply
• Two USB Type-A to Mini-B 5-pin cables
•EthernetCable
• VGA to DVI Adapter
• Compact Flash card - 2 GB (with Embedded Kit demo)
• ISE Design Suite Embedded Edition: (device-locked) for Spartan-6 LX45T FPGA
• Xilinx ISE Design Suite 12.1 DVD, which includes:
• ISE Foundation with ISE Simulator
• PlanAhead Design and Analysis Tool
• Embedded Development Kit (EDK)
• Xilinx Platform Studio (XPS)

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Introduction
• Software Development Kit (SDK)
• ChipScope™ Pro logic analyzer
• Documentation
• SP605 Hardware Setup Guide
• UG727 Getting Started with the Spartan-6 FPGA SP605 Embedded Kit
• DS757 SP605 Embedded Kit MicroBlaze Processor Subsystem Data Sheet
• UG728 SP605 MicroBlaze Processor Subsystem Hardware Tutorial
• UG729 SP605 MicroBlaze Processor Subsystem Software Tutorial
• Reference Designs and Demonstrations
• Base MicroBlaze Processor Sub System
•VideoDemo
• Reference designs, demonstrations, documentation, and applications delivered on
USB Flash drive to get started quickly
What’s Available Online
• License for ISE Design Suite 12.1 Embedded Edition
•http://www.xilinx.com/getproduct
•http://www.xilinx.com/tools/faq.htm
• Embedded Kit home page with Documentation and Reference Designs
•http://www.xilinx.com/s6embkit
• Technical Support
•http://www.xilinx.com/support/
Getting Started with the Video Demonstration
This Spartan-6 Embedded Kit comes with a video demo available on the provided
Compact Flash card. You can run this demo before installing any additional tools to get an
overview of the features of the SP605 Evaluation Board using a MicroBlaze Processor
Subsystem in the Spartan-6 LX45T FPGA.
Processor System Used for the Video Demo
The provided demos use a pre-built Spartan-6 FPGA design (Figure 1) with the following
features:
• MicroBlaze soft processor
• External DDR3 Memory Interface
• External Flash Memory Interface
• On-chip Memory (Block RAM)
• Tri-Mode Ethernet MAC (evaluation license)
• UART (connected from SP605 board via the USB-UART connector)
• Interrupt Controller (Intc) and Timer
• Compact Flash Interface (System ACE™ technology)
•GPIO(LEDs,LCD,Switches)
• Video Pipeline DSP Cores

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Introduction
Note: Instructions on building the Video Demo system are detailed in UG728 SP605 MicroBlaze
Processor Subsystem Hardware Tutorial.
Video Demo Hardware Requirements
In addition to the equipment supplied with the Embedded Kit, you will also need the
following to run the Video Demo:
•DVIcableandDVIMonitor
or
• DVI to VGA adapter, VGA Cable, and VGA Monitor
Video Demo Hardware Setup Instructions
1. Connect the Ethernet Cable directly to a PC. Set the IP address of the PC to
192.168.1.100. You will need to return the IP address of the PC back to its original
setting after running the demo.
Note: The demo uses a hard coded MAC address and a fixed IP address of 192.168.1.10 and will
not connect to your regular LAN network using DHCP. Do not connect more than one board to the
same network segment.
X-Ref Target - Figure 1
Figure 1: Spartan-6 FPGA Video Demo System
3 x 3 FIR
Filter
UG727_01_051110
LEDs
UART
16550
RS232
Line Driver/
Receiver
Ethernet
PHY
Tr i M o d e
Ethernet
MAC
dvi_out_de
dvi_out_vsync
video_out_scl
dvi_rest_n
video_out_sda
dvi_out_hsync
dvi_out_clk_n
cvi_out_clk_n
dvi_out_data
DVI
Controller
XPS
IIC
DVI
Switches
Buttons
Input/Output
MicroBlaze
8KB I and D Caches
Internal RAM
(8KB)
Interrupt
Controller
Display
Controller
Dual
Timer/Counter
Processor Block
FLASH/SRAM
Controller
SysACE
Compact Flash
Controller
Multiport
Memory
Controller
Internal
RAM
(32 KB)
IIC EEPROM
Controller
FLASH
(32 MB)
Compact
FLASH
SPI
Flash
Controller
SPI
FLASH
DDR3
(128MB)
IIC
EEPROM
Memory
MicroBlaze Processor Subsystem
XC6SLX45T
Configurable User Logic
FIR_3x3_DVI_
VIDEO_OUT
Display_Cntlr_
DVI_VIDEO_OUT
XIL_VFBC
GPIO
GPIO
GPIO

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Introduction
2. Connect either a DVI monitor to the SP605 board connector shown in Figure 2 or use
the provided DVI/VGA adapter to connect to a VGA monitor. Ensure that the monitor
is turned ON and its input selected to DVI or VGA appropriately.
3. Confirm that the SP605 jumper settings are at default, as shown in Table 1.
4. Insert the provided Compact Flash card into the board as shown in Figure 3.
5. Set the System ACE DIP switches shown in Figure 3 to the settings listed in Table 2.
X-Ref Target - Figure 2
Figure 2: SP605 DVI Connector
Ta b le 1 : SP605 Jumper Settings
Jumper REFDES Function Default
FMC JTAG Bypass
J19 Exclude FMC LPC connector J2 Jump 1-2
SFP Module
J22 SFP Full BW Jump 1-2
J44 SFP Enabled Jump 1-2
SPI Memory Select
J46 SPI Select SPI X4 Memory U32 Jump 1-2
System ACE CF Error LED
J60 System ACE CF Error LED DS18 Enabled Jump 1-2
X-Ref Target - Figure 3
Figure 3: Compact Flash Card Installation and DIP Switch Settings
UG727_02_111309
UG727_03_111309

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Introduction
Now you are ready to run the pre-built Video Demo provided with this kit. Follow the next
set of instructions to run the demo.
Running the Video Demo
1. If the SP605 board is not already powered on, plug in the power adapter to local AC
power. Plug the 12V power cable into the board connector on J18. Turn on the power
by switching the SW2 to the “ON” position.
2. After a couple of seconds, the Xilinx logo should be displayed on the DVI (or VGA)
monitor.
3. Open a web browser on the host computer and set the URL to 192.168.1.10.
4. You should see the web page shown in Figure 4. The various selections in the Web
page and the operation performed are described in Table 3
.
Ta b le 2 : Video Demo System ACE DIP Switch Settings
DIP Switch Switch Position
1Off
2Off
3Off
4On
X-Ref Target - Figure 4
Figure 4: Video Demo Web Page
UG727_04_111309

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Introduction
5. Try clicking the various options that adjust the image and notice the affect on the
image displayed on the monitor.
6. Either select one of the displayed images or click Browse and select a new image from
the SP605_Embedded_Kit\Test_Images directory.
The selected image should now be displayed on the DVI (or VGA) monitor.
7. Repeat step 5 and step 6 as desired.
Congratulations! You have now run a Video demo using the SP605 board with Spartan-6 LX45T
FPGA and the MicroBlaze soft processor. Since you are provided with a fully
configured MicroBlaze Processor Subsystem, you can start developing embedded
software. Also since you are using an FPGA, you can fully customize this
processor system. In order to do this, you have to install the ISE Design Suite 12.1
tools and the USB-UART driver on your computer. The Installation and Licensing
of ISE Design Suite 12.1 section of this document will guide you through these
steps.
Getting Started with the PetaLinux Demonstration
This Spartan-6 Embedded Kit comes with a PetaLinux demo available on the provided
Compact Flash card. PetaLinux is an Embedded Linux System Development Kit
specifically targeting FPGA-based system-on-chip designs. You can run this demo to get
an overview of the features of the SP605 Evaluation Board using a MicroBlaze Processor
Subsystem in the Spartan-6 LX45T FPGA. More information about PetaLogix, including
how to evaluate or purchase it, can be found at http://www.petalogix.com/petalinux.
Ta b le 3 : Video Demo Web Page Selections
Selection Operation
Image Selection
Either select one of the images shown or browse to an
uncompressed 24BPP Windows bitmap image in the
SP605_Embedded_Kit\Test_Images directory. This image is sent to
the MicroBlaze Processor Subsystem and displayed. FIR filters are
applied to the image.
Identity Output image is unmodified.
Edge Detect Areas of high contrast are detected and shown in white; the
remainder of the image is black.
Smooth A slight blurring effect is applied to the output image.
Sharpen Contrast is increased in the output image.
User Manually entered coefficients are sent to the MicroBlaze Processor
Subsystem and applied to the output image.
Auto The MicroBlaze Processor Subsystem continuously cycles from
Identity to Edge Detect effects until a new selection is chosen.
Gain Slider controls the output image gain (0.0 - 1.0).

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Introduction
Processor System Used for the PetaLinux Demo
The provided PetaLinux demo uses a pre-built Spartan-6 FPGA design (Figure 5) with the
following features:
• MicroBlaze soft processor
• External DDR3 Memory Interface
• External Memory Controller (EMC) for Flash memory
• On-chip Memory (Block RAM)
• Tri-Mode Ethernet MAC (evaluation license)
• UART (connected from SP605 board via the USB-UART connector)
• Interrupt Controller (Intc) & Timer
• Compact Flash Interface (System ACE CF technology)
•GPIO(LEDs,LCD,Switches)
Note: Details about the system used for the PetaLinux demo can be found in DS757 SP605
Embedded Kit MicroBlaze Processor Subsystem Data Sheet.
X-Ref Target - Figure 5
Figure 5: Spartan-6 FPGA PetaLinux Demo System
UG757_SP6_051110
LEDs
UART
16550
RS232
Line Driver/
Receiver
Ethernet
PHY
Tr i M o d e
Ethernet
MAC
Switches
Buttons
Input/Output
MicroBlaze
8KB I and D Caches
MMU
Internal RAM
(8KB)
Interrupt
Controller
Dual
Timer/Counter
Processor Block
FLASH/SRAM
Controller
SysACE
Compact Flash
Controller
Multiport
Memory
Controller
Internal
RAM
(32 KB)
IIC EEPROM
Controller
FLASH
(32 MB)
Compact
FLASH
SPI
Flash
Controller
SPI
FLASH
DDR3
(128MB)
IIC
EEPROM
Memory
MicroBlaze Processor Subsystem
XC6SLX45T
Configurable User Logic
User Access to
External Memory
User Access to
Internal Memory
User Interrupts
GPIO
GPIO
GPIO

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Introduction
PetaLinux Demo Hardware Setup Instructions
1. Install the USB-UART driver to your host computer by executing the steps specified in
the Communicating with the SP605 USB-UART section.
2. Confirm that the SP605 jumper settings are at default, as shown in Table 4.
3. Insert the provided Compact Flash card into the board as shown in Figure 3.
4. Set the System ACE DIP switches as shown in Table 5.
Note: This is the same DIP switch as shown in Figure 3. However, Figure 3 shows the switch
settings for the Video Demo, not the PetaLinux Demo.
5. If the SP605 board is not powered on, plug in the power adapter to local AC power.
Plug the 12V power cable into the board connector on J18. Turn on the power by
switching the SW2 to the "ON" position.
6. Open and configure a serial communications terminal utility program with the
following settings:
•BaudRate:115200
• Data: 8bit
•Parity:None
•Stop:1bit
• Flow Control: None
Note: Note: The baud rate (115200) for the PetaLinux demo is not the same baud rate (9600) used
for the Video demo.
Ta b le 4 : SP605 Jumper Settings
Jumper REFDES Function Default
FMC JTAG Bypass
J19 Exclude FMC LPC connector J2 Jump 1-2
SFP Module
J22 SFP Full BW Jump 1-2
J44 SFP Enabled Jump 1-2
SPI Memory Select
J46 SPI Select SPI X4 Memory U32 Jump 1-2
System ACE CF Error LED
J60 System ACE CF Error LED DS18 Enabled Jump 1-2
Ta b le 5 : PetaLinux Demo System ACE DIP Switch Settings
DIP Switch Switch Position
1On
2Off
3Off
4On

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Introduction
Now you are ready to run the PetaLinux pre-built demo provided with this kit. Follow the
next set of instructions to run the demo.
Running the PetaLinux Demo
7. Press the SYSACE Reset button (SW9).
8. After ~20 seconds, the PetaLinux boot output should be displayed on the serial
communications window as shown in Figure 7.
Note: The PetaLinux boot image in Figure 7 refers to version 11.4. However, this is the valid boot
image for the 12.1 release.
9. Login with user name as root and password as root.
10. The PetaLinux image provided with the Embedded Kit supports many basic Linux
commands. A list of some of the commands and tools available to be run can be found
in the /bin directory.
Congratulations! You have now run the PetaLinux demo using the SP605 board with Spartan-6
LX45T FPGA and the MicroBlaze soft processor. Because you are provided with a
fully configured MicroBlaze Processor Subsystem, you can start developing
embedded software. Also because you are using an FPGA, you can fully
customize this processor system. To do this, you have to install the ISE Design
X-Ref Target - Figure 6
Figure 6: SP605 SYSACE RESET Button
X-Ref Target - Figure 7
Figure 7: PetaLinux UART Output
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Installation and Licensing of ISE Design Suite 12.1
Suite 12.1 tools on your computer. The Installation and Licensing of ISE Design
Suite 12.1 section of this document will guide you through these steps.
Installation and Licensing of ISE Design Suite 12.1
This SP605 Embedded Kit comes with entitlement to a full seat of the ISE Design Suite:
Embedded Edition that is device locked to a Spartan-6 LX45T. This software can be
installed from the DVD or the Web installer can be downloaded from
http://www.xilinx.com/support/download/index.htm.
ISE 12.1 Software Installation
1. Run the ISE Design Suite 12.1 Installer:
a. Option 1: Insert the ISE Design Suite 12.1 DVD included in this kit into your
computer
-If the Installer does not start automatically, run the “xsetup” executable from
the DVD
b. Option 2: Run the Web Installer that you can download from
http://www.xilinx.com/support/download/index.htm
You will be prompted with a Welcome dialog (Figure 8), two License agreements
(Figure 9 and Figure 10), a selection of which tool edition to install (Figure 11),
installation options (Figure 12), and an opportunity to select where you would like to
install the software (Figure 13).
Note: It is recommended that you accept the two license agreements, install the ISE Design Suite:
Embedded Edition, and accept the default install location.
X-Ref Target - Figure 8
Figure 8: ISE Design Suite Install Welcome Screen
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Installation and Licensing of ISE Design Suite 12.1
X-Ref Target - Figure 9
Figure 9: ISE Design Suite Third-Party Usage License Agreement
X-Ref Target - Figure 10
Figure 10: ISE Design Suite End-User License Agreement
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Installation and Licensing of ISE Design Suite 12.1
X-Ref Target - Figure 11
Figure 11: ISE Design Suite Edition Selection
X-Ref Target - Figure 12
Figure 12: Installation Options
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