XMOS SliceKit User manual

sliceKIT hardware manual
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Publication Date: 2013/11/6
XMOS © 2013, All Rights Reserved.

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Table of Contents
1 Overview 3
1.1 Introduction .......................................... 3
1.2 sliceKIT system layout .................................... 4
2 Core board 6
2.1 Multiple core boards ..................................... 7
2.2 Setup .............................................. 7
2.3 Power supply .......................................... 7
2.4 Debug .............................................. 7
2.5 XS1-L16 boot .......................................... 8
2.6 xCONNECT Links ....................................... 9
2.7 Reset .............................................. 10
2.8 Clocking ............................................ 10
2.9 Testpoints ........................................... 10
2.10 Slot pinouts .......................................... 13
2.10.1 STAR .......................................... 14
2.10.2 SQUARE ......................................... 16
2.10.3 TRIANGLE ....................................... 18
2.10.4 CIRCLE ......................................... 20
2.10.5 CHAIN ......................................... 22
2.10.6 System services slot signals ............................. 23
3 sliceCARDs and slots 24
4 Designing a sliceCARD 25
4.1 Power .............................................. 25
4.2 Signal I/O ............................................ 25
4.3 sliceCARD form factors .................................... 26
4.4 Connector pinouts ....................................... 27
4.4.1 STAR .......................................... 28
4.4.2 SQUARE ......................................... 29
4.4.3 TRIANGLE ....................................... 30
4.4.4 CIRCLE ......................................... 31
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1 Overview
IN THIS CHAPTER
·Introduction
·sliceKIT system layout
1.1 Introduction
This document covers the hardware design of the sliceKIT Modular Development
System, consisting of the core board, sliceCARDs and xSYS adaptor.
The core board contains a fully pinned out 16-core xCORE multicore microcon-
troller. All GPIOs are connected to four expansion connectors (termed slots ) which
interface with expansion cards called sliceCARDs that plug into the slots. The core
board also contains all circuitry necessary for operating and debugging the xCORE
system. Multiple sliceKIT core boards can be interconnected to form a multi xCORE
device system with dual 5-bit xCONNECT Links being present between the boards.
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1.2 sliceKIT system layout
OFF ON
xCONNECT
Link
xSYS
xTAG-2
TILE 0
TILE 0
TILE 1
TILE 1
XS1-L16
XS1-L16
sliceKIT core board
sliceKIT core board
12VDC/1A
12VDC/1A
The diagram above shows an overview of the layout of the core board with slice-
CARDs attached. Each of the four slots has a specific label - Star , Triange , Square ,
Circle printed on the core board silkscreen. Triangle and Circle sliceCARDs
contain 24 xCORE I/Os, and the Star and Square sliceCARDs have 20 xCORE
I/Os (usable as GPIO or two 5-wire xCONNECT links). The label denotes which
sliceCARDs are compatible with which core board slots. The sliceCARDs are also
marked with one or more of these labels to identify the slot type(s) they function
correctly with.
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The final type of connector is on the bottom left of the core board and is marked
with a hollow square symbol with an X through it. This is for connecting multiple
core boards together to form systems of 32 logical cores or more. It is termed the
chain slot.
All slots are 36 pin PCI express style connectors in either socket or edge finger
(plug) types.
Star and Triangle slots are pinned out from Tile 0 of the XS1-L16 xCORE device
and the Circle and Square slots from Tile 1.
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2 Core board
IN THIS CHAPTER
·Multiple core boards
·Setup
·Power supply
·Debug
·XS1-L16 boot
·xCONNECT Links
·Reset
·Clocking
·Testpoints
·Slot pinouts
The L16 core board board contains the xCORE device plus support circuitry.
A single XS1-L16-128-QF124 device has all of its GPIO connected to the slots.
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2.1 Multiple core boards
Additional sliceKIT core boards can be connected to the Chain slot on the first
board via the Square Slot on the second board, to add extra processing capability
and I/O through extra sliceCARDs. The first board is termed the Master and the
remaining boards are Slaves. When there is only one board, it is the Master.
2.2 Setup
For debugging, an xSYS adaptor board is connected to the Chain connector of the
Master board to allow connection of an xTAG-2 which provides a debug link from a
USB host.
The core board is powered by a 12V external power supply.
2.3 Power supply
Power input to the sliceKIT core board is via a standard barrel jack connector. A
standard 12V external power supply should be used to power the board. Each core
board requires its own 12V supply. This input supply is used to generate the main
5V board supply via a DC-DC converter.
The 5V board supply is then fed to all the slot connectors as well as powering the
core board itself. 3V3 and 1V0 supplies are be generated by DC-DC converters
from the 5V main supply.
The supplies are sequenced to ensure the power up sequence is 5V then 3V3 then
1V0. When the 1V0 supply is good, the system is released from reset.
The core board provides 3V3 and 5V at 0.25A each for a total of approximately 2W
per slice.
2.4 Debug
Debug of the system is via the xSYS adapter board connected to the Chain connec-
tor.
The JTAG signals are connected as shown below.
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SOCKET_10
PLUG_00
xTAG-2
TCK
TDI
TDO
TDO
TCK
PRSNT
0
1
TDO
TCK, TMS
TDO
TDI
PRSNT_N
0
1
XS1-L16
TDI
TMS
TMS
TDI
TCK
TMS
Presence detect signals are present on both the Chain connector and Square slot
connectors to allow detection of a connected board and subsequent automatic
switching of the JTAG chain. In a system of multiple core boards, the Master is the
source of the JTAG chain so the system can only be debugged from the master.
Other boards will see no devices in the JTAG chain.
The use of xSCOPE is covered in the xCONNECT Links section. The xSCOPE
xCONNECT Link can be either enabled or disabled via a switch on the xSYS adapter
board.
2.5 XS1-L16 boot
Master core boards boot from SPI flash, while slave core boards boot from xCON-
NECT link XLB from the next connected core board.
To allow re-use of the SPI boot pins (ports 1A, 1B, 1C, 1D) as signal I/O pins for
the Star slot, a latched bus switch is used which connects the xCORE SPI pins to
either the SPI Flash or to the sliceCARD slots. The switch is controlled by X0D42
and X0D43 (P8D6 and P8D7 on Tile 0 - on the Triangle slot). Once the device
has booted, X0D43 is used to enable or disable the SPI interface, X0D42 should
Reset
D42 = 0
D43 = X
SPI = EN
Boot
D42 = 0
D43 = X
SPI = EN
Disable
D42 =
D43 = 1
SPI = DIS
Enable
D42 =
D43 = 0
SPI = EN
D42, D43, D0
D1, D10, D11
available
D42, D43 available;
D0, D1, d10, D11
used by SPI
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then transition from low to high to latch the selection. The SPI selection state is
maintained until the system is reset.
Reset
D42 = 0
D43 = X
SPI = EN
Boot
D42 = 0
D43 = X
SPI = EN
Disable
D42 =
D43 = 1
SPI = DIS
Enable
D42 =
D43 = 0
SPI = EN
D42, D43, D0
D1, D10, D11
available
D42, D43 available;
D0, D1, d10, D11
used by SPI
Once this sequence is completed and the selection has been latched, X0D42 and
X0D43 return to performing their normal functions in the Triangle slot.
If the SPI is not disabled, then SliceCARDs in the Star slot may not function as
expected. If there is no sliceCARD in the Star slot, then it does not matter whether
the SPI has been disabled or not. Therefore, applications which require runtime
access to the SPI flash should either leave the Star slot unpopulated or check to
ensure that the sliceCARD which is in the slot will be unaffected by the operation
of the flash device.
The xTAG-2 system can use the boot mode select signal to force all devices in the
chain (master and slave core boards) to boot from JTAG (don’t boot) for debug
purposes.
If not in this mode, the devices will boot from SPI or xCONNECT Link as appropriate.
2.6 xCONNECT Links
The Chain connector contains two 5-bit xCONNECT Links, XLA and XLB, which can
be used to chain sliceKIT core boards together. The links from Tile 0 are connected
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to the Chain connector and the Star slot. The links from Tile 1 are connected to
the Square slot.
The only complication in this system is use of the xSCOPE 2-bit xCONNECT Link.
This link overlaps a 4 bit port on the Star slot connector so it is not possible to use
this for user I/O at the same time as xSCOPE.
To work around this, a switch is present on the xSYS adapter board to either enable
or disable the xSCOPE xCONNECT Link. When disabled, these pins are disconnected
from the Chain connector and are free for use on the Star slot. When enabled they
will work as an xCONNECT Link and hence appear on the relevant pins of the Star
slot.
It is recommended that if a sliceCARD is used in the Star Slot the XSCOPE switch is
off on the xSYS adaptor card to ensure correct operation of the sliceCARD in the
Star slot.
2.7 Reset
The whole system is held in reset until all power supplies are stable, and reset
is connected to all Slice Cards so any circuitry on them can be reset. Reset also
indicates to the sliceCARDs that their power input is stable. The reset from the
xTAG-2 resets the whole system, if required for debugging.
2.8 Clocking
The system clock has two sources: an on-board 25MHz oscillator or the CLK signal
from the Chain connector. The system clock source is selected automatically
according to the presence of signals on the Chain connector.
This means the system clock from a Master core board is fed automatically to all
of the slave core boards so the whole system will operate synchronously.
The system clock is also fed to each of the sliceCARD slots.
2.9 Testpoints
Each xCORE I/O signal is also available on a 0.1” header, next to the slot that it is
connected to. These connections can be used to connect an oscilloscope or logic
analyser, or for interconnection of signals for advanced development work.
The signals are identified on the silkscreen layer of the sliceKIT core board; the
table below lists their relationship to the internal ports.
L16 Pin Slot PCIE Function
X0D0 TRIANGLE B2 P1A0
X0D1 STAR A8 P1B0
CHAIN B10
(continued)
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