Yamaha AFC1 User manual

1
AFC1
SERVICE MANUAL
PA 011691
200306-オープンプライス Copyright (c) Yamaha Corporation. All rights reserved. PDF-K8841 ’03.07
HAMAMATSU, JAPAN
CONTENTS
SPECIFICATIONS .............................................. 3/4
PANEL LAYOUT ..................................... 5
CIRCUIT BOARD LAYOUT ................. 6
DIMENSIONS ............................................................ 7
DISASSEMBLY PROCEDURE .............................. 8
LSI PIN DESCRIPTION .............................. 12
IC BLOCK DIAGRAM ................................... 18
CIRCUIT BOARDS ....................................... 20
TEST PROGRAM AND INSPECTION
................................. 28/32
FIRMWARE PROGRAM UPDATE ...... 37
SOUND CHECK FILE FOR SERVICE ....................... 38/40
ERROR MESSAGES ............................. 42
MIDI IMPLEMENTATION CHART......................................... 43
MIDI DATA FORMAT............................................................. 44
PARTS LIST
POWER SUPPLY UNIT RERAIR MANUAL
BLOCK DIAGRAM
WIRING
CIRCUIT DIAGRAM
（総合仕様）
（パネルレイアウト）
（ユニットレイアウト）
（
寸法図 ）（分解手順）
（LSI端子機能表）
（ICブロック図）
（シート基板図）
（テストプログラムと検査）
（ファームウェアプログラムのバージョンアップ）
（サービス用音声チェックファイル）
（エラーメッセージ）
（電源ユニットリペアマニュアル）
（ブロックダイアグラム）
（総コネクタ接続回路図）
（回路図）
（目次）
ACTIVE FIELD CONTROLLER

AFC1
2
LITHIUM BATTERY HANDLING
This product uses a lithium battery for memory back-up.
WARNING : Lithium batteries are dangerous because they can be exploded by improper handling. Observe the following pre-
cautions when handling or replacing lithium batteries.
Leave lithium battery replacement to qualified service personnel.
Always replace with batteries of the same type.
When installing on the PC board by soldering, solder using the connection terminals provided on the battery cells.
Never solder directly to the cells. Perform the soldering as quickly as possible.
Never reverse the battery polarities when installing.
Do not short the batteries.
Do not attempt to recharge these batteries.
Do not disasemble the batteries.
Never heat batteries or throw them into fire.
ADVARSEL!
Lithiumbatteri-Eksplosionsfare ved fejlagtig handtering. Udskiftning ma kun ske med batteri af samme fabrikat og type. lever det brugte
batteri tilbage til leverandren.
VARNING
Explosionsfara vid felaktigt batteribyte.
Anvand samma batterityp eller en ekvivalent typ som rekommenderas av apparattillverkaren.
Kassera anvant batteri enligt fabrikantens instruktion.
VAROITUS
Paristo voi rajahtaa, jos se on virheellisesti asennettu.
Vaihda paristo ainoastaan laitevalmistajan suosittelemaan tyyppiiin.
Havita kaytetty paristo valmistajan ohjeiden mukaisesti.
The following information complies with Dutch official Gazette 1995. 45; ESSENTIALS OF ORDER ON THE COLLECTION OF BATTERIES.
• Please refer to the diassembly procedure for the removal of Back-up Battery.
• Leest u voor het verwijderen van de backup batterij deze beschrijving.
WARNING: CHEMICAL CONTENT NOTICE!
The solder used in the production of this product contains LEAD. In addition, other electrical/electronic and/or plastic (Where
applicable) components may also contain traces of chemicals found by the California Health and Welfare Agency (and possibly
other entities) to cause cancer and/or birth defects or other reproductive harm.
DO NOT PLACE SOLDER, ELECTRICAL/ELECTRONIC OR PLASTIC COMPONENTS IN YOUR MOUTH FOR ANY REASON WHAT
SO EVER!
Avoid prolonged, unprotected contact between solder and your skin! When soldering, do not inhale solder fumes or expose
eyes to solder/flux vapor!
If you come in contact with solder or components located inside the enclosure of this product, wash your hands before handling
food.
IMPORTANT NOTICE
This manual has been provided for the use of authorized Yamaha Retailers and their service personnel. It has been assumed
that basic service procedures inherent to the industry, and more specifically Yamaha Products, are already known and under-
stood by the users, and have therefore not been restated.
WARNING : Failure to follow appropriate service and safety procedures when servicing this product may result in per-
sonal injury, destruction of expensive components and failure of the product to perform as specified. For
these reasons, we advise all Yamaha product owners that all service required should be performed by an
authorized Yamaha Retailer or the appointed service representative.
IMPORTANT : This presentation or sale of this manual to any individual or firm does not constitute authorization certifi-
cation, recognition of any applicable technical capabilities, or establish a principal-agent relationship of
any form.
The data provided is belived to be accurate and applicable to the unit(s) indicated on the cover. The research engineering, and
service departments of Yamaha are continually striving to improve Yamaha products. Modifications are, therefore, inevitable
and changes in specification are subject to change without notice or obligation to retrofit. Should any discrepancy appear to
exist, please contact the distributor’s Service Division.
WARNING : Static discharges can destroy expensive components. Discharge any static electricity your body may have
accumulated by grounding yourself to the ground bus in the unit (heavy gauge black wires connect to
this bus.)
IMPORTANT : Turn the unit OFF during disassembly and parts replacement. Recheck all work before you apply power
to the unit.
リチウム電池の取り扱い
＜注意＞
リチウム電池を誤って交換すると爆発する危険があります。交換する場合は、サービスマニュアルで指定された部品を
使用してください。

3
AFC1
SPECIFICATIONS
IMPORTANT NOTICE FOR THE UNITED KINGDOM
Connecting the Plug and Cord
WARNING:THIS APPARATUS MUST BE EARTHED
IMPORTANT. The wires in this mains lead are coloured in
accordance with the following code:
GREEN-AND-YELLOW : EARTH
BLUE : NEUTRAL
BROWN : LIVE
As the colours of the wires in the mains lead of this apparatus
may not correspond with the coloured markings identifying the
terminals in your plug proceed as follows:
The wire which is coloured GREEN-and-YELLOW must be con-
nected to the terminal in the plug which is marked by the letter
E or by the safety earth symbol or colored GREEN or
GREEN-and-YELLOW.
The wire which is coloured BLUE must be connected to the ter-
minal which is marked with the letter N or coloured BLACK.
The wire which is coloured BROWN must be connected to the
terminal which is marked with the letter L or coloured RED.
• This applies only to products distributed by Yamaha-Kemble Music (U.K.) Ltd.(3
wires)
WARNING
Components having special characteristics are marked and
must be replaced with parts having specification equal to those
originally installed.
• General
Sampling
frequency Internal 48 kHz
External 39.69 to 50.88 kHz
Signal delay 0.21 ms (direct cable routed from Input
1 to output 1, fs = 48 kHz)
Memory Configuration 2 (AA, SURROUND)
PATTERN 6 (for each configuration)
Indicators 7-segment LED x 2
Power source 120 V, 60 Hz
Power consumption 40 W
Max. dimensions (W x H x D) 480 x 141.5 x 373 mm
Weight 9.5 kg
Operating temperature 5 ˚C to 35 ˚C
Storing temperature –20 ˚C to 60 ˚C
Power cord length 2.5 m
Accessories Power cord, removal-proof fixing clamp
16-pin Euro-block connectors x 4
Owner’s Manual
Options Digital audio cable CAS003
Digital audio cable CAS015
I/Os Format Level Connector
specifications
WORD CLOCK
INPUT — TTL BNC
WORD CLOCK
OUTPUT — TTL BNC
MIDI IN MIDI — DIN 5-pin
MIDI OUT MIDI — DIN 5-pin
CASCADE IN ——
Half-pitch
50-pin
CASCADE OUT ——
Half-pitch
50-pin
PC CONTROL —RS232C/
RS422 9-pin D-sub
FOR SERVICE USE — RS422 9-pin D-sub
GPI IN (x16) — 0 to 5 V Euro-block
GPI OUT (x16) — 0 to 5 V Euro-block
GPI +V (x16) — 6 mA max Euro-block
SLOT (x4) mini YGDAI — —
Card name Format Inputs Outputs
MY8-AT ADAT 88
MY8-TD TASCAM 88
MY8-AE AES/EBU 88
MY4-AD Analog input 4
MY8-AD Analog input 8
—
—
MY8-AD24 Analog input 8—
• Control I/Os
• SLOT 1 through 4
The following digital interface cards can be installed in Slots 1-4 on the rear panel.
Slot 1 is a serial interface.
Card name Format Inputs Outputs
MY4-DA Analog output —4
MY8-AD96 Analog input 8—
MY8-DA96 Analog output —8
MY8-mLAN mLAN 88
• The following cards are not supported for the AFC1:
MY8-AE96, MY8-AE96S, MY16-AT, MY16-TD, MY16-AE, Y56K
• MY8-mLAN is recognized as MY8-AE.
印の部品は、安全を維持するために重要な部品です。交換する
場合は、安全のために必ず指定の部品をご使用ください。

AFC1
4
総合仕様
• 一般仕様
サンプリング 
周波数 内部 48 kHz
外部 39.69 〜50.88 kHz
シグナルディレイ 0.21 ms (インプット1からアウトプット1
へダイレクトケーブル、fs = 48 kHz)
メモリー
コンフィグレーション 2 (AA, SURROUND)
PATTERN コンフィグレーション1つに付き、6個
インジケーター 7 セグメントLED x 2
電源 100 V、50/60 Hz
消費電力 40 W
最大外形寸法 (W x H x D) 480 x 141.5 x 373 mm
質量 9.5 kg
動作保証温度 5 ˚C 〜35 ˚C
保管温度 –20 ˚C 〜60 ˚C
電源コード長 2.5 m
付属品 電源ケーブル、誤脱防止クランプ
ユーロブロックコネクター16ピン x 4
取扱説明書、保証書
オプション品 デジタルオーディオケーブル CAS003
デジタルオーディオケーブル CAS015
入出力端子 フォーマット レベル 仕様コネクター

WORD CLOCK
INPUT — TTL BNC
WORD CLOCK
OUTPUT — TTL BNC
MIDI IN MIDI — DIN 5ピン
MIDI OUT MIDI — DIN 5ピン
CASCADE IN ——
ハーフピッチ
50ピン
CASCADE OUT ——
ハーフピッチ
50ピン
PC CONTROL —RS232C/
RS422 9ピン D-sub
FOR SERVICE USE — RS422 9ピン D-sub
GPI IN (x16) —0〜5 V ユーロブロック

GPI OUT (x16) —0〜5 V ユーロブロック

GPI +V (x16) — 6 mA max ユーロブロック

SLOT (x4) mini YGDAI — —
カード名 フォーマット 入力 出力
MY8-AT ADAT 88
MY8-TD TASCAM 88
MY8-AE AES/EBU 88
MY4-AD アナログ入力 4
MY8-AD アナログ入力 8
MY8-AD24 アナログ入力 8
MY4-DA アナログ入力 —4
MY8-AD96 アナログ入力 8
—
—
—
—
MY8-DA96 アナログ出力 —8
MY8-mLAN mLAN 88
• コントロールI/O
• SLOT 1 〜4
リアパネルのSLOT1〜4には、以下のデジタルインターフェー
スカードが使用できます。
SLOT1はシリアルインターフェースです。
• 次のカードは使用できません:MY8-AE96、MY8-AE96S、
MY16-AT、MY16-TD、MY16-AE、Y56K
• MY8-mLANは、MY8-AEとして認識されます。

5
AFC1
Front panel
PANEL LAYOUT
1
3
4 14 15
5 6 7 8 9 10 11 12 13
2
1
PATTERN/LIVENESS indicator
2
POWER switch
1
PATTERN/LIVENESS インジケーター
2
POWER スイッチ
3
AC IN connector
4
Grounding screw
5
WORD CLOCK OUT connector
6
WORD CLOCK 75ΩON/OFF switch
7
WORD CLOCK IN connector
8
MIDI IN/OUT connectors
9
PC CONTROL RS232C/RS422 switch
10
PC CONTROL port
11
FOR SERVICE USE port
12
CASCADE OUT port
13
CASCADE IN port
14
GPI connectors
15
SLOTs 1–4
3
AC INソケット
4
アース用ネジ
5
WORD CLOCK OUT 端子
6
WORD CLOCK 75ΩON/OFF スイッチ
7
WORD CLOCK IN 端子
8
MIDI IN/OUT 端子
9
PC CONTROL RS232C/RS422 スイッチ
10
PC CONTROL 端子
11
FOR SERVICE USE 端子
12
CASCADE OUT 端子
13
CASCADE IN 端子
14
GPI 端子
15
SLOT（スロット）1–4
Rear panel
（フロントパネル）
（パネルレイアウト）
（リアパネル）

AFC1
6
CIRCUIT BOARD LAYOUT
< Rear view>
< Top view>
< Front view>
CN005
CN010
CN012
CN014
CN013
CN011
CN016
CN502
CN501
Power supply unit
(電源ユニット)
MAIN PNR (GPI)
PNF (LED) PNF (PSW)
PNR
(MYMB)
SUB
（ユニットレイアウト）

7
AFC1
Units: mm
（単位）
W: 480
430
355
D: 373
81 81318
9.5
30
(34) 18
30
43.5 277.5
132
H: 141.5
DIMENSIONS（寸法図）

AFC1
8
< Top view >
< Left side view > < Right side view >
[470]
Top cover（トップカバー）
[470]
[470]
[470]
[70]
[345A] Mount bracket
（マウントブラケット） Mount bracket
（マウントブラケット）
[350][350]
[345A] [320] x 4
DISASSEMBLY PROCEDURE
[70]: Bind Head Tapping Screw-B（＋バインド B タイト）A4.0X8 MFZN2BL (VC688800)
[320]: Bind Head Tapping Screw-B（＋バインド B タイト）A4.0X8 MFZN2BL (VC688800)
[345A]: Oval Head Screw（＋丸皿小ネジ）4.0X8 MFZN2BL (VS153600)
[350]: Oval Head Screw（歯付座金付＋丸皿小ネジ）B4.0X10 MFZN2BL (V6221000)
[470]: Bind Head Tapping Screw-B（＋バインド B タイト）A4.0X8 MFZN2BL (VC688800)
Fig .1 (図1)
1. トップカバー(所要時間：約 2 分)
1-1 [470]のネジ14本を外して、トップカバーを外しま
す。(図 1)
2. フロントパネル Ass'y(所要時間：約 5 分)
2-1 トップカバーを外します。(1 項参照)
2-2 [345A]のネジ 8本と[350]のネジ 2 本を外して、左
右のマウントブラケットを外します。(図 1)
2-3 [70]のネジ1本と[320]のネジ4本を外して、フロン
トパネル Ass'y を外します。(図 1)
1. Top Cover (Time required: About 2 minutes)
1-1 Remove the fourteen (14) screws marked [470].The
top cover can then be removed.(Fig. 1)
2. Front Panel Assembly
(Time required: About 5 minutes)
2-1 Remove the top cover. (See procedure 1.)
2-2 Remove the eight (8) screws marked [345A] and
the two (2) screws marked [350].The left and right
mount brackets can then be removed.(Fig. 1)
2-3 Remove the screw marked [70] and the four (4)
screws marked [320].The front panel assembly can
then be removed. (Fig. 1)
3. MAIN+SUB Circuit Boards
(Time required: About 5 minutes)
3-1 Remove the top cover. (See procedure 1.)
3-2 Remove the four (4) screws marked [A], the four
(4) screws marked [B], the two (2) screws marked
[420], the two (2) screws marked [430] and the five
(5) screws marked [440]. The MAIN+SUB circuit
boards can then be removed.(Fig. 2, 3)
3. MAIN ＋ SUB シート(所要時間：約 5分)
3-1 トップカバーを外します。(1 項参照)
3-2 [A]のネジ 4 本と[B]のネジ 4 本、[420]のネジ 2 本、
[430]のネジ2本、[440]のネジ5本を外して、MAIN
＋ SUB シートを外します。(図 2,3)
（分解手順）

9
AFC1
< Top view >
• Lithium Battery（リチウム電池）
[440]
[440]
MAIN
+
SUB
Battery VN103500
VN103600(Battery holder for VN103500)
Notice for back-up battery removal
Push the battery as shown in figure,
then the battery will pop up.
Druk de batterij naar beneden zoals
aangeven in de tekening de batterij
springt dan naar voren.
Battery
Battery holder
< Rear view >
[170A] [420] [430] [A]
[40c] [290] [290]
PNR (GPI)
[B]
4. Replacement of the Lithium Battery
(Time required: About 2 minutes)
4-1 Remove the top cover. (See procedure 1.)
4-2 The lithium battery can be replacement on the MAIN
circuit board. (Fig. 3)
The lithium battery is not a part of the MAIN circuit
board.Therefore, always save the data before
exchanging the MAIN circuit board.Once the data
has been saved, the lithium battery can be
removed from the circuit board for the Main body
and mounted to the new circuit board.
4. リチウム電池の交換(所要時間：約2 分)
4-1 トップカバーを外します。(1 項参照)
4-2 MAIN シート上より、リチウム電池を交換するこ
とが出来ます。(図 3)
※ リチウム電池は、MAINシートの構成部品ではあり
ません。MAINシートを交換する際には、まず交換
前にデータを保存し、その後本体のシートからリ
チウム電池を取り外して新しいシートに取り付け
てください。
[40c]: Support（サポート）(V5600300)
[170A]: Bind Head Tapping Screw-B（＋バインド B タイト）
A4.0X8 MFZN2BL (VC688800)
[290]: Pan Head Screw（＋ナベ小ネジ）2.6X6 MFZN2BL (VC990500)
[420]: Bonding Screw（＋ボンディング小ネジ）3.0X6 MFZN2BL (VS863000)
[430]: Bonding Tapping Screw-B（＋ボンディング B タイト）
3.0X8 MFZN2BL (VN413300)
Fig .2 (図2)
[440]: Bind Head Tapping Screw-B（＋バインドB タイト）
3.0X6 MFZN2BL (EP600230)
Fig .3 (図3)

AFC1
10
5. 電源ユニット(所要時間：約 3 分)
5-1 トップカバーを外します。(1項参照)
5-2 [150]のネジ 2 本を外して、電源ユニットを外しま
す。(図 4)
6. AC インレット(所要時間：約 4 分)
6-1 トップカバーを外します。(1項参照)
6-2 [170A]のネジ2本と[170B]のネジ4 本、[345B]のネ
ジ 2 本を外して、サイドパネルR とマウントブラ
ケットを外します。(図 2,4)
6-3 [40c]のサポート2本と[80]のネジ1本を外して、AC
インレットを外します。(図 2,4)
7. PNR(MYMB),PNR(GPI)シート
(所要時間：各約6分)
7-1 トップカバーを外します。(1 項参照)
7-2 MAIN ＋ SUB シートを外します。(3 項参照)
7-3 PNR(MYMB)シート：
[240]のネジ4本を外して、PNR(MYMB)シートを
外します。(図 4)
7-4 PNR(GPI)シート：
[290]のネジ8本を外して、PNR(GPI)シートを外し
ます。(図 2,4)
8. PNF(LED),PNF(PSW)シート(所要時間：各約6分)
8-1 トップカバーを外します。(1項参照)
8-2 フロントパネル Ass'y を外します。(2 項参照)
8-3 [90]のネジ6本を外して、フロントパネルを外しま
す。(図 5)
8-4 PNF(LED)シート：
[30]のネジ1本を外して、PNF(LED)シートを外し
ます。(図 6)
8-5 PNF(PSW)シート：
PSW ノブを抜き取ります。[60]のネジ2 本を外し
て、PNF(PSW)シートを外します。(図 5,6)
5. Power Supply Unit
(Time required: About 3 minutes)
5-1 Remove the top cover. (See procedure 1.)
5-2 Remove the two (2) screws marked [150]. The
power supply unit can then be removed. (Fig. 4)
6. AC Inlet (Time required: About 4 minutes)
6-1 Remove the top cover. (See procedure 1.)
6-2 Remove the two (2) screws marked [170A], the four
(4) screws marked [170B] and the two (2) screws
marked [345B].The side panel R and the mount
bracket can then be removed. (Fig. 2, 4)
6-3 Remove the two (2) supports marked [40c] and the
screw marked [80]. The AC inlet can then be
removed. (Fig. 2, 4)
7. PNR(MYMB) and PNR(GPI) Circuit Boards
(Time required: About 6 minutes each)
7-1 Remove the top cover. (See procedure 1.)
7-2 Remove the MAIN+SUB circuit boards.
(See procedure 3.)
7-3 PNR(MYMB) Circuit Board:
Remove the four (4) screws marked [240]. The
PNR(MYMB) circuit board can then be removed.
(Fig. 4)
7-4 PNR(GPI) Circuit Board:
Remove the eight (8) screws marked [290]. The
PNR(GPI) circuit board can then be removed.
(Fig. 2, 4)
8. PNF(LED) and PNF(PSW) Circuit Boards
(Time required: About 6 minutes each)
8-1 Remove the top cover. (See procedure 1.)
8-2 Remove the front panel assembly.
(See procedure 2.)
8-3 Remove the six (6) screws marked [90].The front
panel can then be removed. (Fig. 5)
8-4 PNF(LED) Circuit Board:
Remove the screw marked [30]. The PNF(LED)
circuit board can then be removed. (Fig. 6)
8-5 PNF(PSW) Circuit Board:
Pull out the power switch knob. Remove the two (2)
screws marked [60]. The PNF(PSW) circuit board
can then be removed. (Fig. 5, 6)

11
AFC1
< Top view > < Right side view >
PNR (GPI)
PNR (MYMB)
[240]
[150]
[150]
[170B]
[170B]
[240]
Power supply unit
（電源ユニット）
Side panel R
（サイドパネルR）
Mount bracket
（マウントブラケット
）
[345B]
[80]
[80]: Bind Head Screw（＋バインド小ネジ）4.0X8 MFZN2BL (EG340360)
[150]: Bind Head Tapping Screw-B（＋バインド B タイト）A4.0X8 MFZN2BL (VC688800)
[170B]: Bind Head Tapping Screw-B（＋バインド B タイト）A4.0X8 MFZN2BL (VC688800)
[240]: Bind Head Screw（＋バインド小ネジ）4.0X8 MFZN2BL (EG340360)
[345B]: Oval Head Screw（＋丸皿小ネジ）4.0X8 MFZN2BL (VS153600)
Fig .4 (図4)
[90]: Oval Head Screw（＋丸皿小ネジ）4.0X8 MFZN2BL (VS153600)
Fig .5 (図5)
[30]: Bind Head Tapping Screw-B（＋バインド B タイト）
3.0X6 MFZN2BL (EP600230)
[60]: Bonding Screw（＋ボンディング小ネジ）
3.0X6 MFZN2BL (VS863000)
Fig .6 (図6)
< Front view > < Front view >
[90]
[90]
[30]
[60]
[60]
Front panel
（フロントパネル）
Power switch knob
（PSWノブ）
PNF (LED)
PNF (PSW)

AFC1
12
LSI PIN DESCRIPTION
PIN
NO. I/O FUNCTIONNAME PIN NO. I/O FUNCTIONNAME
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
PE14
PE15
VSS
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
VCC
A17
VSS
/RAS
/CASL
/CASH
VSS
RDWR / PB5
A18
A19
A20
PB9 /A21
VSS
/RD
/WDTOVF
/WRH
VCC
/WRL
VSS
/CS1
/CS0
PA9 / TCLKD
/IRQ2 / TCLKC
/CS3
/CS2
/IRQ1
TXD
RXD
/IRQ0
PA1 / TXD0
PA0 / RXD0
D15
D14
D13
VSS
D12
O
O
I
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
I
O
I
O
O
O
O
O
O
O
O
O
I
O
O
O
I
O
I
O
O
O
I
O
O
I
O
I
I
O
I
I/O
I/O
I/O
I
I/O
Port E
Port E
Ground
Address bus
Power supply
Address bus
Ground
Row address strobe
Column address strobe (low)
Column address strobe (high)
Ground
DRAM read/write / Port B
Address bus
Port B / Address bus
Ground
Read
Watch dog timer overflow
High write
Power supply
Low write
Ground
Chip select
Chip select
Port A / Timer clock
Interrupt request / Timer clock
Chip select
Chip select
Interrupt request
Data transmission
Data reception
Interrupt request
Port A / Data transmission
Port A / Data reception
Data bus
Ground
Data bus
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
D11
D10
D9
D8
VSS
D7
D6
D5
VCC
D4
D3
D2
D1
D0
VSS
XTAL
MD3
EXTAL
MD2
NMI
VCC
MD1
MD0
PLLVCC
PLLCAP
PLLVSS
PA15 / CK
/RES
PE0
PE1
PE2
PE3
PE4
VSS
AN0 / PF0
AN1 / PF1
AN2 / PF2
AN3 / PF3
AN4 / PF4
AN5 / PF5
AVSS
AN6 / PF6
AN7 / PF7
AVCC
VSS
PE5
VCC
PE6
PE7
PE8
PE9
PE10
VSS
PE11
PE12
PE13
I/O
I/O
I/O
I/O
I
I/O
I/O
I/O
I
I/O
I/O
I/O
I/O
I/O
I
I
I
I
I
I
I
I
I
I
I
I
O
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
O
I
O
O
O
O
O
I
O
O
O
Data bus
Ground
Data bus
Power supply
Data bus
Ground
Crystal oscillator
Mode control
Crystal oscillator
Mode control
Non-maskable interrupt request
Power supply
Mode control
Mode control
PLL Power supply
PLL capacitor
PLL Ground
Port A / Clock
Reset
Port E
Ground
Analog input / Port F
Analog ground
Analog input / Port F
Analog input / Port F
Power supply
Ground
Port E
Power supply
Port E
Ground
Port E
HD6437042AF62F (XY885B00) CPU MAIN: IC004
HD6437042AF62F (XY885B00) CPU ................................................................................................ 12
YSS904-F (XV989A00) DSP5 (Digital Signal Processor) .................................................................. 13
YSS910-S (XV988A00) DSP6 (Digital Signal Processor) .................................................................. 14
EPM7128SQC100-7 (XY976C00) FPGA (Field Programmable Gate Array) .................................... 15
YM3436DK (XG948E00) DIR2 (Digital Format Interface Receiver) .................................................. 16
ST16C554DCQ64 (XW934A00) UART (Universal asynchronous receiver and transmitter)............. 16
SGH609080F-47F (XU235A00) ATSC ............................................................................................... 17
（LSI端子機能表）

13
AFC1
PIN
NO. I/O FUNCTIONNAME PIN
NO. I/O FUNCTIONNAME
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
NC
NC
NC
NC
Vdd
Vss
XI
XO
Vdd
/SYNCI
/SYNCO
Vdd
CKI
CKO
CKSEL
Vss
MCKD
/SSYNC
/IC
/TEST
NC
NC
NC
Vdd
Vss
/CS
/WR
/RD
CA7
CA6
CA5
CA4
CA3
CA2
CA1
Vss
Vdd
CD15
CD14
CD13
CD12
CD11
CD10
CD09
CD08
CD07
CD06
Vss
NC
NC
NC
NC
NC
NC
NC
NC
Vdd
Vdd
CD05
CD04
CD03
CD02
CD01
CD00
/WAIT
Vss
SIO00
SIO01
SIO02
SIO03
SIO04
SIO05
SIO06
SIO07
Vss
Vdd
SIO08
SIO09
SIO10
SIO11
SIO12
SIO13
SIO14
SIO15
Vss
Vdd
SIO16
SIO17
SIO18
SIO19
SIO20
SIO21
SIO22
SIO23
Vss
Vdd
SIO24
SIO25
SIO26
SIO27
NC
NC
NC
NC
I
O
O
I
O
I
O
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
Not used
Ground
Power supply
System master clock input (60 MHz or 30 MHz)
System master clock output (High or 30 MHz)
Ground
Sync. signal input
Sync. signal output
Ground
System clock input (30 MHz)
System clock output (30 MHz)
System master clock select
Power supply
Serial clock input (256 fs)
Serial. signal input
Initial clear
Test mode setting (0: TEST, 1: Normal)
Not used
Ground
Power supply
Chip select
Write enable input
Read enable input
CPU address bus
Power supply
Ground
CPU data bus
Power supply
Not used
Ground
CPU data bus
Wait output
Power supply
Serial data bus
Power supply
Ground
Serial data bus
Power supply
Ground
Serial data bus
Power supply
Ground
Serial data bus
Not used
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
NC
NC
NC
NC
SIO28
SIO29
SIO30
SIO31
Vss
Vdd
SIO32
SIO33
SIO34
SIO35
SIO36
SIO37
SIO38
SIO39
Vss
Vdd
SIO40
SIO41
SIO42
SIO43
SIO44
SIO45
SIO46
SIO47
Vss
SIO48
SIO49
SIO50
SIO51
SIO52
SIO53
SIO54
SIO55
Vss
Vdd
Vdd
SIO56
SIO57
SIO58
SIO59
SIO60
SIO61
SIO62
SIO63
NC
NC
NC
NC
NC
NC
NC
NC
Vss
/POE
Vss
PIO00
PIO01
PIO02
PIO03
PIO04
PIO05
PIO06
PIO07
Vss
Vdd
Vdd
PIO08
PIO09
PIO10
PIO11
PIO12
PIO13
PIO14
PIO15
Vss
NC
PIO16
PIO17
PIO18
PIO19
PIO20
PIO21
PIO22
PIO23
Vss
Vdd
Vdd
PIO24
PIO25
PIO26
PIO27
PIO28
PIO29
PIO30
PIO31
Vss
NC
NC
NC
NC
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
Not used
Serial data bus
Power supply
Ground
Serial data bus
Power supply
Ground
Serial data bus
Power supply
Serial data bus
Power supply
Ground
Serial data bus
Not used
Power supply
Parallel data bus controll signal
Power supply
Parallel data bus
Power supply
Ground
Parallel data bus
Power supply
Not used
Parallel data bus
Power supply
Ground
Parallel data bus
Power supply
Not used
YSS904-F (XV989A00) DSP5 (Digital Signal Processor)
MAIN: IC106, 107, 110

AFC1
14
PIN
NO. I/O FUNCTIONNAME PIN NO. I/O FUNCTIONNAME
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
Vdd
Vss
XI
XO
Vdd
/SYNCI
/SYNCO
Vdd
CKI
CKO
CKSEL
Vss
MCKS
/SSYNC
/IC
/TEST
BTYP
/IRQ
TRIG
Vdd
Vss
/CS
/WR
/RD
CA7
CA6
CA5
CA4
CA3
CA2
CA1
Vss
Vdd
CD15
CD14
CD13
CD12
CD11
CD10
CD09
CD08
CD07
CD06
Vss
Vdd
Vdd
CD05
CD04
CD03
CD02
CD01
CD00
/WAIT
Vss
SI0
SI1
SI2
SI3
SI4
SI5
SI6
SI7
Vss
Vdd
SO0
SO1
SO2
SO3
SO4
SO5
SO6
SO7
Vss
DB00
DB01
DB02
DB03
DB04
DB05
DB06
DB07
DB08
DB09
DB10
DB11
DB12
Vdd
Vdd
I
O
I
O
I
O
I
I
I
I
I
I
O
I/O
I
I
I
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
I
I
I
I
I
I
I
I
O
O
O
O
O
O
O
O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
Power supply (3.3 V)
Ground
System master clock input (60 MHz or 30 MHz)
System master clock output (High or 30 MHz)
Power supply (5 V)
Sync. signal input
Sync. signal output
Power supply (5 V)
System clock input (30 MHz)
System clock output (30 MHz)
System master clock select (0: 60 MHz, 1: 30 MHz)
Ground
Serial I/O master clock input (128 x Fs)
Serial I/O Sync. signal output
Initial clear
Test mode setting (0: Test, 1: Normal)
Data bus type select (0: 8 bit, 1: 16 bit)
IRQ output
Trigger signal input/output
Power supply (5 V)
Ground
chip select signal input
Write signal input
Read signal input
Address bus of internal register
Ground
Power supply (3.3 V)
Data bus of internal register
Ground
Power supply (3.3 V)
Power supply (5 V)
Data bus of internal register
WAIT output
Ground
Serial data input
Ground
Power supply (5 V)
Serial data output
Ground
Parallel data bus
Power supply (5 V)
Power supply (3.3 V)
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
Vss
DB13
DB14
DB15
DB16
DB17
DB18
DB19
DB20
DB21
DB22
Vss
Vdd
DB23
DB24
DB25
DB26
DB27
DB28
DB29
DB30
DB31
TIMO/DBOB
Vss
Vdd
DA00
DA01
DA02
DA03
DA04
DA05
DA06
DA07
Vss
DA08
DA09
DA10
DA11
DA12
DA13
DA14
DA15
Vss
Vdd
(n.c)
Vdd
DA16
DA17
DA18
DA19
DA20
DA21
DA22
DA23
Vss
DA24
DA25
DA26
DA27
DA28
DA29
DA30
DA31
Vdd
Vss
A00
A01
A02
A03
A04
A05
A06
A07
A08
A09
Vss
Vdd
A10
A11
A12
A13
A14
A15/RAS
A16/CAS
A17/CE
/WE
/OE
Vdd
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
Ground
Parallel data bus
Ground
Power supply (3.3 V)
Parallel data bus
Timing signal output/ Parallel data bus output/ input
Ground
Power supply (5 V)
Memory data bus
Ground
Memory data bus
Ground
Power supply (3.3 V)
Not used
Power supply (5 V)
Memory data bus
Ground
Memory data bus
Power supply (5 V)
Ground
Memory address (SRAM, PSRAM, DRAM)
Ground
Power supply (3.3 V)
Memory address (SRAM, PSRAM, DRAM)
Memory address (SRAM, PSRAM)
Memory address (SRAM, PSRAM), /RAS (DRAM)
Memory address (SRAM, PSRAM), /CAS (DRAM)
Memory address (SRAM), /CE (PSRAM)
Memory write enable signal
Memory output enable signal
Power supply (5 V)
YSS910-S (XV988A00) DSP6 (Digital Signal Processor)
MAIN: IC077, 080, 083, 086, 089,
092, 095, 098, 101, 104

15
AFC1
PIN
NO. I/O FUNCTIONNAME PIN NO. I/O FUNCTIONNAME
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
A1
A2
A3
A4
VCCIO
TDI
A5
A6
A7
A12
A13
A14
GND
A15
A18
A19
TMS
A21
D0
VCCIO
D1
D2
D3
SIOSEL
/BS
WDTOVF
/PCMINT
GND
/PCMWAIT
/DSPWAIT1
/DSPWAIT2
/MYINT
/WAIT
/DSPRST
/DSPEN2
VCCIO
/DSPEN1
/DSPCS
/MYCS4
GND
VCCINT
/MYCS3
/MYCS2
/MYCS1
GND
/MYCS
/IREQ3
/IREQ2
/IREQ1
/IREQ0
I
I
I
I
I/O
I
I
I
I
I
I
I
I
I
I/O
I
I/O
I/O
I/O
I/O
I
O
I
I
I
I
I
I
O
O
O
O
O
O
O
O
O
O
O
O
O
O
Address bus
Power supply (5.0 V)
Unrestricted user-programmable Input/Output pin. Open for normal use.
Address bus
Ground
Address bus
Unrestricted user-programmable Input/Output pin. Open for normal use.
Address bus
Data bus
Power supply (5.0 V)
Data bus
Select
Bus cycle start signal
Watch dog timer overflow
Interrupt
Ground
LSI wait
Wait
Interrupt
Bus wait
DSP reset
Data bus enable
Power supply (5.0 V)
Data bus enable
Chip select decord enable
Chip select
Ground
Power supply (5.0 V)
Chip select
Ground
Data bus enable
Interrupt request
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
/GPIWR
/CASLOCK
VCCIO
/SWRD
/LCDGATE
LCD_E
/LEDSET
/SCSET
WCKIN
CASINTX
GND
CASINRX
RPTX
TCK
RPRX
MYSINT
/MY_SCS
VCCIO
HASINT
/HASCS
/USBINT
/USBCS
CASSINT
/CASSCS
TDO
GND
CNTSTX
/CNTSCS
CNTSINT
CNTSRX
/PCMCS
SCS4
SCS3
VCCIO
/SCNCS2
/SCNCS1
/FMCS
GND
CPUCLK
/RD
/RESET1
/WR
VCCINT
/CS1
/CS2
/CS3
GND
/DREQ1
DACK1
CKIO
O
I
O
O
O
O
O
I
O
I
O
I/O
I
I
O
I
O
I
O
I
O
I/O
I
O
O
O
O
O
O
O
O
O
I
I
I
I
I
I
I
O
I
O
Data latch clock
Cascade clock input lock
Power supply (5.0 V)
Switch read strobe
Data bus enable
Access enable
Data latch clock
Strobe latch clock
Word clock
Serial transmit data
Ground
Serial receive data
Serial transmit data
Unrestricted user-programmable Input/Output pin. Open for normal use.
Serial receive data
Interrupt
Chip select
Power supply (5.0 V)
Interrupt
Chip select
Interrupt
Chip select
Interrupt
Chip select
Unrestricted user-programmable Input/Output pin. Open for normal use.
Ground
Serial transmit data
Chip select
Interrupt
Serial receive data
Data bus enable
Chip select
Power supply (5.0 V)
Chip select
Chip select
Ground
System clock supply
Read strobe
System reset
Write strobe
Power supply (5.0 V)
Chip select
Ground
DMA request
DMA acknowledge
Clock supply
EPM7128SQC100-7 (XY976C00) FPGA (Field Programmable Gate Array)
MAIN: IC015

AFC1
16
PIN
NO. I/O FUNCTIONNAME PIN NO. I/O FUNCTIONNAME
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
DAUX
HDLT
DOUT
VFL
OPT
SYNC
MCC
WC
MCB
MCA
SKSY
XI
XO
P256
LOCK
Vss
TC
DIM1
DIM0
DOM1
DOM0
KM1
I
O
O
O
O
O
O
O
O
O
I
I
O
O
O
O
I
I
I
I
I
Auxiliary input for audio data
Asynchronous buffer operation flag
Audio data output
Parity flag output
Fs x 1 Synchronous output signal for DAC
Fs x 1 Synchronous output signal for DSP
Fs x 64 Bit clock output
Fs x 1 Word clock output
Fs x 128 Bit clock output
Fs x 256 Bit clock output
Clock synchronization control input
Crystal oscillator connection or external
clock input
Crystal oscillator connection
VCO oscillating clock connection
PLL lock flag
Logic section power (GND)
PLL time constant switching output
Data input mode selection
Data input mode selection
Data output mode selection
Data output mode selection
Clock mode switching input 1
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
RSTN
Vdda
CTLN
PCO
(NC)
CTLP
Vssa
TSTN
KM2
KM0
FS1
FS0
CSM
EXTW
DDIN
LR
Vdd
ERR
EMP
CD0
CCK
CLD
I
I
O
I
I
I
I
O
O
I
I
I
O
O
O
O
I
I
System reset input
VCO section power (+5 V)
VCO control input N
PLL phase comparison output
VCO control input P
VCO section power (GND)
Test terminal. Open for normal use
Clock mode switching input 2
Clock mode switching input 0
Channel status sampling frequency
display output 1
Channel status sampling frequency
display output 0
Channel status output method selection
External synchronous auxiliary input
word clock
EIAJ (AES/EBU) data input
PLL word clock output
Logic section power (+5 V)
Data error flag output
Channel status emphasis control code
output
3-wire type microcomputer interface data
output
3-wire type microcomputer interface clock
input
3-wire type microcomputer interface load
input
YM3436DK (XG948E00) DIR2 (Digital Format Interface Receiver)
MAIN: IC028, 040
PIN
NO. I/O FUNCTIONNAME PIN NO. I/O FUNCTIONNAME
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
/DSRA
/CTSA
/DTRA
VCC
/RTSA
INTA
/CSA
TXA
/LOW
TXB
/CSB
INTB
/RTSB
GND
/DTRB
/CTSB
/DSRB
/CDB
/RIB
RXB
VCC
A2
A1
A0
XTAL1
XTAL2
RESET
GND
RXC
/RIC
/CDC
/DSRC
I
I
O
I
O
O
I
O
I
O
I
O
O
O
I
I
I
I
I
I
I
I
I
I
O
I
I
I
I
I
Data set ready (active low)
Clear to send (active low)
Data terminal ready (active low)
Power supply inputs
Request to send (active low)
Interrupt A (active high)
Chip select
Transmit data
Write strobe
Transmit data
Chip select
Interrupt B (active high)
Request to send (active low)
Signal and power ground
Data terminal ready (active low)
Clear to send (active low)
Data set ready (active low)
Carrier detect (active low)
Ring indicator (active low)
Receive data input RX B
Power supply inputs
Address bus
Crystal or External clock input
Output of the crystal oscillator or buffered clock
Reset
Signal and power ground
Receive data input RX C
Ring indicator (active low)
Carrier detect (active low)
Data set ready (active low)
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
/CTSC
/DTRC
VCC
/RTSC
INTC
/CSC
TXC
/IOR
TXD
/CSD
INTD
/RTSD
GND
/DTRD
/CTSD
/DSRD
/CDD
/RID
RXD
VCC
D0
D1
D2
D3
D4
D5
D6
D7
GND
RXA
/RIA
/CDA
I
O
I
O
O
I
O
I
O
I
O
O
O
I
I
I
I
I
I
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I
I
I
Clear to send (active low)
Data terminal ready (active low)
Power supply inputs
Request to send (active low)
Interrupt C (active high)
Chip select
Transmit data
Read strobe
Transmit data
Chip select
Interrupt D (active high)
Request to send (active low)
Signal and power ground
Data terminal ready (active low)
Clear to send (active low)
Data set ready (active low)
Carrier detect (active low)
Ring indicator (active low)
Receive data input RX D
Power supply inputs
Data bus
Signal and power ground
Receive data input RX A
Ring indicator (active low)
Carrier detect (active low)
ST16C554DCQ64 (XW934A00) UART
(Universal asynchronous receiver and transmitter)
MAIN: IC018

17
AFC1
PIN
NO. I/O FUNCTIONNAME PIN NO. I/O FUNCTIONNAME
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
syncati
mccti
mcbti
VCC
GND
mcati
GND
siat0
siat1
siat2
siat3
ati
GND
ato
soat3
soat2
soat1
soat0
VCC
GND
mcato
GND
mcbto
mccto
syncato
clksel
ato-sel0
ato-sel1
bitsel2
bitsel1
bitsel0
VCC
GND
ext-sync2
ui0
ui1
ui2
ui3
si-sel0
si-sel1
I
I
I
I
I
I
I
I
I
O
O
O
O
O
I
I
I
I
I
I
I
Synch. word input terminal for ati,
siat3-0 input
64 fs clock input terminal for ati,
siat3-0 input
128 fs clock input terminal for ati,
siat3-0 input
Power supply (+5 V)
Ground
256 fs clock input terminal for ati,
siat3-0 input
Ground
Serial data input terminal
Optical input terminal
Ground
Optical output terminal
Serial data output terminal
Power supply (+5 V)
Ground
256 fs clock input terminal for ato,
soat3-0 output
Ground
128 fs clock input terminal for ato,
soat3-0 output
64 fs clock input terminal for ato,
soat3-0 output
Synch. word input terminal for ato,
soat3-0 output
Clock select terminal for ato,
soat 3-0 output
0: mcato,mcbto,mccto,syncato
1: mcai,mcbi,mcci,synci
Format select terminal for ato,
soat3-0 output
Format select terminal for ato,
soat3-0 output
Bit shift select terminal for the ato output
Power supply (+5 V)
Ground
Synch. detect output terminal 2
U-bit input terminal for optical output
input format select terminal for si3-0
input format select terminal for si3-0i
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
synci
mcci
mcbi
VCC
GND
mcai
GND
si0
si1
si2
si3
GND
so3
so2
so1
so0
VCC
GND
mcao
GND
mcbo
mcco
synco
so-sel1
so-sel0
uo3
uo2
uo1
uo0
ext-sync1
VCC
GND
clk
GND
/res
GND
wc-at
mute
ati-sel1
ati-sel0
I
I
I
I
I
I
I
I
O
O
O
O
I
I
I
I
I
I
O
O
O
O
O
I
I
O
I
I
I
Synch. word input terminal for si3-0 input
64 fs clock input terminal for si3-0 input
128 fs clock input terminal for si3-0 input
Power supply (+5 V)
Ground
256 fs clock input terminal for si3-0 input
Ground
Serial data input terminal
Ground
Serial data output terminal
Power supply (+5 V)
Ground
256 fs clock input terminal for so3-0 output
Ground
128 fs clock input terminal for so3-0 output
64 fs clock input terminal for so3-0 output
Synch. word input terminal for so3-0 output
Format select terminal for soat3-0 output
Format select terminal for soat3-0 output
U-bit output terminal for optical output
Synch. detect output terminal 1
Power supply (+5 V)
Ground
Clock input terminal for word clock extract
Ground
System reset input terminal
Ground
Word clock output terminal
Data mute input terminal
Input format select terminal for ati, siat3-0.
input format select terminal for ati, siat3-0.
SGH609080F-47F (XU235A00) ATSC MAIN: IC038, 042
1
1
0
0
so sel1 1
0
1
0
so sel0 not enable to set
so0
so2, 0
so3-0
(8ch/line)
(4ch/line)
(2ch/line)
input format
1
1
0
0
ati sel1 1
0
1
0
ati sel0 ati
ati0
ati2, 0
ati3-0
(8ch/line)
(4ch/line)
(2ch/line)
input format
1
1
0
0
ato sel1
0: mcato,mcbto,mccto,syncato
1: mcai,mcbi,mcci,synci
1
0
1
0
ato sel0 ato
soat0
soat2, 0
soat3-0
(8ch/line)
(4ch/line)
(2ch/line)
output format
1
1
0
0
si sel1 1
0
1
0
si sel0 not enable to set
si0
si2, 0
si3-0
(8ch/line)
(4ch/line)
(2ch/line)
input format

AFC1
18
IC BLOCK DIAGRAM
MM74HCU04SJX (XY070A00)
MAIN:
TC74HC04AF (XS993A00)
MAIN:
Hex Inverter
MM74HC14SJX (XW104A00)
MAIN: IC019
Hex Inverter
74VHC32SJX (XY306A00)
MAIN: IC003, 005
Quad 2 Input OR
MM74HC74ASJX (XY153A00)
MAIN: IC017, 022
Dual D-Type Flip-Flop
TC74HC123AF (XN242A00)
MAIN: IC041
Dual Retriggerable Single Shot
TC74VHC138F (XT015A00)
MAIN: IC064, 065
3 to 8 Demultiplexer
MM74HC151SJX (XY308A00)
MAIN: IC026, 062, 063
8 to 1 Data Selector
TC74HC153AFEL (XY309A00)
MAIN: IC027
Dual 4 to 1 Data Selectors
MM74HC157SJX (XY310A00)
MAIN: IC108, 109
Quad 2 to 1 Multiplexer
IC016
IC025
1
2
3
4
5
6
7
1A
1Y
2A
2Y
3A
3Y
Vss
14
13
12
11
10
9
8
VDD
6A
6Y
5A
5Y
4A
4Y
1
2
3
4
5
6
7
1A
1Y
2A
2Y
3A
3Y
GND
14
13
12
11
10
9
8
VDD
6A
6Y
5A
5Y
4A
4Y
1
2
3
1A
1Y
4 2A
5 2B
6 2Y
7 GND
1B
14
13
12
Vcc
4A
11 4Y
10 3B
9 3A
8 3Y
4B
INPUTS OUTPUTS
PR CLR CLK D Q Q
L
H
H
L
H
Q O
H
L
H
H
L
Q O
X
X
X
H
L
X
X
X
X
f
f
L
H
L
L
H
H
H
L
H
L
H
H
H
1
2
3
4
5
6
7
1CLR
1D
1CK
1PR
1Q
1Q
GND
14
13
12
11
10
9
8
VCC
2CLR
CLR
2D
D
2CK
CK
2PR PR
2Q
2Q
Q
Q
CLR
D
CK
PR
Q
Q
1A
1B
1
1Q
2Q
2 Cext
2 Rext / Cext
GND
1 16
2 15
3 14
4 13
5 12
6 11
7 10
8 9
Vcc
1 Rext / Cext
Cext
1Q
2Q
CLR
2B
2A
CLR
Q
Q
QQ
CLR
1
2
3
4
5
6
7
A
A
Select
Enable
Output
Output
B
B
C
C
G2A
G2A
G2B
G2B
G1
G1
Y7
Y7 Y5
Y4
Y3
Y2
Y1
Y0
Y6
16
15
14
13
12
11
10
Vcc
YO
Y1
Y2
Y3
Y4
Y5
8
GND
9
Y6
1
2
3
4
5
6
7
3
Data
Inputs 2
1
0
Y
W
Strobe
16
15
14
13
12
11
10
Vcc
4
5
6
7
A
B
8
GND
9
C
Outputs
Data
Inputs
Data
Select
D3 D4
D5
D6
D7
A
B
C
D2
D1
D0
Y
W
S
1
2
3
4
5
6
7
1G SELECT
STROBE B
OUTPUT 1Y
1G
IC3
IC2
IC1
IC0
1Y
16
15
14
13
12
11
10
Vcc
SELECT 2G
STROBE A
8
GND
9
OUTPUT 2Y
2C0
2Y
2C1
2C2
2C3
2G
B
B
B
B
AA
AA
DATA
INPUTS
DATA
INPUTS
1
2
3
4
5
6
7
SELECT
1A
1A
1B
1B
1Y
1Y
2A
2A
2B
2B
2Y
2Y
16
15
14
13
12
11
10
Vcc
STROBE
G
4A
S3Y
4A
4B
4B
4Y
4Y
3A
3A
3B
3B
8
GND
9
3Y
（IC ブロック図）

19
AFC1
MM74HC175SJX (XY307A00)
MAIN: IC024, 046-049
Quad D-Type Flip-Flop
TC74VHC245F (XT487A00)
MAIN:
MM74HC245ASJX (XW107A00)
MAIN:
SN74ABT245BNSR (XU009A00)
MAIN:
Octal 3-State Bus Transceiver
MM74HC273SJX (XY198A00)
MAIN: IC023
Octal D-Type Flir Flop
TC74HC4052AF (XS790A00)
MAIN: IC044, 045
Differential 4-Channel
Multiplexer/Demultiplexer
TC74LVX4245FS (XU229A00)
MAIN: IC111-117
Dual Supply Octal Bus Transceiver
SN75121NSR (XU816A00)
MAIN: IC036, 043
Dual Line Driver
SN75124NSR (XV930A00)
MAIN: IC039
Triple Line Receiver
SN75C1168NSR (XU073A00)
MAIN: IC021, 037, 122
Line Driver / Receiver
AM26LS31CNSR (XU996A00)
MAIN: IC034, 035, 118, 119
Quad Line Driver
QCL
QD
CK
QCL
QD
CK QCL
QDCK
QCL
QDCK
1
2
3
4
5
6
7
CL
1Q
1Q
1D
2D
2Q
2Q
16
15
14
13
12
11
10
VDD
4Q
4Q
4D
3D
3Q
3Q
8
Vss 9CK
1
2
3
4
5
6
7
20
19
18
17
16
15
14
Vcc
G
B1
B2
B3
B4
B5
B6
B7
B8
8
9
10
12
11
GND
A8
A7
A6
A5
A4
A3
A2
A1
D1R
13
CLEAR
1Q
1D
2D
2Q
3Q
3D
4D
4Q
GND
VCC
8Q
8D
7D
7Q
6Q
6D
5D
5Q
CLOCK
1 20
2 19
3 18
4 17
5 16
6 15
7 14
8 13
9 12
10 11
Q
DCK
CL
D
Q
CK
CL
Q
DCK
CL
D
Q
CK
CL
D
Q
CK
CL
Q
DCK
CL
D
Q
CK
CL
Q
DCK
CL
1
2
3
4
5
6
7
0Y
2Y
Y-COM
1Y
INH
VEE
VSS
3Y
16
15
14
13
12
11
VDD
2X
1X
X-COM
0X
3X
A
89
10
B
2Y
0Y
Y-COM
3Y
1Y
INH
B
2X
1X
X-COM
0X
3X
A
VCCA
DIR
A1
A2
A3
A4
A5
A6
A7
A8
GND
GND
VCCB
VCCB
/G
B1
B2
B3
B4
B5
B6
B7
B8
GND
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
8
9
10 12
13
14
15
G1
G2
D
D
B
A
11
24
23
22
21
20
19
18
8
9
10
11
12
16
15
14
13
17
1A
1B
2R
2S
2A
2B
2Y
GND
1 16
2 15
3 14
4 13
5 12
6 11
7 10
8 9
Vcc
1S
1R
1Y
3A
3S
3R
3Y
1
2
3
4
5
6
7
1B
1A
1R
1DE
2R
2A
2B
16
15
14
13
12
11
10
Vcc
1D
1Y
1Z
2DE
2Z
2Y
8
GND 92D
1
2
3
4
5
6
7
1A
1Y
1Z
2Z
2Y
2A
GND
ENABLE G
16
15
14
13
12
11
Vcc
4A
4Y
4Z
ENABLE G
3Z
3Y
89
10
3A
OUTPUTS
H= high level
L= low level
X= irrelevant
Z= high impedance (off)
ENABLESINPUT
AGGYZ
H
H
X
X
L
X
X
L
L
H
H
L
H
L
Z
L
H
L
H
Z
H
L
H
L
X
IC029, 066, 067, 074, 075
IC030, 031, 052-061, 068-073
IC050, 051
Vcc
2F
2E
2A
2Y
GND
1Y
1
2
3
4
5
6
7
89
10
11
12
13
14
15
16
2C
2B
2D
1A
1B
1C
1D
1E
1F

AFC1
20
1 5
2
34
IN B
VSS
VDD
OUT
IN A
TC7S08F (XM616A00)
SUB: IC2
2 Input AND Gate
DS26C32ATMX (XU815A00)
MAIN: IC032, 033, 120, 121
Quad Differential Line Receiver
TC7S00F (XG150A00)
SUB: IC3
2 Input NAND
1
2
3
4
5
6
7
INPUT A
INPUT A
OUTPUT A
OUTPUT C
INPUT C
INPUT C
GND
ENABLE
16
15
14
13
12
11
Vcc
INPUT B
INPUT B
OUTPUT B
ENABLE
OUTPUT D
INPUT D
89
10
INPUT D
+
-
-
+
+
-
-
+
NJM2082M(T1) (XN797A00)
MAIN: IC001
Dual Operational Amplifier
1
2
3
4-V
8
7
6
5
Output A +V
Non-Inverting
Input A
-DC Voltage Supply
+DC Voltage
Supply
Output B
Inverting
Input B
Non-Inverting
Input B
Inverting
Input A
+-
+-
1 5
2
34
IN B
VSS
VDD
OUT Y
IN A
Note: See parts list for details of circuit board component parts.
MAIN Circuit Board (XW953D0)............................................... 22/24
SUB Circuit Board (X3791A0) ....................................................... 25
PNF (LED) Circuit Board (XY041B0) ........................................ 26/27
PNF (PSW) Circuit Board (XY041B0) ............................................ 21
PNR (GPI) Circuit Board (XY231B0) ............................................. 21
PNR (MYMB) Circuit Board (XY231B0) ........................................ 26
CONTENTS
CIRCUIT BOARDS
（目次）
注：シートの部品詳細はパーツリストをご参照ください。
（シート基板図）