Alinco DJ-X3 User manual

DJ-X3
Service Manual
CONTENTS
SPECIFICATIONS
1) GENERAL ................................................................ 2
2) RECEIVER ............................................................... 2
CIRCUIT DESCRIPTION
1) Receiver ............................................................... 3~6
2) M38224M6M(E:XA0862, T:XA0836) ......................... 7
3) Terminal function of CPU .......................................... 8
SEMICONDUCTOR DATA
1) uPD3140GS-E1 (XA0312) ........................................ 9
2) TC4W53FU (XA0348)............................................. 10
3) NJM2904V (XA0573).............................................. 10
4) CXA1622M/P (XA0787).......................................... 10
5) MB88347LPFV-G-BND-EF (XA0599) ..................... 11
6) TK11816M (XA0665) .............................................. 12
7) TK10931V (XA0666)............................................... 12
8) TA4101FTE12L (XA0667) ....................................... 13
9) S-80828ALNP-EAR-T2 (XA0834) ........................... 13
10) BR24C64F-E2 (XA0669) ........................................ 14
11) S-81230SG-QB-X (XA0833) ................................... 14
12) uPC2757T-E3 (XA0743) ......................................... 15
13) TC7SET08FU (XA0586) ......................................... 15
14) LA3335M (XA0786) ................................................ 16
15) NJM2107 (XA0850) ................................................ 17
16) Transistor, Diode and LED Outline Drawings........... 17
17) LCD Connection ..................................................... 18
EXPLODEDVIEW
1) FrontView............................................................... 19
2) BottomView............................................................ 20
PARTS LIST
MAIN Unit ......................................................... 21~26
SW Unit .................................................................. 26
Mechanical Parts .................................................... 26
Packing................................................................... 26
ADJUSTMENT
1) How to enter the adjustment mode ......................... 27
2) Adjustment ....................................................... 27~29
PC BOARDVIEW .................................................. 30~31
SCHEMATIC DIAGRAM ............................................. 32
BLOCK DIAGRAM ...................................................... 33
ALINCO,INC.

2
SPECIFICATIONS
1) GENERAL
Receiving range E : 0.1 ~ 1299.995 MHz
T : 0.1 ~ 823.995 MHz
850.000 ~ 868.995 MHz
895.000 ~ 1299.995 MHz
Modulation mode FM, WFM, AM
Ant. impedance 50Ω
Ant. terminal SMA
Supply voltage DC 3.6V ~ 6V (Internal battery)
DC 4.5V ~ 16V (external regulated source)
Ground Negative ground
Current consumption reception : approx.75mA
Battery save (1:4)approx.39mA
Temperature range -10 ~ +60°C (+14 ~ +140 F°)
Frequency stability ±5ppm(-10 ~ +60°C)(+14 ~ +140F°)
Dimension 56(W) ×102(H) ×23(D)mm
Weight Approx.145g
2) RECEIVER
System Triple-conversion superheterodyne
First IF 248.45 MHz
Second IF 38.85 MHz
Third IF 450 kHz
Selectivity AM/FM -6dB/12kHz or over , -60dB/30kHz or less
WFM -6dB/150kHz or over
Sensitivity FM/WFM 12dB SINAD, AM 10dB S/N
Typ. AM : 0.5 ~ 1.62MHz 17dBu 10dB S/N
1.625MHz or over 5dBu 10dB S/N
FM : 30 ~ 550MHz -3dBu 12dB SINAD
550MHz or over 0dBu 12dB SINAD
WFM : 76 ~ 770MHz 13dBu 12dB SINAD
Audio output power more than 220mW (8Ω)

3
CIRCUIT DESCRIPTION
1) Receiver
1. RX Method: Triple Super Heterodyne Method
1st IF. : 248.45MHz
2nd IF. : 38.85MHz
3rd IF. : 450KHz
2. Front End
0.1 ~ 29.995MHz The signal input from antenna is switched at band switch D19, passing through
the low pass filter, it is amplified at RF amplifier Q15.Then the signal is added
to the 1st mixer IC3 through the band switch D17.
30 ~ 136.995MHz The signal input from antenna is switched at band switch D23, passing through
the band pass filter, it is amplified at RF amplifier Q21.Then the signal is added
to the 1st mixer IC3 through the band switch D22.
137 ~ 222.995MHz The signal input from antenna is switched at band switch D27, passing through
the band pass filter, it is amplified at RF amplifier Q23.Then the signal is added
to the 1st mixer IC3 through the band switch D26.
223 ~ 367.995MHz The signal input from antenna is switched at band switch D29, passing through
the band pass filter, it is amplified at RF amplifier Q27.Then the signal is added
to the 1st mixer IC3 through the band switch D28.
368 ~ 469.995MHz The signal input from antenna is switched at band switch D32, passing through
the band pass filter, it is amplified at RF amplifier Q32.Then the signal is added
to the 1st mixer IC3 through the band switch D31.
470 ~ 129.995 MHz The signal input from antenna is switched at band switch D37 and D45,
passing through the band pass filter, it is amplified at RF amplifier Q38.Then
the signal is added to the 1st mixer IC3 through the band switch D36.
3. Mixer
The 1st Mixer The input signal and the 1st local signal is added or subtracted at mixer IC3,
and SAW filter FL1 selects the signal of 248.45 MHz, then eliminates the
adjacent signal.

4
The 2nd Mixer The input signal and the 2nd local signal is added or subtracted at mixer IC4,
and switched to FM/AM receiving side or WFM receiving side at D24 or D25 .
FM/AM At FM/AM receiving side, the crystal filter XF1 selects the signal of 38.85 MHz.
The signal is amplified at the 1st IF amplifier Q22 after the adjacent signal is
eliminated.
WFM At WFM receiving side, the band pass filter selects the signal of 38.85 MHz.
The signal is amplified at the 1st IF amplifier Q22 after the adjacent signal is
eliminated.
4. IF
FM/AM The amplified signal at the 1st IF amplifier Q22 is supplied to pin 24 of IC6 for
demodulation.The signal of 12.8 MHz from the IC 1 reference buffer output is
multiplied by 3 at Q17, then mixed with the signal added to pin 1 of IC6 in the
mixer circuit inside IC6 to be converted into the 2nd IF signal of 450 kHz.The
converted 2nd IF signal is output from pin 3 of IC6.
FM The output signal from pin 3 of IC6 is input to pin 7 of IC6 after the adjacent
signal is eliminated at the ceramic filter FL2.The 2nd IF signal input to pin 7 of
IC6 is demodulated at the limiter amplifier and quadrature detection circuit
inside IC.Then the signal is output from pin 12 of IC6 as an AF signall.
AM The output signal from pin 3 of IC6 is input to pin 5 of IC6 after the adjacent
signal is eliminated at the ceramic filter FL2.The 2nd IF signal input to pin 5 of
IC6 is output from pin 13 of IC6 as an AF signal after AM is detected inside IC.
Also reverse AGC is added to the 1st IF amplifier Q22 by AGC amplifier Q25
and the gain is controlled to get the normal audio output even though the input
signal is fluctuated.
WFM The output signal from pin 3 of IC6 is input to pin 7 of IC6.The 2nd IF signal
input to pin 7 of IC6 is demodulated at the limiter amplifier and quadrature
detection circuit inside IC, and output from pin 12 of IC6 as an AF signal.
5. Squelch The AF signal is output from pin 12 of IC6 and input to pin 19 of IC6. The
input signal is output from pin 21 of IC6 through the noise filter amplifier
and rectifying circuit. The rectified signal is supplied to the A/D port of
microcomputer IC1. Then the microcomputer IC1 judges the signal to
control ON/OFF of audio output.

5
6. Audio
FM/AM/WFM The audio output signal for receiving FM/WFM and AM is switched at IC9.The
output audio signal is input to pin 1 of IC13 of stereo multiplex demodulator
through AF amplifier IC17. When the input audio signal doesn't have a pilot
signal, each audio signal is output from pin 9 and pin 10 to pin 1 and pin 16 of
the audio amplifier IC14 equipped with the electronic volume.After the volume
is adjusted, the signal is output from pin 7 and pin 10 to drive the speaker, etc.
When the input signal has a pilot signal, each audio signal is output; L side
signal is output from pin 9, and R side signal is output from pin 10.
Then the signals are input to the audio amplifier IC 14 equipped with electronic
volume;L side signal is input to pin 1 and R side signal is input to pin 16.After
adjusting the volume the signals are output;the L side from pin 7 and the R side
from pin 10 to drive the speaker, etc.
7. VCO
The 1st Local VCO for the 1st local consists of the Colpitts oscillator. D15, D16 and L4
determine the frequency, and the signal is oscillated at the transistor Q9.The
oscillated signal is supplied to pin 2 of PLL-IC1 passing through the buffer
amplifier Q11 and Q10.
The 2nd Local VCO for the 2nd local consists of the Colpitts oscillator. D20, D21 and L15
determine the frequency, and the signal is oscillated at the transistor Q19. The
oscillated signal is supplied to pin 19 of PLL-IC1 passing through the buffer
amplifier Q20.
8. PLL PLL-IC1 is used to control the oscillating frequency ofVCO. IC1 is controlled by
the serial control signal sent from the microprocessor IC7.The reference frequency
of 12.8 MHz is generated by oscillating the crystal oscillator X1 inside
the circuit.
The 1st Local IC1 compares the frequency gained by dividing the signal added to pin 2 of IC1
by the control signal from IC7 with the frequency gained by dividing the
reference frequency of 12.8 MHz inside IC1.When the phase difference is
found as a result of phase comparison, the pulse signal is output from the
charge pump output of pin 8 of IC1, then the signal is converted into the DC
voltage at the active filter Q13 and Q14 and added to the cathode side ofVCO

6
vari-cap D15 and D16 to make the phases equal. In result the stabilized
oscillation can be done at the desired frequency.
The 2nd Local IC1 compares the frequency gained by dividing the signal added to pin 19 of
IC1 by the control signal from IC7 with the frequency gained by dividing the
reference frequency of 12.8 MHz inside IC1.When the phase difference is
found as a result of phase comparison, the pulse signal is output from the
charge pump output of pin 13 of IC1, then the signal is converted into the DC
voltage at the inside circuit for active filter and added to the cathode side of
VCO vari-cap D20 and D21 to make the phases equal.In result the stabilized
oscillation can be done at the desired frequency.

7
2) M38224M6M (E:XA0862,T:XA0836)
CPU
Terminal Connection
(TOP VIEW)

8
3) Terminal function of CPU
No. Terminal Signal I/O Description
1 AN7 BAT AD Battery input
2 P66 S/M O Stereo / Monophonic
3 P65 RESW I R/E push key
4 AN4 SQL AD Squelch input
5 AN3 SMT AD S-meter input
6 P62 AFPC O AF power supply
7 P61 BND3 O Band3 SW
8 P60 BND6 O Band6 SW
9 P57 BND2 O Band2 SW
10 P56 BND4 O Band4 SW
11 P55 BND5 O Band5 SW
12 P54 BND1 O Band1 SW
13 P53 ABAR O Antenna SW
14 P52 SBAR O Antenna SW
15 INT3 RE2 I Rotary encoder input
16 P50 RE1 I Rotary encoder input
17 P47 RC O RX SW
18 P46 ASW O Antenna SW
19 TXD CTX O Clone TX
20 RXD CRX I Clone RX
21 P43/INT1 PSW I Power key
22 INT0 BU I Backup interrupt
23 P41 BEEP O Beep output
24 P40 JKDT I Jack state input
25 RESET RST I Reset interrupt
26 P71 SCK O EEPROM clock
27 P70 SDA I/O EEPROM data
28 XIN XIN I Clock input
29 XOUT XOUT O Clock output
30 VSS VSS GND
31 P27 SW2 I Key input
32 P26 SW3 I Key input
33 P25 SW4 I Key input
34 P24 SW301 I Key input
35 P23 SW302 I Key input
36 P22
CLNSW O Clone SW
37 P21 STB2 O DAC strobe
38 P20 DATA I/O Data / Unlock
39 SEG22 SEG22
40 SEG21 SEG21
No Terminal Signal I/O Description
41 SEG20 SEG20
42 SEG19 SEG19
43 SEG18 SEG18
44 P12 DBC O Doubler SW
45 P11 C3C O Common power SW
46 P10 SCT O Secret signal output
47 P07 AFS O AF SW
48 P06 CLK O Clock
49 P05 STB1 O PLL strobe
50 P04 PLLC O PLL power supply
51 P03 P1C O PLL 1ch SW
52 P02 P2C O PLL 2ch SW
53 SEG17 SEG17
54 SEG16 SEG16
55 SEG15 SEG15
56 SEG14 SEG14
57 SEG13 SEG13
58 SEG12 SEG12
59 SEG11 SEG11
60 SEG10 SEG10
61 SEG9 SEG9
62 SEG8 SEG8
63 SEG7 SEG7
64 SEG6 SEG6
65 SEG5 SEG5
66 SEG4 SEG4
67 SEG3 SEG3
68 SEG2 SEG2
69 SEG1 SEG1
70 SEG0 SEG0
71 VCC VDD
72 VREF VDD
73 AVSS GND
74 COM3 COM3
75 COM2 COM2
76 COM1 COM1
77 COM0 COM0
78 VL3 VL3
79 VL2 VL2
80 VL1 VL1

9
SEMICONDUCTOR DATA
1) uPD3140GS-E1 (XA0312)
80 ~ 550MHz Dual PLL Synthesizer
Specifications
Operating frequency: 200 ~ 400MHz (Vin=-12 ~ -0dBm, pin 2 and 19 input)
80 ~ 550MHz (Vin=-8 ~ -0dBm, pin 2 and 19 input)
Consumption current: 2.7 ~ 4.1mA (Vcc=1.8V while 1 channel is used)
4.3 ~ 6.6mA (Vcc=1.8V while both channels are used)
0~ 10uA (Vcc=1.8V in power save mode)
3.5 ~ 5.3mA (Vcc=5V while 1 channel is used)
5.6 ~ 8.6mA (Vcc=5V while both channels are used)
Operationg voltage: 1.8 ~ 5.5V

10
2) TC4W53FU (XA0348)
3) NJM2904V (XA0573)
Dual Single Supply Operational Amplifer
4) CXA1622M/P (XA0787)
IN2
SW 2
1
NC
NF2 4
3
GND
P GND2 6
5
OUT2
RIPPLE 8
7
15
16
13
14
11
12
9
10
IN1
REG
VOL
NF1
GND
P GND1
OUT1
Vcc
Pin Assignment Block Diagram
12345678
16 15 14 13 12 11 10 9
REG VOL PRE+POWER1
PRE+POWER2

11
5) MB88347LPFV-G-BND-EF (XA0599)
D/A converter for digital tuning

12
6) TK11816M (XA0665)
6
5
4
1
2
3
VIN
DK
VOUT
Pin Assignment
Block Diagram
56
4
12
3
VIN
GND
OSC
DK
VOUT
T1
Feed back
control Ref. Voltage
Start-up
Circuit
Oscillator
VIN
OSC
DK
7) TK10931V (XA0666)
1 2 3 4 5 6 7 8 9 10 11 12
24 23 22 21 20 19 18 17 16 15 14 13
AM
DET
RSSI
RECT
COMP
AMP AGC
Vref
Vcc
AM
AMP
FM
AMP
FM DET
MIXER
OSC
RF INPUT GND COMP OUTPUT COMP INPUT NOISE AMP OUTPUT NOISE AMP INPUT AM AGC INPUT AGC AMP OUTPUT RF AGC OUTPUT RSSI OUTPUT AM SW AM DET OUT
OSC(B) OSC(E)
MIX OUTPUT
Vcc
AM IF INPUT
DECOUPLING
FM IF INPUT
DECOUPLING DECOUPLING
LIM OUTPUT
QUAD INPUT
FM DET OUTPUT
Pin Assignment / BLOCK Diagram (Top View)

13
8) TA4101FTE12L (XA0667)
1234
8765
1. IF OUT
2.Vcc
3. OSC IN
4. BASE
5. BASE
6. BASE
7. GND
8. COLLECTOR
Pin Assignment Block Diagram
23
R 1
RB1
RB2
RB3
RB4
R
2
R 3
Q 1 Q 2 Q 3 Q 4
Q 5 R 4 Q 6
3
RE1 RE2
8
1
4
6
7
RL1 RL2
9) S-80828ALNP-EAR-T2 (XA0834)
12
34
1 OUT
2 VDD
3 NC
4 VSS
Top view
Pin Assignment
Block Diagram
VDD
VCC
OUT
VREF

14
10) BR24C64F-E2 (XA0669)
1
2
3
4
A0
A1
A2
GND
Vcc
WP
SCL
SDA
8
7
6
5
13bit 8bit
64Kbit EEPROM ARRAY
ADDRESS
DECODER SLAVE•WORD
ADDRESS REGISTER DATA
REGISTER
CONTROL CIRCUIT
VOLTAGE
DETECTOR
HIGH VOLTAGE
GENERATOR
13bit
ACK
STOPSTART
Block Diagram
Pin Assignment
Vcc WP SCL SDA
A0 A1 A2 GND
BR24C64/F
11) S-81230SG-QB-X (XA0833)
Pin Assignment Block Diagram
VIN VOUT
RL

15
12) uPC2757T-E3 (XA0743)
3
2
1
4
5
6
Terminal Connection
Block Diagram
C1X
(Top View)
4
5
6
3
2
1
(Bottom View)
1: RF input
2: GND
3: Lo input
4: PS (Power Save)
5: Vcc
6: IF output
RF
input IF output
Lo
input Vcc GND
POWER
SAVE
13) TC7SET08FU (XA0586)
G 2
1
2
3
5
4
IN B
IN A
GND
Vcc
OUTY
Pin Assignment Block Diagram

16
14)LA3335M (XA0786)
Block Diagram
10 9
Pin Assignment
876
54321
1: Input
2: PLL loop filter
3: Power supply
4:VCO
5: NC
6 : GND
7 : Stereo indicator fillter
8 : Pilot sync detection
9 : Decoder output (low)
10 : Decoder output (high)
10 9 8 7 6
1 2 3 4 5
DECODER
STEREO
SWITCH
FF∠90°FF1/2
PHASE
COMPARATOR
V.C.O
FF∠0°
SYNCHNOUS
DETECTOR
LAMP
TRIGGER
VCOSTOP

17
15) NJM2107 (XA0850)
Pin Assignment
Block Diagram
16) Transistor, Diode and LED Outline Drawings
TX
N
MC3
K B
L L M 2 Y R VY
KY 6 R O 3 G13
1SV308(TPH3)
XD0339 MA2S728-TX XD0315
DAN235E-TL
XD0320 MA2S357-TX XD0337 ISS362 TE85L XD0338
SML-310MTT86
XL0036
ISS390 TE61
XD0342 MA2S30400L XD0312
2SC4738BL(TE85R)
XT0181
2SC5066FT-Y(TE85L)
XT0180 2SD2216R-TX XT0135 2SB1132T XT0061
MA2Z720
XD0367
2SJ144Y(TE85R)
XE0019
UMC5N TR
XU0152 XP1111-TX XU0171
UN911H TX
XU0092 DTC143TE TL XU0196
2SK881Y(TE85R)
XE0036
5 R
B A
XP01501
XU0172 2SK1580
XE0029
2L

18
17)LCD connection
Pin No COM0 COM1 COM2 COM3
1 COM0 - - -
2 - COM1 - -
3 - - COM2 -
4 - - - COM3
5DEFC
6HI JG
7LMNK
8POVW
9RSUT
10 9c 9b 9a Y
11 9e 9g 9f 9d
12 8c 8b 8a X
13 8e 8g 8f 8d
14 7c 7b 7a Z
15 7e 7g 7f 7d
16 6c 6b 6a 6h
17 6e 6g 6f 6d
18 5c 5b 5a Q
19 5e 5g 5f 5d
20 4c 4b 4a 4h
21 4e 4g 4f 4d
22 3c 3b 3a B2
23 3e 3g 3f 3d
24 2c 2b 2a B1
25 2e 2g 2f 2d
26 1c 1b 1a A
27 1e 1g 1f 1d

19
EXPLODEDVIEW
1) Front View
TL0027
UP0426
FG0330
DG0040
TL0026
EL0053
ST0069
KZ0134
UR0023

20
2) BottomView
A
A
NK0077
SP0013
AN0012
AN0027
UE0338
FG0337
FG0335
FG0334
AX0008
AX0005
FG0331
ES0021
FM0201
FP0182
UP0426
AF0025
TS0166
SD0093
FG0346
SD0092
FG0338
EA0096
FG0347