Analog Devices EVAL-ADIN1110EBZ User manual

Preliminary UG-XXXX
EVAL-ADIN1110EBZ User Guide
One Technology Way •P.O. Box 9106 •Norwood, MA 02062-9106, U.S.A. •Tel: [phone] •Fax: [phone] •
www.analog.com
Evaluating the ADIN1110 Robust, Industrial, Low Power
10BASE-T1L Ethernet MAC-PHY
Rev. PrA
Evaluation boards are only intended for device evaluation and not for production purposes.
Evaluation boards as supplied “as is” and without warranties of any kind, express, implied, or
statutory including, but not limited to, any implied warranty of merchantability or fitness for a
particular purpose. No license is granted by implication or otherwise under any patents or other
intellectual property by application or use of evaluation boards. Information furnished by Analog
Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog
Devices for its use, nor for any infringements of patents or other rights of thirdparties that may result
from its use. Analog Devices reserves the right to change devices or specifications at any time
without notice. Trademarks and registered trademarks are the property of their respective owners.
Evaluation boards are not authorized to be used in life support devices or systems.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone] www.analog.com
Fax: [phone] ©2020 Analog Devices, Inc. All rights reserved.
FEATURES
Operates from a single, external 5-30 V supply or from USB
On-board ARM Cortex ADuCM4050 microcontroller
SPI header for access to SPI interface and status signals
Accessible hardware configuration pin switches
EVALUATION KIT CONTENTS
Two EVAL-ADIN1110EBZ evaluation boards
Two mini USB cables
MIDAS-JLINK + ARM-JTAG-20-10 adapter
EQUIPMENT NEEDED
Power supply (choose one of the following):
5-30 V power supply rail to connect to the P1 connector
5-30 V barrel adaptor to connect to the P2 plug
USB cable
Single pair ethernet cable
USB cable
PC running Windows 7 and upward
SOFTWARE NEEDED
FTDI USB driver
Basic UART terminal
CrossCore serial flash programmer software
DOCUMENTS NEEDED
ADIN1110 data sheet
GENERAL DESCRIPTION
The EVAL-ADIN1110EBZ allows simplified evaluation of the
key features of the ADIN1110 robust, industrial, low power
10BASE-T1L Ethernet MAC-PHY. The EVAL-ADIN1110EBZ
is powered by a single, external, 5-30 V BOARD_PWR supply
rail that can be supplied either via the P1 connector or via the
P2 plug. Alternatively, the board can be powered from USB via
the P5 connector. The supply of choice is selected via the P4
link (see Figure 1).
Figure 1. Schematic Snapshot – BOARD_PWR
All ADIN1110 supplies are regulated from the BOARD_PWR
rail, providing supply rails required for AVDD_H, AVDD_L,
VDDIO and DVDD_1P1.
The P7 SPI header is provided for access to the SPI interface
signals and other potential signals of interest. The EVAL-
ADIN1110EBZ is fitted with a 25 MHz crystal (Y3).
For complete specifications for the ADIN1110 device, see the
ADIN1110 data sheet, which must be consulted in conjunction
with this user guide when using the EVAL-ADIN1110EBZ.
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TABLE OF CONTENTS
Features.............................................................................................. 1
Evaluation Kit Contents .................................................................. 1
Equipment Needed........................................................................... 1
Software Needed............................................................................... 1
Documents Needed.......................................................................... 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
EVAL-ADIN1110EBZ ..................................................................... 3
Evaluation Board Hardware ........................................................... 4
Power Supplies.............................................................................. 4
Hardware Configuration Pins Setup ......................................... 5
On-Board ADuCM4050 Microcontroller................................. 5
On-Board LEDs ............................................................................ 6
Evaluation Board Usage Options............................................... 7
Clock Options ............................................................................... 8
Reset Options................................................................................ 8
On-Board Flash Memory ............................................................ 8
Programming the ADuCM4050 .................................................8
Interacting with the PHY using UART Terminal Window....9
Troubleshooting ............................................................................. 10
Software Installation Tips ......................................................... 10
Hardware Tips............................................................................ 10
Layout Guidelines .......................................................................... 11
Board Stackup............................................................................. 11
Ground Planes ............................................................................ 11
Power Supply Decoupling......................................................... 11
SPI Interface................................................................................ 11
MDI Interface ............................................................................. 11
Thermal Considerations ........................................................... 11
Evaluation Board Schematics and Artwork................................ 12
Ordering Information.................................................................... 20
Bill of Materials .......................................................................... 20
REVISION HISTORY
07/2020—Revision PrA: Initial Internal Version
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EVAL-ADIN1110EBZ
Figure 2. EVAL-ADIN1110EBZ
Figure 3. EVAL-ADIN1110EBZ Functional Block Diagram
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EVALUATION BOARD HARDWARE
POWER SUPPLIES
The EVAL-ADIN1110EBZ is powered by a single, external, 5-
30 V BOARD_PWR supply rail that can be supplied either via
the P1 connector or via the P2 plug. Alternatively, the board
can be powered from USB via the P5 connector. The supply of
choice is selected via the P4 link (see Figure 4).
Figure 4. Schematic Snapshot – BOARD_PWR
All ADIN1110 supplies are regulated from the BOARD_PWR
rail, providing supply rails required for AVDD_H, AVDD_L,
VDDIO and DVDD_1P1. The rest of the EVAL-
ADIN1110EBZ power requirements are generated from
BOARD_PWR supply. The LT8619 regulator generates a 3.3 V rail
from which the LTC3547 regulator in turn generates a 1.8 V and
1.1 V rail. The ADIN1110 DVDD_1P1 rail can be set up to use its
own internally generated DLDO_1P1 rail or the LTC3547-
generated 1.1 V rail via the P17 link. AVDD_H, AVDD_L and
VDDIO can be configured for 1.8 V or 3.3 V rail connection via
the P13, P14 and P15 link respectively. Alternatively, AVDD_H,
AVDD_L and VDDIO can be shorted together via P19 & P20 and
their value determined by a single link connection of P13, P14 or
P15. See Figure 5.
Figure 5. Simplified Schematic Snapshot – ADIN1110 Power Supply Rails
The ADuCM4050 microcontroller supply can be supplied from
either the 3.3 V or 1.8 V rail (via P11 link). Table 1 captures the
default position of all board link configurations.
Table 1. Default Board Link Configuration
Link no.
Default
Position Link Function
J101
Earth
Shield shorted either directly to Earth, or via 4nF cap.
P4 EXT USB – Connects 5V USB supply to the input of the LT8619.
EXT - Connects externally supplied power from P1 or P2 to the input of LT8619.
P10 Burst FORCED CURRENT – (H) Force Continuous mode of operation of LT8619.
PULSE SKIP (o/c) - Pulse-Skipping mode of operation of LT8619.
BURST (L) – Burst mode of operation of LT8619.
J2 Inserted This link supplies 3.3V rail to circuitry on the board, beyond the LT8619.
P11 3V3 ADuCM4050 supply voltage – choice of 3.3V or 1.8V.
P13 3V3 AVDD_H supply voltage – choice of 3.3V or 1.8V.
P14 3V3 AVDD_L supply voltage – choice of 3.3V or 1.8V.
P15 3V3 VDDIO supply voltage – choice of 3.3V or 1.8V.
P17 DVDD_1P1 DVDD_1P1 supply voltage – choice of EXT 1V1 rail or internally generated DLDO_1P1 (silkscreen label
“DVDD_1P1”)
P19 Not inserted Option to short AVDD_H to AVDD_L.
P20 Not inserted Option to short AVDD_L to VDDIO.
P8 BUTTON RESET Option to hold ADuCM4050 in reset (GND RESET) or short it to the S5 push-button reset (BUTTON
RESET).
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Table 2 shows an overview of the EVAL-ADIN1110EBZ supply
rail current for various operating modes.
Table 2. EVAL-ADIN1110EBZ Quiescent Current
(External Supply Rail = 24V)
Board Status
Typical
Quiescent
Current
ADIN1110 & ADuCM4050 held in hardware reset.
(RESET_N held low via S5)
1 mA
On power-up
(ADIN1110 & ADuCM4050 not held in reset)
8 mA
HARDWARE CONFIGURATION PINS SETUP
The ADIN1110 hardware configuration pin settings can be
changed by manipulating S1 switch settings found on the right-
hand-side of the EVAL-ADIN1110EBZ board (highlighted in
Figure 6). Table 3 lists the default switch configuration settings
on the board (see ADIN1110 datasheet for full details on
hardware configuration pin functionality). When the switch is
OFF, the hardware configuration pin is pulled low via an
internal pulldown resistor and when the switch in ON, the pin
is pulled high via an external 4.7 kΩ pull-up resistor.
Figure 6. Hardware Configuration Pins Switches Location.
Table 3. Default ADIN1110 H/W Config Switch Position
Switch/
Pin no.
Default
Position Default Switch Position Function
S1/Pin1 OFF TX2P4_ENB – 1.0 Vpk-pk/2.4 Vpk-pk
transmit amplitude mode
S1/Pin2 OFF MS_SEL – Prefer slave selection
S1/Pin3 ON SWPD_ENB – ADIN1110 not in SWPD
S1/Pin4 OFF SPI_CFG0 - Use 8-bit CRC on host SPI
ON-BOARD ADUCM4050 MICROCONTROLLER
The EVAL-ADIN1110EBZ has an on-board ADuCM4050
which can be used to read/write to the ADIN1110 MAC-PHY
over the SPI interface using the USB connection. This allows
interaction with the ADIN1110 device via a UART terminal
window.
ADuCM4050 Configuration Switches
The ADuCM4050 has 4 associated configuration switches
which are pulled low when the switch is in the ON position and
pulled high when in the OFF position (Figure 7). By default, all
four configuration switches are ON.
Figure 7. ADuCM4050 Config Switches
Table 4. Default ADuCM4050 Config Switch Position
Switch/
Pin no.
Default
Position Default Switch Position Function
S4/Pin1 ON (1) CFG3 – ADuCM4050 Config pin 3
S4/Pin2 ON (1) CFG2 – ADuCM4050 Config pin 2
S4/Pin3 ON (1) CFG1 – ADuCM4050 Config pin 1
S4/Pin4 ON (1) CFG0 – ADuCM4050 Config pin 0
Table 5. ADuCM4050 Config Switch Modes
CFG[3:0]1Operating Mode2Description
0000 TCP/IP Stack & Web Server, DHCP client,
MAC Addr1
The use of this mode is depicted in Figure 11. In this mode, the TCP/IP stack can
be managed via UART using dynamic IP address allocation. The media
converter board is then used to convert 10BASE-T1L to 10BASE-T ethernet, for
which common web browsers can be used to access the associated
information. MAC address 1 is used.
0001 TCP/IP Stack & Web Server, Fixed IP,
MAC Addr1
This is a similar mode to the previous one except fixed IP address allocation is
used. MAC address 1 is used.
0010 Not defined The ADuCM4050 makes no autonomous attempt to interact with the
ADIN1110 MAC-PHY.
0011 Not defined The ADuCM4050 makes no autonomous attempt to interact with the
ADIN1110 MAC-PHY.
0100 Enable uC Frame Generator/Checker,
MAC Addr1
The ADuCM4050 generates 100 frames (66 bytes length) and checks for
number of frames received and potential errors. Output is shown on UART. If
there is an error – the red LED turns on. It uses generic SPI protocol with CRC
mode enabled.
0101 Enable uC Remote Loopback,
MAC Addr1
Whatever frame is received from the MAC is transmitted back to the MAC. It
uses the generic SPI protocol with CRC mode enabled.
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CFG[3:0]1Operating Mode2Description
0110 Enable PHY Frame Generator/Checker The PHY Frame Generator sends 10,000 frames and checks for number of
frames received and potential errors. Output is shown on UART. If there is an
error – the red LED turns on.
0111 Enable PHY MAC Interface Remote
Loopback, MSE reading enabled
The PHY is set in MAC Interface Remote loopback mode, and in parallel MSE
readings are shown on UART. Link LED is also enabled.
1000 TCP/IP Stack & Web Server, DHCP client,
MAC Addr2
The use of this mode is depicted in Figure 11. In this mode, the TCP/IP stack can
be managed via UART using dynamic IP address allocation. The media
converter board is then used to convert 10BASE-T1L to 10BASE-T ethernet, for
which common web browsers can be used to access the associated
information. MAC address 2 is used.
1001
TCP/IP Stack & Web Server, Fixed IP,
MAC Addr2
This is a similar mode to the previous one except fixed IP address allocation is
used. MAC address 2 is used.
1010 Not defined The ADuCM4050 makes no autonomous attempt to interact with the
ADIN1110 MAC-PHY.
1011 Not defined The ADuCM4050 makes no autonomous attempt to interact with the
ADIN1110 MAC-PHY.
1100 Enable uC Frame Generator/Checker,
MAC Addr2
The ADuCM4050 generates 100 frames (66 bytes length) and checks for
number of frames received and potential errors. Output is shown on UART. If
there is an error – the red LED turns on. It uses generic SPI protocol with CRC
mode enabled.
1101 Enable uC Remote Loopback,
MAC Addr2
Whatever frame is received from the MAC is transmitted back to the MAC. It
uses the generic SPI protocol with CRC mode enabled.
1110 Not defined The ADuCM4050 makes no autonomous attempt to interact with the
ADIN1110 MAC-PHY.
1111 Reset MAC-PHY and enable LED Reset the ADIN1110 and then enable LED.
10 = switch is OFF (pin is pulled high), 1 = switch is ON (pin is pulled low).
2The UART terminal can be used to interact with the board for all of the ADuCM4050 configuration switch settings.
ADuCM4050 MSE Result
As listed in Table 5, when CFG[3:0] = [OFF, ON, ON, ON], the
MSE value of the link is continuously written to the UART and
can be read using Termite RS232 terminal (or equivalent)
software (assuming there is a valid link in place between two
link partners).
The Mean Square Error (MSE) result returned indicates link
quality. It is in fact the reciprocal of SNR. To meet the 1e-9 Bit
Error Rate (BER) mandated by the IEEE802.3cg Standard
(clause 146.5.5.1), an SNR of 20.05dB (i.e. MSE of -20.05dB) is
required. So a result equal to, or below -20dB is considered
compliant with the Standard.
ON-BOARD LEDS
ADuCM4050 LEDs
There are four LEDs associated with the ADuCM4050 –
labelled “uC0” to “uC3”. These are green, red, orange and blue
respectively. All LEDs blink once upon reset and powerup.
•The orange LED blinks every 250ms (acting as a
heartbeat signal).
•The red LED indicates a fault/error has occurred.
•The green LED is on permanently with the exception
of the TCP/IP modes, whereby the green LED blinks
until the IP address is assigned from the DHCP
server, after which point it stays on. If the selected
mode is fixed IP, the green LED is always on.
•The blue LED has no current programmed use-case.
Non-ADuCM4050 LEDS
ADIN1110 LED pin
There is one LED pin (pin name “LED”) on the ADIN1110. The
LED can be used to indicate link status. By default, the LED is
disabled (default behaviour is subject to change) and can be
enabled by setting the LED enable bit (LED_EN) within the
LED control register (see the ADIN1110 data sheet). The
associated yellow LED on the board (DS1) is labelled “Activity”.
The ADuCM4050 has been programmed to enable the LED
and cause it to illuminate when a link is established. These LED
configuration commands are written to the ADIN1110 in all of
the configurations listed in Table 5 with the exception of the
“Not defined” configurations. In the “Not defined”
configuration, the ADuCM4050 makes no autonomous attempt
to interact with the ADIN1110 MAC-PHY. See the Evaluation
Board Usage Options section for more details on the
ADuCM4050 configuration modes.
ADIN1110 LINK_ST pin
The Link Status output (LINK_ST) is active high and indicates
whether a valid link has been established. The associated green
LED on the board (DS6) is labelled “Link”.
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EVALUATION BOARD USAGE OPTIONS
In its most basic form, by utilizing the pre-loaded firmware and
configuring the ADuCM4050 switches appropriately, two
EVAL-ADIN1110EBZ boards can be used in standalone mode
(Figure 8 & Figure 9) without any connection to external
software to establish links with a link partner, indicated to the
user via LEDs. In standalone mode, power the EVAL-
ADIN1110EBZ with a 5-30 V supply at the P1 or P2 connector
or alternatively via USB. In this mode, a UART terminal can
optionally be used for extra user feedback and interaction with
the ADIN1110 versus solely based on LED activity.
Figure 8. Image of 2 EVAL-ADIN1110EBZ boards hooked together with cable.
Figure 9. Two MAC-PHY boards, Exercise PHY functionality
Firmware is configured by DIP switches (see Table 5) and the
MAC-PHYs are set per the hardware pin configuration DIP
switches (see Table 3). In the example depicted in Figure 9, only
the PHY portion of the ADIN1110 is exercised, no MAC
function is exercised. The MAC-PHY on board 1 is set to
generate and check frames and MAC-PHY on board 2 is set in
PHY MAC Interface Remote Loopback mode. Status
information is reported via UART/USB and also indicated on
LEDs. An alternative, but equally valid set-up would be to use
an EVAL-ADIN1100FMCZ PHY evaluation board as the link
partner board (i.e. board #2 in Figure 9).
Figure 10 depicts an example whereby the MAC function is also
exercised. This does not require any extra hardware or software
versus the previous example in Figure 9. It is invoked by setting
the ADuCM4050 configuration switches to enable µC Frame
Generator/Checker and µC Remote Loopback modes
respectively. The optional JLINK connections are shown in
cases where it is required to modify the firmware for any
reason.
The ADuCM4050 on board 1 is set to generate and check
frames and either the PHY within the MAC-PHY on board 2 or
the ADuCM4050 on board 2 is set to loopback the frames to
board 1. Again, status is reported via UART/USB and also
indicated on LEDs.
Figure 10. Two MAC-PHY boards, Exercise MAC-PHY functionality
A more advanced use of the EVAL-ADIN1110EBZ evaluation
board is in conjunction with a media converter board to
convert between 10BASE-T1L and 10BASE-T ethernet
protocols – this is depicted in Figure 11. In this example the
local application periodically reads the MAC-PHY status and is
linked to a web page. The TCP/IP stack can be managed via
UART using either fixed or dynamic IP address allocation. The
media converter board is then used to convert 10BASE-T1L to
10BASE-T ethernet, for which common web browsers can be
used to access the associated information.
Figure 11. MAC-PHY boards used with Media Converter
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CLOCK OPTIONS
The crystal oscillators on the EVAL-ADIN1110EBZ include the
following:
•Y1 is a 32.768 kHz crystal used for the on-board
ADuCM4050.
•Y2 is a 26 MHz crystal used for the on-board
ADuCM4050.
•Y3 is a 25 MHz crystal connected across the XTAL_I pin
and XTAL_O pin of the ADIN1110.
As shown in Figure 12, the EVAL-ADIN1110EBZ provides the
option to supply the ADIN1110 clock requirements from either
an on-board crystal oscillator (Y3), or an external clock
(EXT_CLK) applied to the J1 connector.
Figure 12. Schematic snapshot – clocking options
When a 25 MHz external clock is applied to the J1 connector,
the R86 resistor must be populated and the R72 and R87
resistors must be removed to disconnect the Y3 crystal. The
25 MHz clock must be a sine or square wave signal with an
input range of 0.8 Vpk-pk to 2.5 Vpk-pk. See the ADIN1110
data sheet for more information. For RMII mode, a 50 MHz
clock must be used.
In either of the cases where an external clock, other than the
on-board 25 MHz crystal, is being provided to the ADIN1110,
this signal must be capacitively coupled and divided down such
that the maximum amplitude does not exceed 2.5 Vp-p. If the
clock signal is less than 2.5 Vpk-pk, then C18 is not required
and a 1 nF coupling capacitor (C55) is recommended. If the
clock signal is greater than 2.5 Vpk-pk, then C18 should be
10pF and C55 chosen such that the signal does not exceed 2.5
Vpk-pk.
The ADIN1110 also provides a 25 MHz reference clock output
from the crystal oscillator on the CLK25_REF pin, which is
available on the P7 header and can also optionally be used to
drive the ADuCM4050 clock (alternative to 26 MHz crystal
which is the default configuration).
RESET OPTIONS
The S5 push-button switch is used to reset both the ADIN1110
MAC-PHY and the ADuCM4050 microcontroller (P8 is by
default in the “BUTTON RESET” position – see Figure 13).
Alternatively, the RESET_N MAC-PHY signal can be driven
from the ADuCM4050 output (signal name =
uC_to_PHY_RESET). The P8 link also facilitates the option to
hold the ADuCM4050 in reset using the “GND RESET”
position.
Figure 13. EVAL-ADIN1110EBZ reset options.
ON-BOARD FLASH MEMORY
The EVAL-ADIN1110EBZ also has an SPI 64Mbit Flash
Memory, U6, which can be used to store the board type,
revision and board unique ID.
PROGRAMMING THE ADUCM4050
The ADuCM4050 is programmed out-of-the box, so unless a
new hex file is being downloaded to the ADuCM4050, it is not
necessary to program it in order to use the EVAL-
ADIN1110EBZ evaluation board. The default behavior of the
configuration switches based on the pre-loaded firmware is
listed in Table 5. The current revision of the firmware can be
viewed using a UART terminal window and pressing the
RESET push-button-switch (S5) – example shown in Figure 15:
“Firmware ver.: 5.1”.
In order to program the ADuCM4050, use the following steps:
1. Ensure the mini USB cable is connected between the
EVAL-ADIN1110EBZ board and the PC and open the
CrossCore serial flash programmer software.
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Figure 14. CrossCore Serial Flash Programmer.
2. Set the CrossCore Serial Flash programmer according
to Figure 14 (COM port may vary depending on the
PC).
3. Browse to select the hex file to download.
4. On the EVAL-ADIN1110EBZ board, simultaneously
press buttons S3 (BOOT) and S5 (RESET). Hold and
release the RESET button first, followed by the BOOT
button. Now the ADuCM4050 microcontroller is in
the programming state.
5. Click Start and the code should start to download
with updates provided in the Status window and
progress bar across the bottom of the window.
6. After programing, press & release RESET button (S5).
INTERACTING WITH THE PHY USING UART
TERMINAL WINDOW
To interact with the PHY using a UART terminal window such
as Termite, the ADuCM4050 configuration switches (Table 5)
can be in any configuration.
Launch the UART terminal window and ensure the relevant
COM port is selected. Type ‘?’<newline> to get a list of possible
commands (see Figure 15). Typing ‘info’<newline> displays the
board information of the evaluation board connected to the
active COM port, while typing ‘reset’<newline> resets the
ADuCM4050.
The commands for reading and writing to the MAC and PHY
are (all digits in hex):
Writing to MAC register:
“macwrite <RegAddr>,<Data>”<newLine>
Reading from MAC register:
“macread <RegAddr>”<newLine>
Writing to PHY register:
“phywrite <phyAddr><RegAddr>,<Data>”<newLine>
Reading form PHY register:
“phyread <phyAddr><RegAddr>”<newLine>
where “RegAddr” is a concatenation of the ADIN1110 Device
Address & Register Address per the ADIN1110 datasheet. An
example of the use of all 4 commands is shown in Figure 16.
Figure 15. Termite UART Terminal Window.
Figure 16. UART - Register Read/Write Examples
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TROUBLESHOOTING
SOFTWARE INSTALLATION TIPS
Ethernet PHY software installation tips follow:
•Always allow the software installation to be completed.
The FTDI drivers can be found at
www.ftdichip.com/Drivers/CDM/CDM21228_Setup.zip.
The installation may require a restart of the PC.
•If the EVAL-ADIN1110EBZ does not appear in the UART
terminal window, ensure that the following steps have
been competed:
-Power is applied to the EVAL-ADIN1110EBZ.
-The powered USB connector is connected to the
EVAL-ADIN1110EBZ.
-The Ethernet cable is connected between the two
boards (if using two boards).
-The correct COM port is configured.
-Try perform a hardware reset, using the S5 push-
button switch.
HARDWARE TIPS
Ensure that power is applied to the EVAL-ADIN1110EBZ.
Measure the voltage at various points on the EVAL-
ADIN1110EBZ using the 3V3, 1V8, 1V1, AVDD_H, AVDD_L,
VDDIO and DVDD_1P1 test points.
No Link Established
If no link is established, take the following steps to assist debug:
•Ensure that the Ethernet cable is connected properly to the
P101 connector and between the EVAL-ADIN1110EBZ
boards or MAC-PHY pairs.
•When using two EVAL-ADIN1110EBZ boards, ensure
that both boards are powered.
•Ensure that the hardware configuration is appropriate for
the required linking arrangement.
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LAYOUT GUIDELINES
BOARD STACKUP
The EVAL-ADIN1110EBZ consists of a 4-layer PCB: the top
layer, Layer 2, Layer 3, and the bottom layer. All layers have a
copper pour, with an extra keep-out area along the left-hand-
side of the board close to the Earth trace.
GROUND PLANES
The top and bottom layers of the EVAL-ADIN1110EBZ mainly
carry signal and routing signals from the ADIN1110. The two
inner layers are used for ground planes. Layer 2 is a full ground
plane. Layer 3 also has a ground plane but is also used to track
the power signals. Although the ADIN1110 is a mixed signal
device, it only has one type of ground return, GND.
POWER SUPPLY DECOUPLING
From a PCB layout point of view, it is important to locate the
decoupling capacitors as close as possible to the power supply
and GND pins to minimize the inductance.
SPI INTERFACE
When routing the SPI interface traces, avoid crossover of the
signals where possible. Stubs should be avoided on all signal
traces. It is recommended to route traces on the same layer.
MDI INTERFACE
Traces running from the RXP/N and TXP/N pins of the
ADIN1110 to the external hybrid circuit (R103-R106, C17,
C101) must be, where possible, on the same side of the EVAL-
ADIN1110EBZ and kept as short as possible. The same
recommendations apply for traces running through the C102
and C104 series capacitors to the common mode choke and
onwards to the cable connector (P101) – see Figure 17.
Impedance must be kept constant throughout. Trace lengths
must be kept equal where possible and any right angles on these
traces must be avoided (use curves or 45° angles in the traces).
Stubs must be avoided on all signal traces.
Figure 17. MDI Interface Connections.
THERMAL CONSIDERATIONS
The ADIN1110 is packaged in an LFCSP package. This package
is designed with an exposed paddle which must be soldered to
the PCB for mechanical and thermal reasons. The exposed
paddle acts to conduct heat away from the package and into the
PCB. By incorporating an array of thermal vias in the PCB thermal
paddle, heat is dissipated more effectively into the inner metal
layers of the PCB. When designing the PCB layout for
optimum thermal performance, use a 4 mm × 4 mm array of
vias under the paddle.
3.60
3.50 SQ
3.40
BOTTOM VIEW
0.45
0.40
0.35
0.30
0.25
0.20
0.20 MIN
0.50
BSC
40 1
1110
20
21
3031
PIN 1
INDICATORAR EAOPTIONS
(SEEDETAILA)
DETAIL A
(JEDEC 95)
Figure 18. LFCSP Simplified Package Drawing
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Preliminary UG-XXXX EVAL-ADIN1110EBZ User Guide
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EVALUATION BOARD SCHEMATICS AND ARTWORK
Figure 19. Cable connection & EVAL-ADIN1110EBZ Board Power
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EVAL-ADIN1110EBZ User Guide Preliminary UG-XXXX
Rev. PrA | Page 13 of 23
Figure 20. Power Supplies
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Preliminary UG-XXXX EVAL-ADIN1110EBZ User Guide
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Figure 21. ADIN1110 Connections
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EVAL-ADIN1110EBZ User Guide Preliminary UG-XXXX
Rev. PrA | Page 15 of 23
Figure 22. ADuCM4050 Connections
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Preliminary UG-XXXX EVAL-ADIN1110EBZ User Guide
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Figure 23. Miscellaneous Circuitry
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EVAL-ADIN1110EBZ User Guide Preliminary UG-XXXX
Rev. PrA | Page 17 of 23
Figure 24. Schematic Silkscreen, Top
Figure 25. Schematic Silkscreen, Bottom
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Preliminary UG-XXXX EVAL-ADIN1110EBZ User Guide
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Figure 26. Top Layer
Figure 27. Layer 2, Ground Layer
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EVAL-ADIN1110EBZ User Guide Preliminary UG-XXXX
Rev. PrA | Page 19 of 23
Figure 28. Layer 3, Power and Ground Layer
Figure 29. Bottom Layer
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Preliminary UG-XXXX EVAL-ADIN1110EBZ User Guide
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ORDERING INFORMATION
BILL OF MATERIALS
Table 6.
Qty Reference Designator Description Manufacturer Part Number
14 AVDD_H, AVDD_L,
DVDD_1P1, GND1-6, INT_N,
LINK_ST, TS_CAPT, TS_TIMER,
VDDIO
Black test-point KEYSTONE
ELECTRONICS
CNKEY5005-9TP
6 C1, C2, C85, C86, C87, C88 Ceramic Capacitors, 0.001uF, 3000V,
10%, 1812, X7R
KEMET C1812C102KHRACTU
2 C9, C10 Ceramic Capacitors, 10uF, 50V, 10%,
1210, X7R
MURATA GRM32ER71H106KA12L
2 C102, C103 Ceramic Capacitors, 0.22uF, 100V, 10%,
1206, X7R
AVX 12061C224KAZ2A
2 C106, C107 Ceramic Capacitors, 100pF, 3000V, 5%,
1812, COG
KEMET C1812C101JHGACTU
1 C11 Ceramic Capacitor, 1UF, 6.3V, 10%, 0402,
X7R
MURATA GRM155R70J105KA12D
1 C13 Ceramic Capacitor, 6.8pF, 50V, 0.25pF
tol, 0402, NPO (COG)
MURATA GJM1555C1H6R8CB01D
2 C8, C15 Ceramic Capacitors, 0.1uF, 50V, 10%,
0603, X7R
AVX 06035C104KAT2A
3 C16, C19, C20 Ceramic Capacitors, 10uF, 6.3V, 10%,
0805, X7R
MURATA GCM21BR70J106KE22L
1 C18 Ceramic Capacitor, 10pF, 50V, 0.5pF tol,
0603, COG
TDK C1608C0G1H100D080DA
2 C21, C23 Ceramic Capacitors, 1000pF, 50V, 5%,
0402, NPO (COG)
MURATA GRM1555C1H102JA01
19 C22, C24, C25, C27, C28, C29,
C30, C36, C38, C39, C41, C42,
C43, C61, C65, C66, C67, C72,
C76
Ceramic Capacitors, 0.1uF, 25V, 10%,
0402, X7R
AVX CORPORATION 04023C104KAT2A
2 C26, C31 Ceramic Capacitors, 4.7uF, 6.3V, 20%,
0402, X5R
MURATA GRM155R60J475ME87D
2 C32, C34 Ceramic Capacitors, 8pF, 16V, 0.5pF tol,
0402, COG
AVX CORPORATION 0402YA8R0DAT2A
2 C33, C35 Ceramic Capacitors, 18pF, 50V, 5%,
0402, NPO (COG)
MURATA GJM1555C1H180JB01D
2 C37, C40 Ceramic Capacitors, 0.47uF, 16V, 10%,
0603, X7R
MURATA GCM188R71C474KA55D
4 C44, C46, C48, C75 Ceramic Capacitors, 4.7uF, 16V, 10%,
0603, X5R
TDK C1608X5R1C475K080AC
2 C45, C47 Ceramic Capacitors, 10pF, 50V, 5%,
0603, COG/NPO, High Temp
KEMET C0603H100J5GAC7867
6 C53, C63, C68, C69, C70, C74 Ceramic Capacitors, 0.01uF, 25V, 10%,
0402, X7R
TDK C1005X7R1E103K050EB
1 C55 Ceramic Capacitor, 1000pF, 100V, 5%,
0603, COG
TDK C1608C0G2A102J
2 C77, C81 Ceramic Capacitors, 1uF, 16V, 10%,
0603, X7R
AVX 0603YC105KAT2A
1 C82 Ceramic Capacitor, 0.68uF, 10V, 10%,
0603, X7R
YAGEO CC0603KRX7R6BB684
2
C83, C84
Ceramic Capacitors, 15pF, 50V, 1%,
0402, COG
MURATA
GCM1555C1H150FA16D
1 D1 Bidirectional TVS Diode FAIRCHILD
SEMICONDUCTOR
SMBJ36CA
1 D123 Bidirectional TVS diode surge/ESD BOURNS CDSOD323-T36SC
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