Axiom CMD-5 Series User manual

CMD-5xx
Development Board for the Motorola MPC5xx Series Microcontrollers
Versions CMD-555, CMD560 - 566
Users Manual
© Axiom Manufacturing, 2000
2813 Industrial Lane
Garland, TX 75041
[phone] FAX [phone]
email: [email protected]
web: http://www.axman.com
This datasheet has been downloaded fromhttp://www.digchip.com at this page

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CONTENTS
FEATURES ...................................................................................................................................................................3
CAUTIONARY NOTES..................................................................................................................................................5
GETTING STARTED .....................................................................................................................................................6
SOFTWARE DEVELOPMENT.........................................................................................................................................................6
TERMINAL SETTINGS..................................................................................................................................................................7
TUTORIAL..................................................................................................................................................................................7
Using the Debug Monitor.....................................................................................................................................................7
Programming the Onboard Flash Memory...........................................................................................................................8
MEMORY BANKS AND DEFAULT MEMORY MAP ......................................................................................................9
CMD-5XX DEFAULT MEMORY MAP...........................................................................................................................................9
SYNCHRONOUS SRAM MEMORY .............................................................................................................................................10
BURSTABLE FLASH MEMORY ...................................................................................................................................................10
PORT REPLACEMENT UNIT (PRU) MEMORY .............................................................................................................................10
MEM SOCKETS MEMORY ........................................................................................................................................................10
OPTION SWITCHES AND JUMPERS..............................................................................................................................................11
Mode Switch 1-4 External Reset Configuration Options...................................................................................................... 11
Mode Switch 1...................................................................................................................................................................11
Mode Switch 2...................................................................................................................................................................11
Mode Switch 3...................................................................................................................................................................11
Mode Switch 4...................................................................................................................................................................11
CFG_EN Jumper...............................................................................................................................................................11
MEMORY DEVICE / BANK SELECTION AND CONFIGURATION...................................................................................................... 12
Memory Bank Chip Select Configuration............................................................................................................................ 12
MAP_SW – Ram Bank and Flash Bank Options..................................................................................................................12
MEM_EN Jumper..............................................................................................................................................................13
MEM_OPT Jumper............................................................................................................................................................13
MEM_VOLT Jumper.......................................................................................................................................................... 13
PRU_EN Jumper ...............................................................................................................................................................13
COMMUNICATION PORTS.........................................................................................................................................14
COM_SWITCH - SERIAL PORT CONFIGURATION..................................................................................................................... 14
JP1 – COM-2 DCE/DTE Option ........................................................................................................................................ 14
DATA LINK CONTROLLER / J1850.............................................................................................................................................15
CAN INTERFACE AND OPTIONS ................................................................................................................................................15
LCD-PORT AND KEYPAD / KEY-PORT ...............................................................................................................................16
LCD / Keypad Memory Map ..............................................................................................................................................16
LCD Display CONTRAST..................................................................................................................................................16
JP2 - LCD_PORT Power Polarity Select............................................................................................................................ 16
PERSONALITY MODULE (PM-5XX) OPTIONS AND SETTINGS................................................................................17
CONFIG SWITCH ....................................................................................................................................................................17
PM-555/6 HARDWARE OPTIONS...............................................................................................................................................17
PM- 555/6 -T Additional Options ....................................................................................................................................... 17
PM-561/2/3/4 HARDWARE OPTIONS......................................................................................................................................... 18
PM561/2/3/4-T Options ..................................................................................................................................................... 18
PM-565/6 HARDWARE OPTIONS...............................................................................................................................................19
TROUBLESHOOTING.................................................................................................................................................20

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Features
The CMD-5xx along with a PM-5xx Personality Module is a modular development system for the Motorola series of MPC5xx
PowerPC microcontrollers. The system is Plug and Play with the supplied with the Axiom Monitor in the on-board EPROM,
2MByte (512K x 32) Synchronous SRAM, 4MByte (1M x 32) Burstable Flash EPROM, Communication Interfaces, Port
Replacement Unit, Keypad and LCD Module support, Serial Cable, Wall Plug power source, printed hardware manual and the
UTL5xx CD with programming utilities, support software and technical manuals. Applications developed on the CMD-5xx are
directly portable to the PMP-xxx peripheral support boards for in-system industrial control solutions.
Specifications
Clock 50 MHz Maximum
Operating temperature 0°C to +70°C
Power requirement 6 - 20V DC @ 400 ma Typical
Power output 5.8V @ 2.5A output with 5V, 3.3V, and 2.6V regulated supplies
Board Size 8 x 9.5 inches

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Standard Configurations
Board Processor Board Processor Board Processor
CMD-555 MPC555 CMD-562 MPC562 CMD-565 MPC565
CMD-556 MPC556 CMD-563 MPC563 CMD-566 MPC566
CMD-561 MPC-561 CMD-564 MPC564 CMD-560 MGT560
Example part number: CMD-565 would be the CMD-5xx board with the PM-565 Personality Module that has a
socketed processor, AMD flash, and the global power source.
CMD-5xx Features
•Standard fixed memory (buffered):
•512K x 32 Sync. SRAM (100MHz)
•1M x 32 Burstable Flash EPROM
•Two Configurable 32pin memory sockets for 32K to 2MByte EPROM with 8 or 16 bit wide data bus, Axiom Monitor
installed standard.
•PRU - Port Replacement Unit provided for MPC5xx ports A, C, and D allow simulation of single chip port operation when
expanded bus is operating.
•MAP Switch – provides easy assignment of chip selects to ram and flash memory banks.
•MODE Switches – 4 DIP switches to fully support Hard Reset Word Configuration options.
•COM Switch – provide easy method of applying or isolating serial connections to RS232 transceiver.
•COM1 - SCIA1 w/ RS232 type DB9-S Connection
•COM2 - SCIA2 w/ RS232 type DB9-S Connection
•COM3 – SCIB1 w/ RS232 type 10pin cable Connection
•COM4 – SCIB2 w/ RS232 type 10pin cable Connection
•CAN Ports – 3 CAN transceiver (PCA82C250) interfaced ports, 1 x 4 headers.
•LCD Port - LCD Module Interface Connector w/ Contrast Adjust, Buffered and Memory Mapped
•KEYPAD and KEY Port - 16 Key or 20 Key interface, Debounced, Buffered, and Memory Mapped
•BUS Port – provides 32 data and 24 address or MPC5xx ports A and D on 60 pin header.
•CONTROL Port - Bus Controls or MPC5xx ports on a 44 pin header.
•QSM Ports – 2 Serial I/O ports with 16 pin socket headers.
•MIOS Port - MDA, PWM, and MGP timer or I/O interface with 34 pin socket header.
•TPU Ports - 3 Timing Processor I/O ports with 20 pin socket headers.
•QADC Ports - 2 Analog I/O ports, one 20 pin and one 24 pin socket header.
•INT Port – Interrupt or MPC5xx SGP port I/O with 10 pin header.
•POWER Port – Primary and standby power supply access port.
•I/O Connectors in .1 grid, pin headers for bus and control provide easy ribbon cable connection for external connections.
Socket headers provide easy wire connection to solderless prototype area or with provided pin headers installed, will allow
ribbon cable or wire wrap connections.
•Large Prototyping Area (5 x 1.75 inch) with +5V and ground connection grids.
•Mictor Logic Probe connectors for the Address and Data bus
•Solderless Prototyping area (2.5 x 1.5 inch) for easy installation of test connections.
•Power Indicators – Supply voltage indications for 5, 3.3, and 2.6V supplies
•Reset Switches – POR, Hard, Soft reset buttons.
•User Indicators – 4 user indicators to provide user conceived visual response during testing.
Axiom development systems provide for low cost software testing with the use of the Monitor in the on-board EPROM. Operation
allows the user to load code in the On-Board RAM, Execute application, and display or modify registers or memory. After code is
operational the user may relocate the code and reprogram the MPC5xx Internal Flash EEPROM or the boards fixed flash for
dedicated operation of new software. No additional hardware or software is required to operate. For high level debug, extensive
tools are available for the PowerPC core and the Debug Port is available on the PM-5xx module to connect a background debugger.

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Cautionary Notes
Axiom Manufacturing reserves the right to make changes without further notice to any products to improve
reliability, function or design. Axiom does not assume any liability arising out of the application or use of any
product or circuit described herein; neither does it convey any license under patent rights or the rights of
others. Axiom products are not designed, intended, or authorized for use as components in systems intended
for surgical implant into the body, or other applications intended to support or sustain life, or for any other
application in which failure of the Axiom product could create a situation where personal injury or death may
occur. Should Buyer purchase or use Axiom manufacturing products for any such unintended or unauthorized
application, Buyer shall indemnify and hold Axiom Manufacturing and its officers, employees, subsidiaries,
affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney
fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended
or unauthorized use, even if such claim alleges that Axiom Manufacturing was negligent regarding the design
or manufacture of the part or system.
EMC Information on CMD565
1. This product as shipped from the factory with associated power supplies and cables, has been tested
and meets with requirements of EN5022 and EN 50082-1: 1998 as a CLASS A product.
2. This product is designed and intended for use as a development platform for hardware or software in
an educational or professional laboratory.
3. In a domestic environment this product may cause radio interference in which case the user may be
required to take adequate measures.
4. Anti-static precautions must be adhered to when using this product.
5. Attaching additional cables or wiring to this product or modifying the products operation from the
factory default as shipped may effect its performance and also cause interference with other apparatus
in the immediate vicinity. If such interference is detected, suitable mitigating measures should be
taken.

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Getting Started
See the README.TXT file on the CD provided with this board for all the documentation and support files provided.
See also the PM-5xx Personality Module Reference for your platform specific information, including BDM and CMFI (on-chip
flash) programming support.
This section assumes that you have just received your board from the manufacturer. If this is not the case then jumpers and switches
may have been changed so that the board may not function as expected. In this case, see the "Option Switches and Jumpers " section
of this manual and return everything to "default" positions before proceeding.
To get started quickly, perform the following test now to make sure the board is working correctly:
1. Connect one end of the supplied 9-pin serial cable to a free COM port on your PC. Connect the other end of the cable to
the COM-1 port on the board.
2. Run a standard ANSI terminal communications program set to 9600 baud, N,8,1. Any terminal program will work,
including the simple terminal that comes with MS Windows (HyperTerminal) or the one supplied on the support CD with
this board.
3. Apply power to the board by plugging in the wall plug power transformer that came with the system.
4. After a few seconds delay, if everything is working properly, you should see the main utilities menu, similar to the
following:
---------------------------------
AXIOM CMD-5XX UTILITIES
---------------------------------
1. Debug Monitor
2. On-Chip CMFI Flash Programming
3. External Flash Programming
4. Test Hardware
Select:
Your board is now ready to use! If you do not see the monitor prompt, press then release the RESET button on the board. If still no
go, or if the text is garbage, see the TROUBLESHOOTING section of this manual. The MEM bank should contain the “Axiom
MON5xx” EPROM’s and this bank only should be assigned CS0 to boot the utilities.
Software Development
The example monitor / utility software initializes the clock to run this board at 20 MHz on power-up. The board has been tested and
does run at speeds up to 40 MHz however, which you can set by changing the PLL Register in your software.
Software development on the CMD-5xx is best performed using a BDM tool connected to the BDM-PORT connector on the PM-
5xx module. This provides real-time access to all hardware, peripherals and memory on the board. BDM software is also available
for high-level source code debugging. Contact the manufacturer for more information.
If a BDM is not available, software development can be done using the included simple monitor program to upload your code to ram
and execute it or program it into EEPROM.
In either case, software is usually uploaded to RAM and executed during development, then programmed into EEPROM to execute
when power is applied.

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Terminal Settings
The utility software provided uses the serial port connected to your PC running a terminal program as described under "Getting
Started". While you can use almost any commercial or free serial communications terminal interface, it is important that you
configure it to work properly with this board. The following settings are important:
1. BPS: 9600, Data Bits 8, Parity none, Stop Bits 1
2. Flow Control should be set to HARDWARE or None
3. Emulation should be ANSI
4. When uploading files to the board, be sure to send in Text mode.
5. When programming CMFI memory, you must use ONE of the following:
a. 15 millisecond pace delay after each line
b. wait for echo character following each line
A free terminal program that works well with this board called “AxIDE” is provided on the support CD. It is also available for
download from the manufacturers web site at www.axman.com.
Tutorial
The following brief tutorial will help you become familiar with software development on this board quickly. For processor specific
tutorials, such as BDM support and CMFI programming, see the PM-5xx Personality Module Reference that came with your board.
Using the Debug Monitor
This board ships with a simple monitor utility programmed into the U15 and U16 EPROM devices. See "Getting Started" for startup
instructions. Choose menu item 1 to launch the monitor.
Using this program and any serial communications terminal program, you can display and modify memory and registers on the
board from any PC. This is done by typing commands into the terminal program on the PC. Type help and hit <enter> for a
complete list of available commands.
You can experiment with some of the commands like reading (MD) and modifying (MM) memory. Make sure you're modifying
memory that is mapped to valid addresses or the monitor program will "hang" or throw an exception. You may then have to RESET
the board to get the monitor back. Internal RAM starts at 0x3F9800. External RAM starts at 0x800000 as shipped with the default
MAP_SW settings. The monitor program itself uses internal RAM from 0x3F9800 - 0x3F9FFF, so if you modify anything in this
area while the monitor is running it may hang.
You can also load and execute a program from memory using this utility. A simple "hello world" program is provided for you on
the CD as an example. Follow these steps to load and execute it from internal RAM using the monitor program:
1. At the monitor prompt > type DL and hit <enter>.
2. Select the send text file (or upload) command from your terminal program and locate the file named "HELLO_R.S19"
included on the support CD. Send this file to the board.
3. When finished uploading, type go 3FA004 at the prompt. You should see the phrase "Hello World!" echoed back to the
screen, which is all that this simple test program does, each time you hit a key.
4. To exit from this test program, hit a RESET button on the board.
This example program was compiled with the Diab Data compiler. The source files and scripts used are included on the support CD
as follows:
HELLO.C Main source code file
SERIAL.C Serial port I/O and ASCII text conversion routines
HELLO_R.DLD Diab Linker script - specifies the programs memory organization
HELLO_R.BAT DOS batch file used to build the program

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Programming the Onboard Flash Memory
After testing your program running out of RAM you will probably want to program it into EEPROM so that it starts whenever
power is applied to the board. To do this you must first change the starting address of your program to match that of the memory
device being programmed. This is usually done in assembly language using the ORG statement, or by MAK or Project file
arguments to the LINKER if using a compiler.
As an example, a version of the "hello world" program is included on the support CD that has been relocated to start at address
0x400000. This will be the starting address assigned to external onboard flash memory, once we move some jumpers and reset the
board.
This version is called "HELLO_F". It uses the same HELLO.C and SERIAL.C source code as the RAM version, with the following
unique files:
INIT.S Example Boot initialization assembly source file
HELLO_F.DLD Diab Linker script - specifies the programs memory organization
HELLO_F.BAT DOS batch file used to build the program
The output files produced from this build are called HELLO_F.S19 and HELLO_F.ELF.
Follow these steps to program the "hello world" example to start on power-up instead of the monitor program:
1. Make sure the MAP_SW positions 2 and 7 are only on. This will configure the board to match the default Memory Map.
2. Make sure the MEM_EN jumper is installed and press RESET to get the utilities menu (see Getting Started).
3. Select External Flash Programming from the menu.
4. Select 2 for External Flash (U13/U14) - CS2.
5. Select 1to Erase the Flash Memory. This should take less than 20 seconds.
6. Select 2 to Program from a file -> Flash CS. This will prompt you to upload the file to be programmed.
7. Select the send text file (or upload) command from your terminal program and locate the file named "HELLO_F.S19"
included on the support CD and send this file to the board. If you have problems uploading, try adding a pacing delay.
8. After all lines from the file have been programmed, the words programmed are displayed along with any errors, followed
by the menu again. Now the "hello world" program is at address 0xC00000 (the current location of onboard flash),
however it is linked to be run from 0x400000, since this is the address the program assigns to the CS0 base register at
runtime.
Explanation: Since the monitor EPROMS in U15/16 use the same Chip Select 0 that we wish to use for the "hello world"
program (by the setting of the MEM_EN jumper), we must do an offset programming operation to a different chip select.
Setting the MAP Switch position 7 on configures the onboard flash to Chip Select 2. The monitor program will offset the
program to that chip select base address (0xC00000) temporarily during programming.
9. Power down the board and move the MODE_SW1 switch 5 to the OFF position. This will configure the board to 32-bit
mode boot, which is required for the onboard flash memory to boot while in the 32 bit wide mode.
10. Remove the MEM_EN jumper and change the MAP Switch to position 7 OFF and position 5 ON.
11. Power up the board. You should see the "hello world" message on your terminal screen every time you press a key.
12. To return to the Utilities Menu, turn power off the board, move the MODE_SW1 switch 5 back to ON, install the
MEM_EN jumper, and set the MAP switch position 5 OFF and position 7 ON. Power on the board and you should see
the menu again.
Although this "Hello World" example is a simple program, you can use the same procedure for programming your own application
into external flash memory using the CMD-5xx development board.
To develop more complex applications, with source level debugging, you will no doubt require a debugger tool. An excellent
choice would be a Background Debug Module (BDM) which is supported using the BDM-PORT on this board. See the "Using a
BDM" section of this manual for more information. Follow these steps to program the "hello world" example to start on power-up
instead of the monitor program:

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Memory Banks and Default Memory Map
The CMD-5xx board provides three memory banks and a Port Replacement Unit (PRU) that can be optionally selected by the
MPC5xx microcontroller chip selects. The memory banks are the Synchronous SRAM (U2-U5), Burstable Flash EPROM (U13-
U14), and MEM firmware sockets (U15-U16). Since the MPC5xx chip selects are fully programmable (with the exception of CS0
providing external Reset start-up) the memory banks can be located at any location in the MPC5xx memory space. As a reference
example, Axiom has defined a default memory map where the chip selects are located at predefined locations. The provided
software uses this memory configuration. If you modify this memory map make sure that all memory bank and chip select
configuration settings are correct. See Memory Device / Bank Selection and Configuration for more information.
Following is the default memory map for this board as configured by the utility EPROMs installed the MEM sockets U15/U16. The
internal map is detailed further in the MPC5xx Users Manual. Chip Selects 0-3 can be changed by your software to map the external
memory in different locations but the chip select configuration for each memory type should be maintained.
Possible Chip Select usage:
Synchronous SRAM Memory Bank CS0, CS1, CS2, or CS3 default CS1
Burstable Flash Memory Bank CS0, CS1 or CS2 default CS2
Port Replacement Unit CS2 or CS3 default CS3
MEM Sockets Bank CS0
CMD-5xx Default Memory Map
Internal Memory (See MPC5xx microcontroller documentation)
0000 0000 CMFI Internal Flash Memory Array if present
0007 0000 Reserved or CMFI Array 2
002F C000 On-chip Control and Status Registers
003F 9800 Internal SRAM
External Memory
0040 0000
40:0000 – 40:FFFF for 64K device
40:0000 – 47:FFFF for 512K device
CS0 - External MEM EPROM
16 bit MEM devices U15A-U16 or 8 bit MEM device in U15B
(shipped with monitor / utilities program here)
0080 0000 CS1– External Sync. SRAM – 32 bit port, devices U2-U5
2M bytes at 80:0000–9F:FFFF on this board
00C0 0000 CS2– External Flash Memory
32 bit port , parallel devices U13-U14 with 4M bytes at C0:0000-FF:FFFF on this board
or 16 bit port, U13 device with 2M bytes at C0:0000–DF:FFFF
0100 0000 CS3 – External Port Replacement Unit (PRU), LCD Port and Keypad
(see the PRU Memory section below for details)
0140 0000
FFFF FFFF Non Mapped Address Space

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Synchronous SRAM Memory
The synchronous SRAM Memory Bank is composed of four 256K x 32 memory devices. These memory devices are connected in
linear order from U2 to U5 so that the low order address of the memory bank will access U2 and the high order addresses of the
memory bank will access U5. This memory bank must be configured as a 32 bit wide port but is byte, half word, and word
accessible for read or write operations. The synchronous SRAM memory on revision C and earlier boards (CY1339) requires 1 wait
state no matter the bus clock frequency to operate in asynchronous mode and will provide 32-bit wide burstable output of 2/1/1
cycles type. Revision D boards provide 0 wait state SRAM memory (CY1338) and will operate a 1/1/1 burst cycle.
Burstable Flash Memory
The Burstable Flash Memory Banks U13 and U14 contain two Intel DT28F160F3 or AMD AM29BL162B type flash devices. The
two flash devices are configured in parallel to provide either a 16 bit wide port operating U13 or a 32 bit wide port operating both
U13 and U14. Both devices require wait states when accessed in asynchronous mode and the same wait state delay during the first
cycle of a burst type access. Refer to the specific device data sheet and sample software provided for configuring the flash memory.
Port Replacement Unit (PRU) Memory
The Port Replacement Unit (PRU) provides for single chip operation of the MPC5xx I/O ports used for address, data, and interrupts
during 32 bit bus operation. The PRU also provides memory mapping and control of the LCD and Keypad Ports. The PRU_EN
jumper must be installed (see PRU_EN section) and chip select configuration for the PRU must be set to 32 bits wide and should
provide external access termination (use TA* signal) for correct operation of all functions.
The I/O ports provided by the PRU do not duplicate signal levels or internal pull-up operation of the MPC5xx I/O ports. The PRU
I/O port output voltage levels are limited to +3.3V high while the MPC5xx I/O ports typically will provide voltage level of +5V high
(refer to MPC5xx technical data for host). PRU I/O port input voltage levels are tolerant of +5V signals. The PRU register
operation and memory map closely follows the MPC5xx I/O port data and direction registers located at internal addresses 2FC024 –
2FC02F. Following is the memory map of the PRU.
PRU Offset
Address Register Name Register Information Port
0x0000 LCD CMD1 LCD Module address 0, Command register access. Bits D0 – 7 of 32 LCD_PORT 1
0x0004 LCD DATA1 LCD Module address 1, Display Data register access. Bits D0 – 7 of 32. LCD_PORT 1
0x0008 LCD CMD2 LCD Module address 2, Command register access. Bits D0 – 7 of 32. LCD_PORT 1
0x000C LCD DATA2 LCD Module address 3, Display Data register access. Bits D0 – 7 of 32. LCD_PORT 1
0x0010 KEY DATA Keypad or Keyport data register KEY_PORT or
KEYPAD 2
0x0014 Reserved Not applied, access termination provided.
0x0018 Reserved Not applied, access termination provided.
0x001C Reserved Not applied, access termination provided.
0x0020 Reserved Not applied, access termination provided.
0x0024 PRU Port D D0-31 I/O port replacement SGPIODT1 3
0x0028 PRU Port A&C C0-7, A8-31 I/O port replacement SGPIODT2 3
0x002C PRU Port Direction Replacement Port Direction SGPIOCR 3
1. Refer to LCD Module data sheet for register information.
2. Key_Port or Keypad is read only and writes have no effect. Keypad data is provided in a binary number in bits D0 – D4 for
current or last key pressed while bit D7 indicates if the key is currently active (pressed).
3. Refer to MPC5xx users manual for register operation.
MEM Sockets Memory
The primary function of the MEM sockets memory bank is for CMD-5xx firmware. This memory bank is the default program code
source from Reset or Power on and can only be enabled to operate from chip select CS0. The two memory sockets U15A and U16
provide a 16 bit wide port (default) while memory socket U15B provides an optional 8 bit wide port. If the 8 bit wide port is used
the U16 socket should be vacant of any memory device for proper operation. The MEM sockets are configured for standard 8 bit
wide 27xxx series EPROM’s from 32K bytes up to 1M byte per socket. These devices require wait states during access for proper
operation.