Compulab Cl-som-am57 series User manual

CL-SOM-AM57x

Reference Guide

Legal

Revised April 2018 CL-SOM-AM57x 2

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reason of negligence) will be accepted by Compulab Ltd., its subsidiaries or employees for any

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Compulab Ltd. reserves the right to change details in this publication without notice.

Product and company names herein may be the trademarks of their respective owners.

Compulab Ltd.

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20692 ISRAEL

Tel: +972 (4) 8290100

http://www.compulab.com

Fax: +972 (4) 8325251

Table of Contents

Revised April 2018 CL-SOM-AM57x 3

Table of Contents

1INTRODUCTION..........................................................................................................6

1.1 About This Document..................................................................................................6

1.2 CL-SOM-AM57x Part Number Legend......................................................................6

1.3 Related Documents......................................................................................................6

2OVERVIEW ...................................................................................................................7

2.1 Highlights ....................................................................................................................7

2.2 Block Diagram.............................................................................................................8

2.3 CL-SOM-AM57x Features..........................................................................................9

3CORE SYSTEM COMPONENTS .............................................................................11

3.1 AM57x SoC...............................................................................................................11

3.1.3 Display Subsystem ...........................................................................................12

3.2 Memory......................................................................................................................14

3.2.1 DRAM..............................................................................................................14

3.2.2 Bootloader Storage ...........................................................................................14

3.2.3 General Purpose Storage ..................................................................................14

4PERIPHERAL INTERFACES...................................................................................15

4.1 Display Interface........................................................................................................17

4.1.1 Parallel Display interface..................................................................................17

4.1.2 HDMI Interface ................................................................................................18

4.1.3 LVDS Display interface ...................................................................................18

4.2 Parallel Camera Interface ..........................................................................................19

4.3 PCI Express ...............................................................................................................26

4.4 SATA.........................................................................................................................27

4.5 USB 3.0......................................................................................................................27

4.6 USB2.0 ports..............................................................................................................28

4.7 Ethernet......................................................................................................................29

4.8 Wireless Interfaces.....................................................................................................30

4.8.1 WLAN Only.....................................................................................................30

4.8.2 Dual Band WLAN & Bluetooth.......................................................................31

4.9 Analog Audio.............................................................................................................31

4.10 Digital Audio (McASP)........................................................................................33

4.11 MMC / SD /SDIO.................................................................................................34

4.12 UART....................................................................................................................35

4.13 SPI.........................................................................................................................38

4.14 I2C.........................................................................................................................39

4.15 CAN Bus...............................................................................................................39

4.16 Resistive Touch Interface......................................................................................40

4.17 HDQ / 1-Wire........................................................................................................40

4.18 Enhanced High Resolution PWM module (eHRPWM) .......................................41

4.19 Enhanced Capture module (eCAP).......................................................................41

Table of Contents

Revised April 2018 CL-SOM-AM57x 4

4.20 Quadrature Encoder Pulse module (eQEP)...........................................................42

4.21 PRU-ICSS.............................................................................................................42

4.21.1 PRU-ICSS MII .................................................................................................42

4.21.2 PRU-ICSS UART.............................................................................................43

4.21.3 PRU-ICSS Industrial Ethernet Peripheral ........................................................43

4.21.4 PRU-ICSS Enhanced Capture Event Module (PRU-ICSS eCAP)...................44

4.21.5 PRU-ICSS GPI / GPO......................................................................................44

4.22 General Purpose Timer .........................................................................................46

4.23 GPIO .....................................................................................................................47

5SYSTEM LOGIC .........................................................................................................50

5.1 Power Supply.............................................................................................................50

5.2 System and Miscellaneous Signals............................................................................50

5.2.1 Power Management..........................................................................................50

5.2.2 General Purpose clocks ....................................................................................50

5.2.3 Flash Write-protection......................................................................................51

5.3 Reset ..........................................................................................................................51

5.4 Boot Sequence ...........................................................................................................51

5.5 Signal Multiplexing Characteristics ..........................................................................53

5.6 RTC............................................................................................................................63

5.7 LED............................................................................................................................63

6CARRIER BOARD INTERFACE .............................................................................64

6.1 Connector Pinout .......................................................................................................64

6.2 Mechanical Drawings................................................................................................74

6.3 Heat Spreader and Cooling Solutions........................................................................75

6.4 Standoffs/Spacers ......................................................................................................75

7OPERATIONAL CHARACTERISTICS ..................................................................76

7.1 Absolute Maximum Ratings......................................................................................76

7.2 Recommended Operating Conditions........................................................................76

7.3 DC Electrical Characteristics.....................................................................................76

7.4 ESD Performance ......................................................................................................76

7.5 Operating Temperature Ranges.................................................................................77

8APPLICATION NOTES .............................................................................................78

8.1 Carrier Board Design Guidelines...............................................................................78

8.2 Carrier Board Troubleshooting..................................................................................78

8.3 Ethernet Magnetics Implementation..........................................................................79

8.3.1 Magnetics Selection..........................................................................................79

8.3.2 Magnetics Connection......................................................................................79

Revision Notes

Revised April 2018 CL-SOM-AM57x 5

Table 1 Revision Notes

Date

Description

Nov 2015

First release

Dec 2016

(4) Added full description of all available AM5718x SoC pins on main

CL-SOM-AM57x SO-DIMM connector.

(4.1.1) Added description for all availability options for Parallel

Display interface.

(5.5) Signal Multiplexing table: embedded excel files updated, one

general table for AM5728 and AM5718 SOC added to this doc.

Aug 2017

(4.8) Updated features list

Oct 2017

(4.1.3) Updated note details

Jan 2018

(4.5) Updated USB 3.0 Interface Signals table

(4.12) Updated availability limitation on SO-DIMM pins 147, 149,

151, and 157 in table 38 (UART9) and table 39 (UART10).

Mar 2018

(4.14) Updated I2C2 Interface Signals

(6.1) Updated I2C2 on SO-DIMM pin 25 and 31

Updated I2C2 on pins 25 and 31 in attached excel file

(4.12) Table 37 Updated UART8 on Pin# 11

(6.1) Table 68, pins 11 updated

Updated UART8 on pin 11 in attached excel file

Apr 2018

(4.8.2) Updated description of UART used for Bluetooth when

WL1837MOD is populated

(4.12) Table 39 updated Description and Availability

Please check for a newer revision of this manual at the CompuLab web site

http://www.compulab.com. Compare the revision notes of the updated manual from the web site

with those of the printed or electronic version you have.

Introduction

Revised April 2018 CL-SOM-AM57x 6

1 INTRODUCTION

1.1 About This Document

This document is part of a set of reference documents providing information necessary to operate

and program CompuLab CL-SOM-AM57x Computer-on-Module.

1.2 CL-SOM-AM57x Part Number Legend

Please refer to the CompuLab website ‘Ordering information’ section to decode the CL-SOM-

AM57x part number: http://www.compulab.com/products/computer-on-modules/cl-som-am57x-

ti-am5728-am5718-system-on-module/#ordering.

1.3 Related Documents

For additional information, refer to the documents listed in Table 2.

Table 2 Related Documents

Document

Location

CL-SOM-AM57x Developer Resources

http://www.compulab.com/

AM57x Reference Manual

AM57x Datasheet

http://www.ti.com

Overview

Revised April 2018 CL-SOM-AM57x 7

2 OVERVIEW

2.1 Highlights

Texas Instruments Sitara AM57x processors, 1.5GHz

Up to 4GB DDR3 and 32GB on-board eMMC

PowerVR SGX544 GPU, 1080p VPU and C66x DSP

Dual-band 802.11a/b/g/n WiFi and Bluetooth 4.1 BLE

2x PCIe, 2x GbE, SATA, USB3, 3x USB2, 9x UART, 87x GPIO

Miniature size: 60 x 68 x 5 mm

CL-SOM-AM57x is a miniature System-on-Module / Computer-on-Module designed as a

building block for integration into embedded applications. CL-SOM-AM57x is built around the

Texas Instruments Sitara AM57x ARM Cortex-A15 System-on-Chip family. The SoC is

supplemented with up-to 4GB DDR3 and 32GB of on-board eMMC storage.

Featuring an unprecedented set of dedicated graphics acceleration and video processing engines,

CL-SOM-AM57x delivers high-performance multimedia and image processing capabilities. Dual

C66x DSP cores and dedicated dual-core ARM Cortex-M4 IPUs make CL-SOM-AM57x a

powerful platform for image and video processing systems, while dual PowerVR SGX544 GPU

and IVA-HD video sub-system enable multimedia demanding applications.

Delivering a wide range of embedded interfaces and a PRU-ICSS coprocessor dedicated for real-

time processing and industrial protocols, CL-SOM-AM57x is an ideal selection for industrial

automation and control systems. Dual Gbit Ethernet, 2x2 MIMO dual-band 802.11a/b/g/n WiFi

and Bluetooth 4.1 make CL-SOM-AM57x an excellent solution for networking, communications

and IoT applications.

CL-SOM-AM57x is provided with comprehensive documentation and full ready-to-run SW

packages for the Linux operating system.

Overview

Revised April 2018 CL-SOM-AM57x 8

2.2 Block Diagram

Figure 1 CL-SOM-AM57x Block Diagram

IVA HD

1080p Video

DSP

2x C66x

2x ARM

Cortex A15

PRU-ICSS

IPU1

2x Cortex-M4

Integrated

Ethernet

switch

DDR3

Ctrl1

DDR3

Ctrl2

1x JTAG

SmartReflex

DDR3

Up to 2GB

DDR3

Up to 2GB

Test points

SPI Flash

(primary

bootloader

storage)

PMIC

TPS6590375

I2C EEPROM

(board info)

32 bit

JTAG

QSPI CS0

24/8bit Video

Input Port

16bit Video

Input Port

Parallel 24bit

display

2x Ethernet Ports

(1Gbps)

I2C

1-WIRE

SPI

UART

QSPI

McASP

CAN

GPIO

eCAP

eHRPWM

eQEP

PRU UART

PRU eCAP

PRU MII

PRU Industrial

Ethernet

EGPI

EGP0

Multifunctional signals (muxed)

204-pin SODIMM edge connector

up to 3x I2C bus

up to 1x HDQ 1-wire

up to 9x UART

up to 3x SPI

up to 3x eMMC/SD/SDIO

up to 4x I2S/McASP

up to 2x CAN bus

up to 87x GPIOs

up to 5x PWM (eHRPWM)

up to 8x Timer/PWM

up to 2x Capture Interface (eCAP)

up to 1x Quadrature Encoder

up to 2x PRU UART

up to 2x PRU eCAP

up to 1x PRU MII

up to 1x PRU Industrial Ethernet

up to 28x PRU EGPI

up to 32x PRU EGPO

up to 3x Video Input ports

GPMC

MMC2

UART10

MMC4

Optional bypass

(4 bit SDIO)

WLAN+BT

TI WiLink 8

Touch screen

contoller

LVDS 24 bit

Transmitter

USB 2.0

hub

Audio Codec

WM8731 Stereo

Stereo

Microphone

McASP3

1x HDMI

1x USB 3.0

1x USB 2.0

2x PCIe

resistive

touch

QSPI CS1

LCD3 24 bit LVDS

Parallel RGB 24bit

USB 3.0

HDMI 1.4a

USB 2.0 USB 2.0

USB 2.0

PCIe x1

SATA-II

1x SATA

I2C1

I2C4

Texas

Instruments

AM57x

eMMC/SD/SDIO

Optional bypass

1Gbit PHY

RGMII0

1Gbit PHY

RGMII1 1Gbit Eth

1Gbit Eth

RTC

SLC NAND

(512MB - 1GB)

eMMC

(4GB - 32GB)

Optional bypass

GPU

2x SGX544

IPU2

2x Cortex-M4

Overview

Revised April 2018 CL-SOM-AM57x 9

2.3 CL-SOM-AM57x Features

The "Option" column specifies the CoM/SoM configuration option required to have the particular

feature. When a CoM/SoM configuration option is prefixed by “NOT”, the particular feature is

only available when the option is not used. A feature is only available when a CoM/SoM

configuration complies with all options denoted in the “Option” column.

"+" means that the feature is always available.

Table 3 Features and Configuration options

Feature

Description

Option

CPU Core and Graphics

CPU

Texas Instruments Sitara AM5728 dual-core ARM Cortex-A15, 1.5GHz

NEON SIMD and VFPv4

C1500D

Texas Instruments Sitara AM5718 single-core ARM Cortex-A15, 1.5GHz.

NEON SIMD and VFPv4

C1500

DSP

Up to 2x TMS320C66x DSP cores

C1500x

GPU

Up to 2x PowerVR SGX544 3D GPU cores

C1500x

Vivante GC320 2D GPU

Video

IVA-HD video sub-system supporting 1080p HD decoding / encoding

Image

Processing

2x dual-core ARM Cortex-M4 IPU, 213MHz

Real-Time

Coprocessor

2x PRU-ICSS supporting EtherCAT, PROFIBUS, PROFINET,

EtherNet/IP and Powerlink protocols

Memory and Storage

RAM

512MB –4GB, DDR3-1333, single / dual channel 32-bit data bus

Storage

On-board SLC NAND flash, 512MB –1GB

On-board eMMC flash, 4GB - 32GB

Display and Camera

Display

Parallel RGB, 24-bit, up to 1920 x 1200

HDMI 1.4a, up to 1920 x 1200

LVDS, up to 1920 x 1080

Touchscreen

On-board 4-wire resistive touch-screen controller

Capacitive touch-screen support through SPI and I2C interfaces

Camera

Up to 3x parallel camera interfaces

Network

Gigabit Ethernet

Up to 2x 10/100/1000Mbps Ethernet ports (MAC+PHY)

E1/E2

WiFi

802.11b/g/n WiFi interface

TI WiLink 8 WL1801 chipset

Dual-band 2x2 802.11a/b/g/n WiFi interface

TI WiLink 8 WL1837 chipset

WAB

Bluetooth

Bluetooth 4.1 BLE

WAB

Audio

Analog Audio

Audio codec with stereo output, stereo input and microphone support

Digital Audio

Up to 4x I2S digital audio interfaces

HDMI audio output

I/O

PCI Express

2x PCIe x1 Gen. 2

SATA

SATA-II, 3Gbps

USB

1x USB3.0 dual-role + 1x USB2.0 host

1x USB3.0 dual-role + 3x USB2.0 host

Serial Ports (UARTs)

Up to 9x UART ports, 16C750 compatible, up to 12 Mbps

CAN bus

Up to 2x CAN bus

MMC/SD/SDIO

Up to 3x MMC/SD/SDIO interfaces

SPI

Up to 3x SPI bus interfaces

I2C

Up to 3x I2C interfaces

1-Wire

1-Wire interface

Timer/PWM

Up to 8x Timer/PWM outputs

GPIO

Up to 87x GPIO signals (shared with other functions)

System Logic

RTC

Real time clock, powered by external lithium battery

Overview

Revised April 2018 CL-SOM-AM57x 10

Table 4 Electrical, Mechanical and Environmental Specifications

Electrical Specifications

Supply Voltage

4.2V to 5V

Digital I/O voltage

3.3V

Active power consumption

2.5 –6.5 W, depending on board configuration and system workload

Mechanical Specifications

Dimensions

60 x 68 x 5 mm

Weight

35 gram

Connectors

204-pin SO-DIMM edge connector

Environmental and Reliability

MTTF

> 200,000 hours

Operation temperature (case)

Commercial: 0° to 70° C

Extended: -20° to 70° C

Industrial: -40° to 85° C

Storage temperature

-40° to 85° C

Relative humidity

10% to 90% (operation)

05% to 95% (storage)

Shock

50G / 20 ms

Vibration

20G / 0 - 600 Hz

Core system components

Revised April 2018 CL-SOM-AM57x 11

3 CORE SYSTEM COMPONENTS

3.1 AM57x SoC

The TI Sitara AM57x system-on-chip (SoC) is built around dual-core ARM Cortex-A15 CPU. Dual

C66x VLIW DSP cores and dedicated ARM Cortex-M4 IPUs make AM572x a powerful platform for

image and video processing systems, while dual PowerVR SGX544 GPU and IVA-HD video sub-

system enable multimedia demanding applications.

Up to 1500-MHz Sitara™ ARM® Single/Dual Cortex®-A15 32-Bit RISC processor

NEON™ SIMD Coprocessor and Vector Floating Point (VFPv4) per CPU

32-KiB instruction and 32-KiB data level 1 (L1) cache per CPU

Shared 1-MiB/2-MiB level 2 (L2) cache

On-Chip 512KiB/2.5MiB Shared Memory (RAM)

48-KiB bootable ROM

Up to 2 C66x™ Floating-Point VLIW DSP

Image and video accelerator high-definition (IVA-HD) subsystem

Two ARM® Dual Cortex®-M4 Image Processing Units (IPUs)

Single/Dual-Core PowerVR® SGX544™ 3D GPU

2D-Graphics Accelerator (BB2D) Subsystem, including Vivante™ GC320 Core

Crypto Hardware Accelerators (AES, SHA, RNG, DES and 3DES)

Two dual-core Programmable Real-time Unit and Industrial Communication Subsystems

(PRUICSS)

Figure 2 AM572x Block Diagram

Core system components

Revised April 2018 CL-SOM-AM57x 12

3.1.1 DSP Subsystem

The AM57x SoC includes up to two identical instances (DSP1 and DSP2) of a digital signal

processor (DSP), based on the TI's standard TMS320C66x™ DSP CorePac core.

Each of the two DSP subsystems integrated in the device includes the following components:

A TMS320C66x™ CorePac DSP core

Dedicated enhanced data memory access engine –EDMA

A level 2 (L2) interconnect network (DSP NoC)

Two memory management units (on EDMA L2 interconnect and DSP MDMA paths)

Dedicated system control logic (DSP_SYSTEM)

3.1.2 Dual Cortex-M4 IPU Subsystem

The AM57x SoC instantiates two dual Cortex™-M4 image processor unit (IPU) subsystems:

IPU1 subsystem is available for general purpose usage

IPU2 subsystem is dedicated to IVA support and is not available for other processing

Each IPU subsystem integrates the following:

Two ARM Cortex-M4 microprocessors

ARMv7-M and Thumb®-2 instruction set architecture (ISA)

ARMv6 SIMD and digital signal processor (DSP) extensions

Single-cycle MAC

Integrated nested vector interrupt controller (NVIC)

Integrated bus matrix

Unicache interface

Level 2 (L2) master interface (MIF) splitter

On-chip ROM and banked RAM memory

3.1.3 Display Subsystem

The AM57x display subsystem provides the control signals required to interface the device system

memory frame buffer (SDRAM) directly to the displays. It supports hardware cursor, independent

gamma curve on all interfaces, multiple-buffer, and programmable color phase rotation.

3.1.4 3D Graphics Accelerator

The AM57x 3D graphics processing unit (GPU) accelerates 2-dimensional (2D) and 3-dimensional

(3D) graphics and compute applications. It is based on the POWERVR® SGX544 core from

Imagination Technologies which includes the following key features:

2D and 3D graphics

API support for industry standards: OpenGL® - ES 1.1 and 2.0

Multicore GPU architecture (with SGX544-MP2 core)

Tile-based deferred rendering architecture

Universal Scalable Shader Engine (USSE™)

Present and texture load accelerator (PTLA)

Core system components

Revised April 2018 CL-SOM-AM57x 13

3.1.5 2D Graphics Accelerator

The 2D graphics accelerator subsystem accelerates 2D graphics applications. The 2D graphics

accelerator subsystem is based on the GC320 2D GPU core from Vivante Corporation. The hardware

acceleration is brought to numerous 2D applications, including on-screen display and touch screen

user interfaces, graphical user interfaces (GUIs) and menu displays, flash animation, and gaming. The

GC320 2D Main Features include the following:

API support:

OpenWF™, DirectFB

GDI/DirectDraw™

BB2D architecture

Hardware acceleration for DirectFB

3.1.6 PRU-ICSS

There are two Programmable Real-time Unit and Industrial Communication Subsystems (PRU-ICSS)

in the device. The PRU-ICSS enables additional peripheral interfaces and real-time protocols such as

EtherCAT, PROFINET, EtherNet/IP, PROFIBUS, Ethernet Powerlink, Sercos and others.

Each PRU-ICSS consists of dual 32-bit RISC cores (Programmable Real-Time Units, or PRUs),

shared data and instruction memories, internal peripheral modules, and an interrupt controller

(INTC). The programmable nature of the PRU cores, along with their access to pins, events and all

device resources, provides flexibility in implementing fast real-time responses, specialized data

handling operations, custom peripheral interfaces, and in offloading tasks from the other processor

cores of the device. The PRU-ICSS Key Features are:

Supports Protocols such as EtherCAT, PROFINET, EtherNet/IP, PROFIBUS, Ethernet

Powerlink, Sercos and more

Two Programmable Real-Time Units (PRUs) Subsystems With Two PRU Cores Each

Each Core is a 32-bit load/store RISC CPU core

12-KiB program RAM per PRU CPU

8-KiB data RAM per PRU CPU

Enhanced General-Purpose Inputs (EGPI) and Enhanced General-Purpose

Outputs (EGPO)

32-KiB general purpose memory RAM (signified RAM2) shared between PRU0 and PRU1

Peripherals Inside the PRU-ICSS:

One Ethernet MII_RT module

One MDIO Port

Industrial Ethernet Peripheral (IEP)

16550-compatible UART with a dedicated 192-MHz clock to support

12-Mbps PROFIBUS

Industrial Ethernet timer with 7/9 capture and 8 compare events

Enhanced Capture Module (ECAP)

Interrupt Controller

Core system components

Revised April 2018 CL-SOM-AM57x 14

3.2 Memory

3.2.1 DRAM

AM5728 includes two 32-bit DDR controllers (EMIF1 and EMIF2). AM5718 includes one 32-bit

DDR controller (EMIF1).

CL-SOM-AM57x is equipped with up to 4GB of onboard DDR3 memory. The DDR3 data bus is 32-

bits wide and operates at 533 MHz clock frequency (DDR3-1066).

NOTE: 2GB and 4GB DDR3 memory capacities are available with C1500D option only.

3.2.2 Bootloader Storage

CL-SOM-AM57x is assembled with 2MBytes of SPI NOR flash. The SPI NOR flash is used for

boot-loader and configuration blocks storage.

3.2.3 General Purpose Storage

CL-SOM-AM57x is available with optional on-board storage designed to store the operating system

and user data. One of the following storage devices can be used as the main on-board storage:

eMMC flash (up to 32GB).

SLC NAND Flash (up to 1GB).

NOTE: SLC NAND and eMMC are mutually exclusive configuration options.

Peripheral Interfaces

Revised April 2018 CL-SOM-AM57x 15

4 PERIPHERAL INTERFACES

CL-SOM-AM57x implements a variety of peripheral interfaces through the SODIMM-204 carrier

board connector. The following notes apply to interfaces available through the SODIMM-204

interface:

Some interfaces/signals are available only with/without certain configuration options of

CL-SOM-AM57x. The availability restrictions of each signal are described in the “Signals

description” table for each interface.

Many of the CL-SOM-AM57x carrier board interface pins are multifunctional. Up-to 16

functions (ALT modes) are accessible through each multifunctional pin. Multifunctional

pins are denoted with an asterisk (*). For additional details, please refer to chapter 5.5 of

this document.

Only one multifunctional pin can be used for each function, configuring several

multifunctional pins to implement the same function will result in unexpected system

behavior.

All of the CL-SOM-AM57x digital interfaces operate at 3.3V voltage levels, unless

otherwise noted.

The signals for each interface are described in the “Signal description” table for the interface in

question. The following notes provide information on the “Signal description” tables:

“Signal name” –The name of each signal with regards to the discussed interface. The

signal name corresponds to the relevant function in cases where the carrier board pin in

question is multifunctional.

“Pin#” – The carrier board interface pin number where the discussed signal is available,

multifunctional pins are denoted with an asterisk.

“Type” – Signal type, see the definition of different signal types below

“Description” – Signal description with regards to the interface in question.

“Availability” – Depending on CL-SOM-AM57x Configuration options, certain carrier

board interface pins are physically disconnected (floating) from the carrier board interface

connector on-board CL-SOM-AM57x. The “Availability” column summarizes

configuration requirements for each signal. All the listed requirements must be met (logical

AND) for a signal to be “available” unless otherwise noted.

Each described signal can be one of the following types. Signal type is noted in the “Signal

description” tables. Multifunctional pin direction, pull resistor and open drain functionality is

software controlled. The “Type” column header for multifunctional pins refers to the

recommended pin configuration with regards to the discussed signal.

“AI” –Analog Signal Input

“AO” –Analog Signal Output

“AIO” –Analog Signal Input/Output

“APO” –Analog Power Output

“API” –Analog Power Input

“I” –Digital Input

"O" –Digital Output

“IO” –Digital Input/Output

“IOD” –Open Drain Signal (not pulled up on-board CL-SOM-AM57x unless otherwise

noted).

"DS" –Differential Signaling

“PWR” –Power

“SPU” – Software controlled pull up to 3.3V

“SPD” – Software controlled pull down to GND

Peripheral Interfaces

Revised April 2018 CL-SOM-AM57x 16

"PU18" –Always pulled up to 1.8V on-board CL-SOM-AM57x, (typ. 5KΩ-15KΩ).

"PU33" –Always pulled up to 3.3V on-board CL-SOM-AM57x, (typ. 5KΩ-15KΩ).

"PUSUPPLY" –Always pulled up to 3.8V - 5.25V on-board CL-SOM-AM57x, (typ.

5KΩ-15KΩ).

"PD" - Always pulled down on-board CL-SOM-AM57x, (typ. 5KΩ-15KΩ).

Peripheral Interfaces

Revised April 2018 CL-SOM-AM57x 17

4.1 Display Interface

CL-SOM-AM57x display interface is derived from the AM57x display subsystem. The display

subsystem key features are:

Support of hardware cursor, independent gamma curve on all interfaces, multiple-buffer,

and programmable color phase rotation

Display controller:

Three video pipelines, one graphic pipeline, and one write-back pipeline

Three LCD outputs, each one with dedicated overlay manager, for support of

active matrix color displays (up to 24-bit interface)

One TV output with dedicated overlay manager to support HDMI v1.4a interface

(1080p @ 60 fps video and multichannel audio)

For additional details on display subsystem, please refer to the Sitara AM57x technical reference

manual.

4.1.1 Parallel Display interface

CL-SOM-AM57x display interface is derived from the AM57x display subsystem. The display

subsystem key features are:

Support of hardware cursor, independent gamma curve on all interfaces, multiple-buffer,

and programmable color phase rotation

Display controller:

Three video pipelines, one graphic pipeline, and one write-back pipeline

Three LCD outputs, each one with dedicated overlay manager, for support of

active matrix color displays (up to 24-bit interface)

One TV output with dedicated overlay manager to support HDMI v1.4a interface

(1080p @ 60 fps video and multichannel audio)

CL-SOM-AM57x provides access to the main LCD output (DPI1), referred in Sitara AM57x

technical reference manual as "VOUT1". The main features of VOUT1 interface are:

24-bit parallel CMOS output interface (DPI) (MIPI DPI 2.0, BT-656, or BT-1120)

Supporting up to WUXGA (1920 x 1200) with reduced blanking periods.

For additional details on display subsystem, please refer to the Sitara AM57x technical reference

manual. The table below summarizes the Parallel display interface signals

Table 5 Parallel display Interface Signals

Signal Name

Type

Description

Availability

VOUT1_CLK

98*

Video Output 1 Clock output

Always

VOUT1_D0

106*

Video Output 1 Data output

Always

VOUT1_D1

108*

Video Output 1 Data output

Always

VOUT1_D10

128*

Video Output 1 Data output

Always

VOUT1_D11

130*

Video Output 1 Data output

Always

VOUT1_D12

134*

Video Output 1 Data output

Always

VOUT1_D13

136*

Video Output 1 Data output

Always

VOUT1_D14

138*

Video Output 1 Data output

Always

VOUT1_D15

140*

Video Output 1 Data output

Always

VOUT1_D16

94*

Video Output 1 Data output

Always

VOUT1_D17

92*

Video Output 1 Data output

Always

VOUT1_D18

142*

Video Output 1 Data output

Always

VOUT1_D19

144*

Video Output 1 Data output

Always

VOUT1_D2

110*

Video Output 1 Data output

Always

VOUT1_D20

146*

Video Output 1 Data output

Always

VOUT1_D21

148*

Video Output 1 Data output

Always

VOUT1_D22

74*

Video Output 1 Data output

Always

VOUT1_D23

76*

Video Output 1 Data output

Always

VOUT1_D3

112*

Video Output 1 Data output

Always

Peripheral Interfaces

Revised April 2018 CL-SOM-AM57x 18

Signal Name

Type

Description

Availability

VOUT1_D4

116*

Video Output 1 Data output

Always

VOUT1_D5

118*

Video Output 1 Data output

Always

VOUT1_D6

120*

Video Output 1 Data output

Always

VOUT1_D7

122*

Video Output 1 Data output

Always

VOUT1_D8

124*

Video Output 1 Data output

Always

VOUT1_D9

126*

Video Output 1 Data output

Always

VOUT1_DE

104*

Video Output 1 Data Enable output

Always

VOUT1_FLD

161*

Video Output 1 Field ID output. This signal is not used

for embedded sync modes.

Always

VOUT1_HSYNC

100*

Video Output 1 Horizontal Sync output.This signal is

not used for embedded sync modes.

Always

VOUT1_VSYNC

102*

Video Output 1 Vertical Sync output.This signal is not

used for embedded sync modes.

Always

NOTE: Pins denoted with "*" are multifunctional. For additional details please refer to

chapter 5.5 of this document

4.1.2 HDMI Interface

CL-SOM-AM57x HDMI interface is derived from the Sitara AM57x HDMI module. The HDMI

module converts the RGB video into standard high-definition digital video format. The HDMI

module provides the following key features:

HDMI 1.4a (1080p @ 60 fps video and multichannel audio)

HDMI 1.4a and DVI 1.0 compliant

36-bit RGB color

HDCP 1.4 key protection

Deep color mode support (10-bit/12-bit for 148.5-MHz pixel clock)

Please refer to the AM57x Reference manual for additional details. The table below summarizes

the HDMI interface signals

Table 6 HDMI Interface Signals

Signal Name

Type

Description

Availability

HDMI1_CEC

34*

IOD

HDMI consumer electronic control

Always

HDMI1_CEC

IOD

HDMI consumer electronic control

With "C1500"

HDMI1_CLOCKX

ODS

HDMI clock differential positive or negative

Always

HDMI1_CLOCKY

ODS

HDMI clock differential positive or negative

Always

HDMI1_DATA0X

ODS

HDMI data 0 differential positive or negative

Always

HDMI1_DATA0Y

ODS

HDMI data 0 differential positive or negative

Always

HDMI1_DATA1X

ODS

HDMI data 1 differential positive or negative

Always

HDMI1_DATA1Y

ODS

HDMI data 1 differential positive or negative

Always

HDMI1_DATA2X

ODS

HDMI data 2 differential positive or negative

Always

HDMI1_DATA2Y

ODS

HDMI data 2 differential positive or negative

Always

HDMI1_DDC_SCL

25*

IOD

HDMI display data channel clock

Always

HDMI1_DDC_SDA

31*

IOD

HDMI display data channel data

Always

HDMI1_HPD

40*

HDMI display hot plug detect

Always

HDMI1_HPD

HDMI display hot plug detect

With "C1500"

NOTE: Pins denoted with "*" are multifunctional. For additional details please refer to

chapter 5.5 of this document

4.1.3 LVDS Display interface

LVDS interface is derived from an on-board SN75LVDS83B FlatLink™ transmitter. The

transmitter is interfaced with the AM57x Parallel RGB interface "vout3". The LVDS transmitter

supports the following key features:

Peripheral Interfaces

Revised April 2018 CL-SOM-AM57x 19

Transfer rate up to 135 Mpps, pixel clock frequency range 10 MHz to135 MHz

Suited for display resolutions ranging from HVGA up to HD with low EMI

Operates From a Single 3.3-V Supply

NOTE: CL-SOM-AM57x LVDS display interface is available only with the ‘L’ and

'C1500D' ordering option.

For additional details on the LVDS Transmitter, please refer to the TI SN75LVDS83B datasheet.

The table below summarizes the LVDS interface signals

Table 7 LVDS Interface Signals

Signal Name

Type

Description

Availability

LVDS_CLKN

ODS

Differential LVDS pixel clock output, high-

impedance when device in SHTDN

With "C1500D"

AND "L"

LVDS_CLKP

ODS

Differential LVDS pixel clock output, high-

impedance when device in SHTDN

With "C1500D"

AND "L"

LVDS_N0

ODS

Differential LVDS data output, high-impedance

when device in SHTDN

With "C1500D"

AND "L"

LVDS_N1

ODS

Differential LVDS data output, high-impedance

when device in SHTDN

With "C1500D"

AND "L"

LVDS_N2

ODS

Differential LVDS data output, high-impedance

when device in SHTDN

With "C1500D"

AND "L"

LVDS_N3

ODS

Differential LVDS data output, high-impedance

when device in SHTDN

With "C1500D"

AND "L"

LVDS_P0

ODS

Differential LVDS data output, high-impedance

when device in SHTDN

With "C1500D"

AND "L"

LVDS_P1

ODS

Differential LVDS data output, high-impedance

when device in SHTDN

With "C1500D"

AND "L"

LVDS_P2

ODS

Differential LVDS data output, high-impedance

when device in SHTDN

With "C1500D"

AND "L"

LVDS_P3

ODS

Differential LVDS data output, high-impedance

when device in SHTDN

With "C1500D"

AND "L"

4.2 Parallel Camera Interface

The camera interface available with CL-SOM-AM57x is based on the AM57x integrated Video

Input Port (VIP) modules.

NOTE: All of the Camera interface pins on CL-SOM-AM57x are multifunctional. For

additional details please refer to chapter 5.5 of this document.

With C1500D option (AM5728) there are 3 instantiations of the VIP (VIP1, VIP2, and VIP3) for

connection to CCD cameras or BT656 compliant video encoders. On CL-SOM-AM57x based on

"C1500D" the following main features are supported:

VIP1 module with support of:

One 8-bit video port for parallel RGB/YUV/RAW data, up to 165 MHz

VIP2 module with support of:

One 24-bit video port for parallel RGB/YUV/RAW data, up to 165 MHz

One 8-bit (out of 24) video port for parallel RGB/YUV/RAW data, up to 165

MHz

VIP3 module with support of:

One 16-bit video port for parallel RGB/YUV/RAW data, up to 165 MHz

With C1500 option (AM5718) there is one instantiations of the VIP (VIP1) for connection to

CCD cameras or BT656 compliant video encoders. On CL-SOM-AM57x based on "C1500" the

following main features are supported:

Peripheral Interfaces

Revised April 2018 CL-SOM-AM57x 20

One separate 24-bit video ports for parallel RGB/YUV/RAW data, up to 165 MHz

One separate 8-bit video ports for YUV/RAW data, up to 165 MHz

For additional details on VIP modules, please refer to the AM572x or AM571x technical

reference manual. The tables below summarize the Parallel camera interface signals

Table 8 Parallel camera VIN1A Interface Signals

Signal Name

Type

Description

Availability

VIN1A_CLK0

49*

Video Input 1 Port A Clock input

With "C1500"

VIN1A_CLK0

161*

Video Input 1 Port A Clock input

With "C1500"

VIN1A_CLK0

193*

Video Input 1 Port A Clock input

With "C1500" AND Without

"A"

VIN1A_CLK0

95*

Video Input 1 Port A Clock input

With "C1500"

VIN1A_CLK0

161*

Video Input 1 Port A Clock input

With "C1500"

VIN1A_CLK0

154

Video Input 1 Port A Clock input

With "C1500"

VIN1A_D0

94*