Daewoo DSI-9100 User manual

S/M No. :
✔ Caution :
In this Manual, some parts can be changed for improving, their
performance without notice in the parts list. So, if you need the
latest parts information,please refer to PPL(Parts Price List) in
Service Information Center (http://svc.dwe.co.kr).
DAEWOO ELECTRONICS Corp.
July. 2004
http : //svc.dwe.co.kr
Service Manual
Digital Satellite Receiver &
VCR COMBO
MODEL : DSI-9100/DSI-9200
DSI-9300/DSI-9400
EJECT
INPUTMUTE
TV / VCR
1
4
7
2
5
8
0
3
6
9
UHF
MENU
VOL VOL
CH/TRK+
CH/TRK-
EXIT
REW
REC
SAT
AUDIO
INDEX
EPG
FREEZE
SLOW +
INFO
TV/RADIO
RECALL
30
STOP
FF
SP/LP
PLAY/PAUSE
Pg UP
Pg DOWN
TEXT
+
+
O
K
/
C
H
L
I
S
T

SPECIFICATION...........................................................................................................2
ADVANTAGES OF THIS PRODUCT........................................................................................3
SCHEMATIC DIAGRAM ...........................................................................................................4
CIRCUIT INFORMATION........................................................................................................14
TROUBLE SHOOTING...........................................................................................................38
PCB CIRCUIT BOARD ...........................................................................................................58
INSTRUMENT DISASSEMBLY ..............................................................................................60
ELECTRICAL PARTSLIST.....................................................................................................64
1
CONTENTS

2
SPECIFICATION
TRANSMISSION STANDARDS
LNB/TUNER INPUT
SYSTEM RESOURCES
VIDEO DECODER
AUDIO DECODER
POWER SUPPLY
REAR PANEL INTERFACES
REMOCON TRANSMITTER
DVB, MPEG2
Connector IEC 169-24, Female-type
Input Frequency 950 ~ 2150MHz
Demodulation 2 Msps ~ 35Msps
Code rate QPSK
Max Current 500mA
Supply Voltage 13V/18V
DiSEqC 1.0, 1.2, USALS
Processor 32bit, 81 MHz
RAM / ROM 8 MB / 2 MB
Video Standard ISO/IEC 13818-2(MPEG-2)
Profile & Level Main Profile@Main Level
Resolution 720 x 576 pixels for PAL
Aspect ratio 4:3
Audio format MPEG Layer I and II
Channel Mode Stereo, Mono Mode
Audio Signal Sample Rate 32, 44.1, 48 Ksps
Audio Signal bandwidth 15Hz ~ 20KHz
Bit Resolution 24 bits PCM for the audio sample
Type SMPS
Voltage & Frequency 110–240V~, 50/60Hz
Power Consumption 23W
Video/Audio Output RCA
Video Input RCA
Optional Video Input/Output : RF modulator
Audio Output : RF modulator & S/PDIF
Data In/Out Serial Jack (RS232)
Satellite in IEC 169-24, Female, F-Type
Type R-40D(AAA)
Operating Distance Straight : 8m, Pointing Angle (30°) : 7m
Operating Life Time 200,000 Times Operating Without Load
Batteries 2 x 1.5V AAA

3
ADVANTAGE OF THIS PRODUCT
Digital Satellite Receiver VCR is easy to use, and allows you to watch and record digital programs
broadcasted via satellite. This instruction manual will guide you through the initial installation of your receiver.
It also describes how to take full advantage of a wide range of features that are easily accessible.
Read this instruction manual carefully before installing your receiver VCR.
MAIN FEATURES
• High quality Digital Video & Audio
• Fully DVB compliant
• Common Interface with 2 PCMCIA slots
• User friendly and easy-to use menu system
• Various channel editing function, on Channel Management. (favorite, move, lock, rename, delete and sort)
• User programmable Satellite & Transponder information
• Automatic search for newly added transponder (NIT search)
• Stores up to 4000 channels
• Programmable Timer Recording :8 Events/1Month
• VISS (INDEX Search)
• LED Array Display
• OTR (Max. 10hrs/by 30min)
• Easy EPG recording
• Support software upgrading through RS-232C port
• Plug-and-play data transfer system (DSR to DSR)
• Individual channel volume saving function
• Timer function
• Automatic reserved channel moving system
• Electronic Program Guide (EPG)
• Teletext function support
• SCPC/MCPC receivable from C/Ku Band
• Multi LNB control by DiSEqC 1.0 and 22 KHz switching
• Motorized system control by DiSEqC 1.2* and USALS**.
• 256 color On-Screen-Display
• Support S/PDIF output (Optional function)
• satcoDX COMPATIBLE for auto program updating
* DiSEqC TM is a trademark of EUTELSAT.
** USALS TM is a trademark of Stab.

4
SCHEMATIC DIAGRAM

5
SCHEMATIC DIAGRAM

6
SCHEMATIC DIAGRAM

7
SCHEMATIC DIAGRAM

8
SCHEMATIC DIAGRAM
MPEG-STI5518

9
SCHEMATIC DIAGRAM
MPEG-CIMAX

10
SCHEMATIC DIAGRAM
MPEG-MEMORY/27M

11
SCHEMATIC DIAGRAM
MPEG-VIDEO

12
SCHEMATIC DIAGRAM
MPEG-AUDIO

13
SCHEMATIC DIAGRAM
MPEG-POWER/RS-232/VCR-CON

1. Block Diagram
14
CIRCUIT INFORMATION-MPEG

15
CIRCUIT INFORMATION-MPEG
2. Interface
(1) Remote controller Interface
"POWER"
CUSTOM CODE:E8H
DATA CODE :15H
• KEY FUNCTION TABEL
KEY NO KEY DATA KEY NAME CUSTOM CODE(H) DATA CODE(H) CUSTOM CODE(B) DATA CODE(B)
K01 00H 0 E8 H 00H 0001 0111 0000 0000
K02 01H 1 E8 H 01H 0001 0111 1000 0000
K03 02H 2 E8 H 02H 0001 0111 0100 0000
K04 03H 3 E8 H 03H 0001 0111 1100 0000
K05 04H 4 E8 H 04H 0001 0111 0010 0000
K06 05H 5 E8 H 05H 0001 0111 1010 0000
K07 06H 6 E8 H 06H 0001 0111 0110 0000
K08 07H 7 E8 H 07H 0001 0111 1110 0000
K09 08H 8 E8 H 08H 0001 0111 0001 0000
K10 09H 9 E8 H 09H 0001 0111 1001 0000
K11 0AH UHF E8 H 0AH 0001 0111 0101 0000
K12 0BH MENU E8 H 0BH 0001 0111 1101 0000
K13 0CH AV E8 H 0CH 0001 0111 0011 0000
K14 0DH STOP E8 H 0DH 0001 0111 1011 0000
K15 0EH PLAY/PAUSE E8 H 0EH 0001 0111 0111 0000
K16 0FH FF E8 H 0FH 0001 0111 1111 0000
K17 10H REW E8 H 10H 0001 0111 0000 1000
K18 11H TEXT E8 H 11H 0001 0111 1000 1000
K19 12H REC E8 H 12H 0001 0111 0100 1000
K20 13H RED E8 H 13H 0001 0111 1100 1000
K21 14H GREEN E8 H 14H 0001 0111 0010 1000

16
CIRCUIT INFORMATION-MPEG
KEY NO KEY DATA KEY NAME CUSTOM CODE(H) DATA CODE(H) CUSTOM CODE(B) DATA CODE(B)
K22 15H POWER E8 H 15H 0001 0111 1010 1000
K23 16H TV/VCR E8 H 16H 0001 0111 0110 1000
K24 17H CH+/UP E8 H 17H 0001 0111 1110 1000
K25 18H CH-/DOWN E8 H 18H 0001 0111 0001 1000
K26 19H RIGHT E8 H 19H 0001 0111 1001 1000
K27 1AH LEFT E8 H 1AH 0001 0111 0101 1000
K28 1BH SP/LP E8 H 1BH 0001 0111 1101 1000
K29 1CH EXIT E8 H 1CH 0001 0111 0011 1000
K30 1DH INFO E8 H 1DH 0001 0111 1011 1000
K31 1EH EJECT E8 H 1EH 0001 0111 0111 1000
K32 1FH DISPLAY E8 H 1FH 0001 0111 1111 1000
K33 20H SAT E8 H 20H 0001 0111 0000 0100
K35 22H FREEZE E8 H 22H 0001 0111 0100 0100
K36 23H OK E8 H 23H 0001 0111 1100 0100
K44 2BH CM-SKIP E8 H 2BH 0001 0111 1101 0100
K45 2CH EPG E8 H 2CH 0001 0111 0011 0100
K47 2EH H.RESET E8 H 2EH 0001 0111 0111 0100
K52 33H INDEX + E8 H 33H 0001 0111 1100 1100
K54 35H SLOW E8 H 35H 0001 0111 1010 1100
K56 37H AUDIO E8 H 37H 0001 0111 1110 1100
K57 38H TV/RADIO E8 H 38H 0001 0111 0001 1100
K58 39H MUTE E8 H 39H 0001 0111 1001 1100
K59 3AH YELLOW E8 H 3AH 0001 0111 0101 1100
K60 3BH BLUE E8 H 3BH 0001 0111 1101 1100
K63 3EH RECALL E8 H 3EH 0001 0111 0111 1100
K64 3FH INDEX - E8 H 3FH 0001 0111 1111 1100

17
CIRCUIT INFORMATION-MPEG
(1) Structure
STi5518 is a 1 chip including 32bit RISC CPU, A/V Demux, Video Encoder, Multi PIO and Cache RAM for the use o
DVB and DSS Set Top.
Followings are summary of distinctive features of each Block.
Enhanced capability with 32bit VL-RISC CPU Core of 81MHZ clock.
Supporting Bandwidth of 200MB/S using internal 2KB SRAM buffer and 2KB DCACHE.
Video Decoder is attached inside supported by MPEG-2 MP@ML and Letter Box.
MPEG Layer1 and 2 Audio Decoder are stored inside.
Providing interface external AC3 Decoder.
Supporting 2 - 8bit/pixel OSD.
Internally stored Video Encoder for the output of RGB, CVBS and Y/C Video
Enhanced CPU and Decoder capability boosted by 64Mbit SDRAM.
Backing External Surrounding Interface Memories. ( 4 Banks )
Able to use Hardware DMUX, input Serial and to support 32Pid.
Boosting 8 Level INT.
Supporting DMA and other multi PID.
2MPEG
DMAs
Serial
IEEE1394
Hardware
transport
strearn
demux
2Kbytes
Instruction
cache
2KData
cacheand
2KSRAM
OS-Link
2UART
1I 2C
PIO
3PWM
Diagnostic
controller
and
systems
services
SDAV
interface
Blockmove
DMA
ST20
CPU
Interrupt
controller
EMI
2
SmartCard
interfaces
(ASC)
MPEG
audio
decoder
AC-3I/F
MPEG
video
decoder
PAL/NTSC
Encoder
Teletest
interface
Feature 5. Sti5518 Block Diagram
3. Peripheral device of STi5518
Block move
DMA
2 MPEG
DMAs
Serial IEEE 1394
SDAV
interface
Hardward
transport
strearn demux
2 Kbytes
Instruction
cache
2K Data
cache and
2K SRAM
OS-Link
2 UART
PIO
3 PWM
Diagnostic
controller and
systems services
ST20
CPU
Interrupt
controller
EMI
2 SmartCard
interfaces(ASC)
MPEG audio
decoder AC-3 I/F
MPEG
Video
decoder
PAL/NTSC
Encoder
Teletest
interface
Sit5518 Block Diagram

18
CIRCUIT INFORMATION-MPEG
(2) Reset Section.
If the Low signal is read by Sti5518 Reset Pin, the Register value of all Sti5518 will be initialized.
There must be at least of 8 clock (37nsec) of Reset Time.
(3) Clock Section.
STI5518 has two PLL inside. Operative clocks are made by external clock with one unit of 27MHz. The two PLL are as
of ST20 PLL and MPEG PLL.
ST20 PLL produces 81MHz of system clock that is to be used in processor and peripheral equipment.
MPEG PLL produces audio decoder system clock, audio PCM clock, TS Demultiplexer and memory clock of SDRAM.
27MHz clock uses CRYSTAL. Currency control is enabled by PWM OF Sti5518
PWM with the reference of the PCR
value of MPEG to set the exact initiative of MPEG. If this value is not appropriate the colors are not be seen on the
screen, or the screen will display broken features.
(4) PIO Structure.
Sti5518 supports PIO that back up 5 number of Ports (8bit) as of PIO0, PIO1, PIO2, PIO3 and PIO4. Some ports are
able to endow extra functions to PIO for flexible expansion in usage. Following chart shows Alternative Function Pin of
PIO.
PIO port 0
ASC0TxD or
Sc1DataOut
ASC0RxD or
Sc1DataIn
Not connected
Sc1Clk
(Sc1RST)
(Sc1CmdVcc)
ASC0Dir
(Sc1Detect)
PIO port 1
SSC0 MTSR
SSC0 MRST
SSC0 SCIK
CaptureIn1
CaptureIn2
ASC1TxD
ASC1RxD
ASC3TxD
PIO port 2
ASC2TxD
or Sc0DataOut
ASC2RxD
or Sc0DataIn
Not connected
Sc0Clk
CompareOut0
(Sc0RST)
(Sc0CmdVcc)
Not connected
CaptureIn0
(Sc0Detect)
PIO port 3
TriggerIn
TriggerOut
PIO port 4
CompareOut1
(IROut)
CaptureIn3
ASC3RxD
not_Rst
tRSTLRSTH
Min 8x37nsec
Reset Timing
Chart 2. PIO Alternate Functions.
Alternative function of PIO pins
Port bit
0
1
2
3
4
5
6
7

19
CIRCUIT INFORMATION-MPEG
This section only provides summaries of individual function of each Port.
Further discussion will be followed in individual port section.
I
2C_DATA (PIO1_0)
I
2C_CLK (PIO1_2)
Used for the transmission of Serial and control of Tuner, CI-Max, AV Switch and RF Modulator.
ClkPolarity ClkPhase
01
Serial clock SCIK
Plns MTSR/MRST
First
bit Last
bit
Shift data
Latch data
Transmit data
Feature 7. I
2
C Timing
Chart 3. PIO Map
PIO NAME I/O Function Remarks
PIO1_0 I2C_Data(SSC0) I/O
PIO1_2 I2C_Clk O
PIO1_3 NOTPGM_EN O L:Flash program enable
PIO1_4 SLOW_S/W I H:VCR Scart Input ON
L: VCR Scart Input OFF
PIO1_5 RS232_Tx O
PIO1_6 RS232_Rx I
PIO2_7 KI1 I
PIO3_0 COM0 O
PIO3_1 COM1 O
PIO3_2 COM2 O
PIO3_3 COM3 O
PIO3_4 COM4 O
PIO3_5 Seg_clk/K7 O
PIO3_6 TriggerIN I
PIO3_7 TriggerOUT O
PIO4_0 SegA/K0 O
PIO4_1 SegB/K1 O
PIO4_2 SegC/K2 O
PIO4_3 SegD/K3 O
PIO4_4 SegE/K4 O
PIO4_5 SegF/K5 O
PIO4_6 REMOCON_IN
PIO4_7 SegG/K6 O
I
I2C Timing