Epson S1C6P366 User manual

Technical Manual
CMOS 4-BIT SINGLE CHIP MICROCOMPUTER
S1C6P366 Technical Hardware
S1C6P366
MF1299-04

NOTICE
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liability of any kind arising out of any inaccuracies contained in this material or due to its application or use in any product or
circuit and, further, there is no representation that this material is applicable to products requiring high level reliability, such
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PC-DOS, PC/AT, PS/2, VGA, EGA and IBM are registered trademarks of International Business Machines Corporation, U.S.A.
NEC PC-9800 Series and NEC are registered trademarks of NEC Corporation.
The flash technology in this product is licensed from Silicon Storage Technology Inc.in the U.S.A.
All other product names mentioned herein are trademarks and/or registered trademarks of their respective owners.
© SEIKO EPSON CORPORATION 2002, All rights reserved.

Section
4.7.3
4.9.5
7.2
Page
46
73
120
Item
Control of LCD display and drive waveform
(1) Display ON/OFF control
Programming notes
Summary of Notes by Function
Programmable timer
Contents
A part of contents was deleted.
(6) was added.
(5) was added.
Chapter
4
7
Revisions and Additions for this manual

S1C63 Family
Devices
S1 C 63158 F 0A01
Packing specifications
00 : Besides tape & reel
0A : TCP BL 2 directions
0B : Tape & reel BACK
0C : TCP BR 2 directions
0D : TCP BT 2 directions
0E : TCP BD 2 directions
0F : Tape & reel FRONT
0G:TCP BT 4 directions
0H : TCP BD 4 directions
0J : TCP SL 2 directions
0K : TCP SR 2 directions
0L : Tape & reel LEFT
0M: TCP ST 2 directions
0N : TCP SD 2 directions
0P : TCP ST 4 directions
0Q:TCP SD 4 directions
0R : Tape & reel RIGHT
99 : Specs not fixed
Specification
Package
D: die form; F: QFP
Model number
Model name
C: microcomputer, digital products
Product classification
S1: semiconductor
Development tools
S5U1 C 63000 A1 1
Packing specifications
00: standard packing
Version
1: Version 1
Tool type
Hx : ICE
Ex : EVA board
Px : Peripheral board
Wx: Flash ROM writer for the microcomputer
Xx : ROM writer peripheral board
Cx : C compiler package
Ax : Assembler package
Dx : Utility tool by the model
Qx : Soft simulator
Corresponding model number
63000: common to S1C63 Family
Tool classification
C: microcomputer use
Product classification
S5U1: development tool for semiconductor products
00
00
Configuration of product number

S1C6P366 TECHNICAL MANUAL EPSON i
CONTENTS
CONTENTS
CHAPTER 1OUTLINE ________________________________________________ 1
1.1 Features......................................................................................................... 1
1.2 Block Diagram ..............................................................................................2
1.3 Pin Layout Diagram .....................................................................................3
1.4 Pin Description .............................................................................................4
1.5 Mask Option.................................................................................................. 5
1.6 Segment Option .............................................................................................5
CHAPTER 2POWER SUPPLY AND INITIAL RESET ____________________________ 6
2.1 Power Supply ................................................................................................6
2.1.1 Voltage <VD1> for oscillation circuit and internal circuits...................... 7
2.1.2 Voltage <VC1–VC3> for LCD driving ........................................................ 7
2.1.3 Operating mode of power supply circuit ................................................... 7
2.2 Initial Reset ................................................................................................... 8
2.2.1 Reset terminal (RESET) ............................................................................. 8
2.2.2 Internal register at initial resetting............................................................ 8
2.2.3 Terminal settings at initial resetting .......................................................... 9
2.3 Test Terminal (TEST) ................................................................................... 10
2.4 Terminals for Flash EEPROM.....................................................................10
CHAPTER 3 CPU, PROM, RAM ______________________________________ 11
3.1 CPU..............................................................................................................11
3.2 Code PROM .................................................................................................11
3.3 RAM .............................................................................................................11
CHAPTER 4PERIPHERAL CIRCUITS AND OPERATION__________________________ 13
4.1 Memory Map................................................................................................ 13
4.2 Watchdog Timer ........................................................................................... 20
4.2.1 Configuration of watchdog timer.............................................................. 20
4.2.2 Interrupt function ...................................................................................... 20
4.2.3 I/O memory of watchdog timer ................................................................. 21
4.2.4 Programming notes ................................................................................... 21
4.3 Oscillation Circuit .......................................................................................22
4.3.1 Configuration of oscillation circuit .......................................................... 22
4.3.2 OSC1 oscillation circuit............................................................................ 22
4.3.3 OSC3 oscillation circuit............................................................................ 23
4.3.4 Operating voltage...................................................................................... 24
4.3.5 Switching operating clock ......................................................................... 24
4.3.6 Clock frequency and instruction execution time....................................... 24
4.3.7 I/O memory of oscillation circuit.............................................................. 25
4.3.8 Programming notes ................................................................................... 26
4.4 Input Ports (K00–K03, K10–K13 and K20) ................................................27
4.4.1 Configuration of input ports ..................................................................... 27
4.4.2 Interrupt function ...................................................................................... 28
4.4.3 Mask option ............................................................................................... 29
4.4.4 I/O memory of input ports......................................................................... 30
4.4.5 Programming notes ................................................................................... 33

ii EPSON S1C6P366 TECHNICAL MANUAL
CONTENTS
4.5 Output Ports (R00–R03, R10–R13 and R20–R23) ......................................34
4.5.1 Configuration of output ports ................................................................... 34
4.5.2 Mask option ............................................................................................... 34
4.5.3 High impedance control ............................................................................ 35
4.5.4 Special output ............................................................................................ 35
4.5.5 I/O memory of output ports....................................................................... 37
4.5.6 Programming notes ................................................................................... 39
4.6 I/O Ports (P00–P03, P10–P13, P20–P23, P30–P33 and P40–P43).......... 40
4.6.1 Configuration of I/O ports ........................................................................ 40
4.6.2 Mask option ............................................................................................... 40
4.6.3 I/O control registers and input/output mode ............................................ 41
4.6.4 Pull-up during input mode ........................................................................ 41
4.6.5 I/O memory of I/O ports............................................................................ 42
4.6.6 Programming note..................................................................................... 45
4.7 LCD Driver (COM0–COM3, SEG0–SEG31) .............................................46
4.7.1 Configuration of LCD driver .................................................................... 46
4.7.2 Power supply for LCD driving .................................................................. 46
4.7.3 Control of LCD display and drive waveform ........................................... 46
4.7.4 Segment option .......................................................................................... 50
4.7.5 Mask option ............................................................................................... 51
4.7.6 I/O memory of LCD driver........................................................................ 52
4.7.7 Programming notes ................................................................................... 53
4.8 Clock Timer .................................................................................................. 54
4.8.1 Configuration of clock timer ..................................................................... 54
4.8.2 Data reading and hold function ................................................................ 54
4.8.3 Interrupt function ...................................................................................... 55
4.8.4 I/O memory of clock timer ........................................................................ 56
4.8.5 Programming notes ................................................................................... 57
4.9 Programmable Timer ................................................................................... 58
4.9.1 Configuration of programmable timer...................................................... 58
4.9.2 Tow separate 8-bit timer (MODE16 = "0") operation............................. 59
4.9.2.1 Setting of initial value and counting down ................................ 59
4.9.2.2 Counter mode.............................................................................. 60
4.9.2.3 Setting of input clock in timer mode........................................... 61
4.9.2.4 Interrupt function........................................................................ 62
4.9.2.5 Setting of TOUT output............................................................... 62
4.9.2.6 Transfer rate setting for serial interface .................................... 63
4.9.3 One channel × 16-bit timer (MODE16 = "1") operation ........................ 63
4.9.3.1 Setting of initial value and counting down ................................ 63
4.9.3.2 Counter mode.............................................................................. 64
4.9.3.3 Setting of input clock in timer mode........................................... 65
4.9.3.4 Interrupt function........................................................................ 66
4.9.3.5 Setting of TOUT output............................................................... 66
4.9.3.6 Transfer rate setting for serial interface .................................... 67
4.9.4 I/O memory of programmable timer ......................................................... 68
4.9.5 Programming notes ................................................................................... 73
4.10 Serial Interface (SIN, SOUT, SCLK, SRDY)................................................ 74
4.10.1 Configuration of serial interface ............................................................ 74
4.10.2 Mask option ............................................................................................. 75
4.10.3 Master mode and slave mode of serial interface.................................... 75
4.10.4 Data input/output and interrupt function ............................................... 76
4.10.5 I/O memory of serial interface................................................................ 78
4.10.6 Programming notes ................................................................................. 81
4.11 A/D Converter ..............................................................................................82
4.11.1 Characteristics and configuration of A/D converter.............................. 82
4.11.2 Terminal configuration of A/D converter................................................ 82

S1C6P366 TECHNICAL MANUAL EPSON iii
CONTENTS
4.11.3 Mask option ............................................................................................. 83
4.11.4 Control of A/D converter......................................................................... 83
4.11.5 Interrupt function .................................................................................... 85
4.11.6 I/O memory of A/D converter.................................................................. 86
4.11.7 Programming notes ................................................................................. 88
4.12 Buzzer Output Circuit ..................................................................................89
4.12.1 Configuration of buzzer output circuit.................................................... 89
4.12.2 Mask option ............................................................................................. 89
4.12.3 Control of buzzer output.......................................................................... 90
4.12.4 I/O memory of buzzer output circuit ....................................................... 91
4.12.5 Programming note................................................................................... 91
4.13 SVD (Supply Voltage Detection) Circuit......................................................92
4.13.1 Configuration of SVD circuit .................................................................. 92
4.13.2 SVD operation ......................................................................................... 92
4.13.3 I/O memory of SVD circuit...................................................................... 93
4.13.4 Programming notes ................................................................................. 93
4.14 Interrupt and HALT .....................................................................................94
4.14.1 Interrupt factor........................................................................................ 96
4.14.2 Interrupt mask ......................................................................................... 97
4.14.3 Interrupt vector ....................................................................................... 97
4.14.4 I/O memory of interrupt .......................................................................... 98
4.14.5 Programming notes ................................................................................ 100
CHAPTER 5 PROM PROGRAMMING AND OPERATING MODE ___________________ 101
5.1 Configuration of PROM Programmer ........................................................101
5.2 Operating Mode .......................................................................................... 103
5.2.1 Normal operation mode ........................................................................... 103
5.2.2 Serial programming mode........................................................................ 103
5.2.3 Parallel programming mode .................................................................... 104
CHAPTER 6DIFFERENCES FROM MASK ROM MODELS ______________________ 105
6.1 Differences from S1C63358 ........................................................................ 105
6.1.1 Terminal configuration............................................................................. 105
6.1.2 Mask option .............................................................................................. 106
6.1.3 Power supply ............................................................................................ 107
6.1.4 Initial reset................................................................................................ 109
6.1.5 PROM, RAM ............................................................................................. 109
6.1.6 I/O memory............................................................................................... 109
6.1.7 Oscillation circuit..................................................................................... 109
6.1.8 SVD circuit ............................................................................................... 110
6.2 Differences from S1C63158 ........................................................................ 111
6.2.1 Terminal configuration............................................................................. 111
6.2.2 Mask option .............................................................................................. 113
6.2.3 Power supply ............................................................................................ 114
6.2.4 Initial reset................................................................................................ 115
6.2.5 PROM, RAM ............................................................................................. 116
6.2.6 I/O memory............................................................................................... 116
6.2.7 Oscillation circuit..................................................................................... 116
6.2.8 SVD circuit ............................................................................................... 116
CHAPTER 7SUMMARY OF NOTES ______________________________________ 117
7.1 Notes for Low Current Consumption..........................................................117
7.2 Summary of Notes by Function...................................................................118
7.3 Precautions on Mounting ...........................................................................123

iv EPSON S1C6P366 TECHNICAL MANUAL
CONTENTS
CHAPTER 8BASIC EXTERNAL WIRING DIAGRAM ___________________________ 125
CHAPTER 9ELECTRICAL CHARACTERISTICS _______________________________ 129
9.1 Absolute Maximum Rating.......................................................................... 129
9.2 Recommended Operating Conditions.........................................................129
9.3 DC Characteristics .....................................................................................130
9.4 Analog Circuit Characteristics and Power Current Consumption ............ 131
9.5 Oscillation Characteristics......................................................................... 132
9.6 Serial Interface AC Characteristics ...........................................................133
9.7 Timing Chart ...............................................................................................134
9.8 Characteristics Curves (reference value) ...................................................135
CHAPTER 10 PACKAGE _______________________________________________ 139
10.1 Plastic Package ...........................................................................................139
CHAPTER 11 PAD LAYOUT ____________________________________________ 140
11.1 Diagram of Pad Layout...............................................................................140
11.2 Pad Coordinates..........................................................................................141
APPENDIX APROM PROGRAMMING ____________________________________ 142
A.1 Outline of Writing Tools..............................................................................142
A.2 Serial Programming (S1C88/S1C63 Serial Connector) ............................143
A.2.1 Serial programming environment (S1C88/S1C63 Serial Connector) .... 143
A.2.2 System connection and setup for serial programming
(S1C88/S1C63 Serial Connector)............................................................ 145
A.2.3 Serial programming procedure (S1C88/S1C63 Serial Connector) ........ 146
A.2.4 Connection diagram for serial programming
(S1C88/S1C63 Serial Connector)............................................................ 148
A.3 Parallel Programming ................................................................................150
A.3.1 Parallel programming environment......................................................... 150
A.3.2 System connection and setup for parallel programming ........................ 152
A.3.3 Parallel programming procedure ............................................................ 153
A.4 Universal ROM Writer II (S5U1C88000W1) Specifications......................156
A.4.1 Outline of Universal ROM Writer II specifications ................................ 156
A.4.2 Detailed description of the Universal ROM Writer II commands .......... 157
A.4.3 List of commands ..................................................................................... 165
A.4.4 Universal ROM Writer II error messages ............................................... 166
A.5 Flash EEPROM Programming Notes .........................................................167
APPENDIX B S5U1C63000P MANUAL
(PERIPHERAL CIRCUIT BOARD FOR S1C63158/358/P366) __________ 168
B.1 Names and Functions of Each Part ............................................................ 168
B.2 Connecting to the Target System ................................................................ 171
B.3 Usage Precautions ......................................................................................173
B.3.1 Operational precautions .......................................................................... 173
B.3.2 Differences with the actual IC ................................................................. 173

S1C6P366 TECHNICAL MANUAL EPSON 1
CHAPTER 1: OUTLINE
CHAPTER 1OUTLINE
The S1C6P366 is a microcomputer which has a high-performance 4-bit CPU S1C63000 as the core
CPU, rewritable PROM, RAM, serial interface, watchdog timer, programmable timer, time base counter (1
system), SVD circuit, a segment type LCD driver (32 segments ×4 commons), A/D converter and a
special input port that can implement key position discrimination function using with the A/D converter.
The S1C6P366 has a built-in large capacity PROM (16K ×13 bits) and RAM (2K ×4 bits) that are compat-
ible with the S1C63358 and S1C63158, it can therefore be used as an MTP (Multi-Time Programming) for
program development.
1.1 Features
OSC1 oscillation circuit ...................... 32.768 kHz (Typ.) crystal oscillation circuit
OSC3 oscillation circuit ...................... 1.8 MHz (Typ.) CR or 4 MHz (Max.) ceramic oscillation circuit (∗1)
Instruction set ..................................... Basic instruction: 46 types (411 instructions with all)
Addressing mode: 8 types
Instruction execution time................... At 32.768 kHz operation: Min. 61 µsec
At 4 MHz operation: Min. 0.5 µsec
PROM capacity ................................... Code PROM: 16,384 words ×13 bits
Segment option PROM: 2,048 words ×4 bits
Programming method: Parallel or serial programming
(exclusive PROM writer is used)
Rewriting: 100 times
RAM capacity...................................... Data memory: 2,048 words ×4 bits
Display memory: 32 words ×4 bits
Input port............................................. 9 bits 8 bits (with pull-up resistors)
1 bit (for key position sensing interrupt by A/D)
Output port .......................................... 12 bits (2 special outputs are available ∗2)
I/O port ................................................ 20 bits (4 serial inputs/outputs are available ∗2)
(4 A/D inputs are available ∗2)
Serial interface .................................... 1 port (8-bit clock synchronous system)
LCD driver........................................... 32 segments ×4, 3 or 2 commons (∗2), 1/3 bias drive
Time base counter .............................. 1 system (clock timer)
Programmable timer ........................... Built-in, 2 channels ×8 bits or 1 channel ×16 bits (∗2),
with event counter function
Watchdog timer................................... Built-in
A/D converter ...................................... 8-bit resolution
Maximum error: ±3 LSB, A/D clock: OSC1, OSC3 (2.7 V to 5.5 V)
Buzzer output...................................... Buzzer frequency: 2 kHz or 4 kHz (∗2), 2 Hz interval output (∗2)
Supply voltage detection (SVD) circuit ... 2 values, programmable (2.7 V, 2.8 V)
External interrupt ................................ Input port interrupt: 2 systems
Key sensing interrupt: 1 system
Internal interrupt ................................. Clock timer interrupt: 4 systems
Programmable timer interrupt: 2 systems
Serial interface interrupt: 1 system
A/D converter: 1 system
Power supply voltage ......................... 2.7 V to 5.5 V
Operating temperature range ............. -20°C to 70°C

2EPSON S1C6P366 TECHNICAL MANUAL
CHAPTER 1: OUTLINE
Current consumption (Typ.) ................ Single clock:
During HALT (32 kHz) 3.0 V (LCD power OFF) 2.5 µA
3.0 V (LCD power ON) 37 µA
During operation (32 kHz) 3.0 V (LCD power ON) 120 µA
Twin clock:
During operation (4 MHz) 3.0 V (LCD power ON) 800 µA
Package .............................................. QFP15-100pin (plastic) or chip
∗1: Can be selected with mask option ∗2: Can be selected with software
1.2 Block Diagram
OSC1
OSC2
OSC3
OSC4
SPRG
RXD
TXD
SCLK
CLKIN
COM0–3
SEG0–31
VDD
VC1–3
CA–CB
VD1
VSS
BZ
K00–K03
K10–K13
K20
TEST
RESET
P00–P03
P10–P13
P20–P23
P30–P33
P40–P43
R00–R03
R10–R13
R20–R23
AVDD
AVSS
AVREF
Core CPU S1C63000
Code PROM
16,384 words ×13 bits
PROM
Programmer
System Reset
Control
Interrupt
Generator
OSC
RAM
2,048 words ×4 bits
Segment Option
PROM
2,048 words ×4 bits
LCD Driver
32 SEG ×4 COM
Power
Controller
SVD
Buzzer
Output
Clock
Timer
Serial Interface
Programmable
Timer/Counter
Input Port
A/D
I/O Port
Output Port
Fig. 1.2.1 Block diagram

S1C6P366 TECHNICAL MANUAL EPSON 3
CHAPTER 1: OUTLINE
1.3 Pin Layout Diagram
QFP15-100pin
5175
26
50
INDEX
251
100
76
S1C6P366
No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
Pin name
S1C6P366
SEG7
SEG8
SEG9
SEG10
SEG11
SEG12
SEG13
SEG14
SEG15
SEG16
SEG17
SEG18
SEG19
SEG20
SEG21
SEG22
SEG23
SEG24
SEG25
SEG26
SEG27
SEG28
SEG29
SEG30
SEG31
S1C63358
SEG7
SEG8
SEG9
SEG10
SEG11
SEG12
SEG13
SEG14
SEG15
SEG16
SEG17
SEG18
SEG19
SEG20
SEG21
SEG22
SEG23
SEG24
SEG25
SEG26
SEG27
SEG28
SEG29
SEG30
SEG31
No.
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
Pin name
S1C6P366
CLKIN
SPRG
COM0
COM1
COM2
COM3
CB
CA
VC3
VC2
VC1
VSS
OSC1
OSC2
VD1
OSC3
OSC4
VDD
RESET
TEST
AVREF
AVDD
AVSS
RXD
TXD
S1C63358
N.C.
N.C.
COM0
COM1
COM2
COM3
CB
CA
VC3
VC2
VC1
VSS
OSC1
OSC2
VD1
OSC3
OSC4
VDD
RESET
TEST
AVREF
AVDD
AVSS
N.C.
N.C.
No.
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
Pin name
S1C6P366
SCLK
P43
P42
P41
P40
P33
P32
P31
P30
P23
P22
P21
P20
P13
P12
P11
P10
P03
P02
P01
P00
R23
R22
R21
R20
S1C63358
N.C.
P43
P42
P41
P40
P33
P32
P31
P30
P23
P22
P21
P20
P13
P12
P11
P10
P03
P02
P01
P00
R23
R22
R21
R20
No.
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
Pin name
S1C6P366
R13
R12
R11
R10
R03
R02
R01
R00
BZ
K00
K01
K02
K03
K10
K11
K12
K13
K20
SEG0
SEG1
SEG2
SEG3
SEG4
SEG5
SEG6
S1C63358
R13
R12
R11
R10
R03
R02
R01
R00
BZ
K00
K01
K02
K03
K10
K11
K12
K13
K20
SEG0
SEG1
SEG2
SEG3
SEG4
SEG5
SEG6
N.C. : No Connection
Fig. 1.3.1 Pin layout diagram

4EPSON S1C6P366 TECHNICAL MANUAL
CHAPTER 1: OUTLINE
1.4 Pin Description
Table 1.4.1 Pin description
Pin name
VDD
VSS
VD1
VC1–VC3
CA, CB
OSC1
OSC2
OSC3
OSC4
K00–K03
K10–K13
K20
P00–P03
P10–P13
P20–P23
P30–P33
P40–P43
R00
R01
R02
R03
R10–R13
R20–R23
COM0–COM3
SEG0–SEG31
AVDD
AVSS
AVREF
BZ
RESET
TEST
RXD ∗1
TXD ∗1
SCLK ∗1
CLKIN ∗1
SPRG ∗1
Function
Power (+) supply pin
Power (–) supply pin
Oscillation system regulated voltage output pin
LCD system power supply pin
1/3 bias
LCD system boosting/reducing capacitor connecting pin
Crystal oscillation input pin
Crystal oscillation output pin
Ceramic or CR oscillation input pin (selected by mask option)
Ceramic or CR oscillation output pin (selected by mask option)
Input port
Input port
Input port with control
I/O port
I/O port (switching to serial I/F input/output is possible by software)
I/O port
I/O port
I/O port (can be used as A/D input)
Output port
Output port
Output port (switching to TOUT output is possible by software)
Output port (switching to FOUT output is possible by software)
Output port
Output port
LCD common output pin (1/4, 1/3, 1/2 duty can be selected by software)
LCD segment output pin
Power (+) supply pin for A/D converter
Power (–) supply pin for A/D converter
Reference voltage for A/D converter
Buzzer output pin
Initial reset input pin
Testing input pin
Serial data input pin for Flash programming
Serial data output pin for Flash programming
Serial clock input/output pin for Flash programming
Clock input pin for Flash programming
Control pin for Flash programming
Pin No.
43
37
40
36–34
33, 32
38
39
41
42
85–88
89–92
93
71–68
67–64
63–60
59–56
55–52
83
82
81
80
79–76
75–72
28–31
94–100, 1–25
47
48
46
84
44
45
49
50
51
26
27
In/Out
–
–
–
–
–
I
O
I
O
I
I
I
I/O
I/O
I/O
I/O
I/O
O
O
O
O
O
O
O
O
–
–
–
O
I
I
I
O
I/O
I
I
∗1N.C. in S1C63358
Refer to Chapter 5, "PROM Programmer and Operating Mode", for the Flash programming pins.

S1C6P366 TECHNICAL MANUAL EPSON 5
CHAPTER 1: OUTLINE
1.5 Mask Option
Mask options shown below are provided for the S1C6P366.
<S1C6P366 mask options>
(1) OSC3 oscillation circuit
Either CR oscillation circuit or ceramic oscillation circuit can be selected as the OSC3 oscillation
circuit.
Refer to Section 4.3.3, "OSC3 oscillation circuit", for details.
The other mask options provided for the S1C63358/63158 are fixed as follows in the S1C6P366, so they
cannot be selected.
• OSC1 oscillation circuit......................................... Crystal oscillation
• Multiple key input reset ....................................... Not used
• Time authorize for multiple key input............... Not used
• Input port pull-up resistor ................................... Available
• Output port output specifications ...................... Complementary output
• I/O port output specifications ............................ Complementary output
• I/O port pull-up resistor P1x, P2x, P3x ............ Available
P4x ............................. Not available
• LCD drive bias ....................................................... 1/3 bias
• Serial interface input/output polarity ............... Negative polarity
• Buzzer output specification ................................. Negative polarity
1.6 Segment Option
(1) LCD segment allocation
Up to 128 bits of the display memory can be selected from the data memory addresses F000H to
F01FH. The LCD driver has a segment decoder built-in, and the data bit (D0–D3) of the optional
address in the display memory area (F000H–F01FH) can be allocated to the optional segment. The
segment option generator SOG63358, that has been prepared as a development software tool of the
S1C63358, is used for this selection.
Refer to Section 4.7.4, "Segment option", for details.
(2) LCD segment output specification
It is possible to set the optional SEG terminal for DC output.
Refer to Section 4.7.4, "Segment option", for details.
(3) Segment option data
Recommended LCD segment option data is include in the S5U1C6P366Y1 package. Modifying the
LCD segment opotion is done at the user's own risk.

6EPSON S1C6P366 TECHNICAL MANUAL
CHAPTER 2: POWER SUPPLY AND INITIAL RESET
CHAPTER 2POWER SUPPLY AND INITIAL RESET
2.1 Power Supply
The S1C6P366 operating power voltage is as follows:
2.7 V to 5.5 V
The S1C6P366 operates by applying a single power supply within the above range between VDD/AVDD
and VSS/AVSS. The S1C6P366 itself generates the voltage necessary for all the internal circuits by the
built-in power supply circuits shown in Table 2.1.1.
Table 2.1.1 Power supply circuits
Circuit
Oscillation circuit
Internal logic circuits
LCD driver
Oscillation system voltage regulator
LCD system voltage circuit
A/D converter
Power supply circuit
Oscillation system voltage regulator
Supply voltage (V DD )
LCD system voltage circuit
Supply voltage (V
DD )
Supply voltage (V
DD )
Analog supply voltage (AV
DD ) and supply voltage (V DD )
Output voltage
V
D1
V DD
V
C1 –V C3
V DD
V DD
AV DD and V DD
Note: • Do not drive external loads with the output voltage from the internal power supply circuits.
•The internal LCD system voltage circuit (1/3 bias) is always used in the S1C6P366.
•See Chapter 9, "Electrical Characteristics", for voltage values and drive capability.
V D1
AV DD
V DD
V D1
OSC1–4
COM0–3
V C1
V C2
V C3
CA
CB
V SS
AV SS
+
V C1 –V C3
SEG0–31
External
power
supply
Internal
circuits
A/D
converter
Oscillation
circuit
LCD system
voltage circuit
Oscillation system
voltage regulator
LCD driver
SVD circuit
Fig. 2.1.1 Configuration of power supply

S1C6P366 TECHNICAL MANUAL EPSON 7
CHAPTER 2: POWER SUPPLY AND INITIAL RESET
2.1.1Voltage <VD1> for oscillation circuit and internal circuits
VD1 is the operating voltage for the oscillation circuit, and is generated by the oscillation system voltage
regulator for stabilizing oscillation.
In the S1C63358/63158, it is necessary to switch the VD1 voltage level according to the oscillation circuit
and operating frequency by controlling the voltage regulator. In the S1C6P366, the VD1 voltage level is
fixed, so software control for switching the VD1 level does not affect the actual output voltage. However,
when using the S1C6P366 as a development tool for the S1C63358/63158, the VD1 software control
sequence must be implemented according to the model.
Refer to Chapter 6, "Differences from Mask ROM Models", for details.
2.1.2Voltage <VC1–VC3> for LCD driving
VC1 to VC3 are the voltages for LCD drive, and are generated by the LCD system voltage circuit to
stabilize the display quality.
Since the minimum operating voltage of the S1C6P366 is 2.7 V, the LCD system voltage circuit generates
VC2 as the reference voltage, and generates two other voltages by boosting or reducing VC2 (VC1 = 1/
2•VC2, VC3 = 3/2•VC2).
Refer to Chapter 9, "Electrical Characteristics", for voltage values of VC1 to VC3.
2.1.3 Operating mode of power supply circuit
The oscillation system voltage regulator and A/D converter power supply circuit operate in normal
mode that uses VDD as the power source.
In the S1C63358/63158, a booster mode (VC2 mode) is provided in order to guarantee low-voltage
operation, therefore it is necessary to switch the operating mode. Since the power supply voltage of the
S1C6P366 is 2.7 V or more, this switching is not necessary and the software control does not affect the
operating mode. However, when using the S1C6P366 as a development tool for the S1C63358/63158, the
operating mode control routine must be implemented according to the model.
Refer to Chapter 6, "Differences from Mask ROM Models", for details.

8EPSON S1C6P366 TECHNICAL MANUAL
CHAPTER 2: POWER SUPPLY AND INITIAL RESET
2.2 Initial Reset
To initialize the S1C6P366 circuits, initial reset must be executed. The S1C6P366 supports an external
initial reset using the reset (RESET) terminal.
When the power is turned on, be sure to initialize using this reset function. It is not guaranteed that the
circuits are initialized by only turning the power on.
Figure 2.2.1 shows the configuration of the initial reset circuit.
RESET
OSC2
OSC1
RQ
S
VDD
2 Hz
Internal
initial
reset
Divider
OSC1
oscillation
circuit
Fig. 2.2.1 Configuration of initial reset circuit
2.2.1 Reset terminal (RESET)
Initial reset can be executed externally by setting the reset terminal to a low level (VSS). After that the
initial reset is released by setting the reset terminal to a high level (VDD) and the CPU starts operation.
The reset input signal is maintained by the RS latch and becomes the internal initial reset signal. The RS
latch is designed to be released by a 2 Hz signal (high) that is divided by the OSC1 clock. Therefore in
normal operation, a maximum of 250 msec (when fOSC1 = 32.768 kHz) is needed until the internal initial
reset is released after the reset terminal goes to high level. Be sure to maintain a reset input of 0.1 msec or
more.
However, when turning the power on, the reset terminal should be set at a low level as in the timing
shown in Figure 2.2.1.1.
VDD
RESET
2.0 msec or more
2.7 V
0.5•V
DD
0.1•V DD or less (low level)
Power on
Fig. 2.2.1.1 Initial reset at power on
The reset terminal should be set to 0.1•VDD or less (low level) until the supply voltage becomes 2.7 V or
more. After that, a level of 0.5•VDD or less should be maintained more than 2.0 msec.
In the S1C6P366, a low level input to the reset terminal initializes some analog circuits as well as the
internal logic. At this time, 10 µA or more current is consumed as the bias current.
2.2.2 Internal register at initial resetting
Initial reset initializes the CPU as shown in Table 2.2.2.1.
The registers and flags which are not initialized by initial reset should be initialized in the program if
necessary.
In particular, the stack pointers SP1 and SP2 must be set as a pair because all the interrupts including
NMI are masked after initial reset until both the SP1 and SP2 stack pointers are set with software.
When data is written to the EXT register, the E flag is set and the following instruction will be executed in
the extended addressing mode. If an instruction which does not permit extended operation is used as the
following instruction, the operation is not guaranteed. Therefore, do not write data to the EXT register for
initialization only.
Refer to the "S1C63000 Core CPU Manual" for extended addressing and usable instructions.

S1C6P366 TECHNICAL MANUAL EPSON 9
CHAPTER 2: POWER SUPPLY AND INITIAL RESET
Table 2.2.2.1 Initial values
Name
Data register A
Data register B
Extension register EXT
Index register X
Index register Y
Program counter
Stack pointer SP1
Stack pointer SP2
Zero flag
Carry flag
Interrupt flag
Extension flag
Queue register
CPU core
Symbol
A
B
EXT
X
Y
PC
SP1
SP2
Z
C
I
E
Q
Number of bits
4
4
8
16
16
16
8
8
1
1
1
1
16
Setting value
Undefined
Undefined
Undefined
Undefined
Undefined
0110H
Undefined
Undefined
Undefined
Undefined
0
0
Undefined
Name
RAM
Display memory
Other pheripheral circuits
Peripheral circuits
Number of bits
4
4
–
Setting value
Undefined
Undefined
∗
∗See Section 4.1, "Memory Map".
2.2.3 Terminal settings at initial resetting
The output port (R) terminals and I/O port (P) terminals are shared with special output terminals, input/
output terminals of the serial interface and input terminals of the A/D converter. These functions are
selected by the software. At initial reset, these terminals are set to the general purpose output port
terminals and I/O port terminals. Set them according to the system in the initial routine. In addition, take
care of the initial status of output terminals when designing a system.
Table 2.2.3.1 shows the list of the shared terminal settings.
Table 2.2.3.1 List of shared terminal settings
Special output
TOUT FOUT
TOUT
FOUT
Serial I/F
Master Slave
SIN(I) SIN(I)
SOUT(O) SOUT(O)
SCLK(O) SCLK(I)
SRDY(O)
Terminal
name
R00
R01
R02
R03
R10–R13
R20–R23
P00–P03
P10
P11
P12
P13
P20–P23
P30–P33
P40
P41
P42
P43
Terminal status
at initial reset
R00 (High output)
R01 (High output)
R02 (High output)
R03 (High output)
R10–R13 (High output)
R20–R23 (High output)
P00–P03 (Input & Pull-up)
P10 (Input & Pull-up)
P11 (Input & Pull-up)
P12 (Input & Pull-up)
P13 (Input & Pull-up)
P20–P23 (Input & Pull-up)
P30–P33 (Input & Pull-up)
P40 (Input & high impedance)
P41 (Input & high impedance)
P42 (Input & high impedance)
P43 (Input & high impedance)
A/D
converter
AD0(I)
AD1(I)
AD2(I)
AD3(I)
For setting procedure of the functions, see explanations for each of the peripheral circuits.

10 EPSON S1C6P366 TECHNICAL MANUAL
CHAPTER 2: POWER SUPPLY AND INITIAL RESET
2.3 Test Terminal (TEST)
This is the terminal used for the factory inspection of the IC. During normal operation, connect the TEST
terminal to VDD.
2.4 Terminals for Flash EEPROM
The S1C6P366 has the following terminals used for writing data to the Flash EEPROM and for factory
testing.
SPRG: Flash EEPROM programming control terminal
SCLK: Clock input/output terminal for Flash EEPROM serial programming
RXD: Data input terminal for Flash EEPROM serial programming
TXD: Data output terminal for Flash EEPROM serial programming
CLKIN: Flash EEPROM write-control clock input terminal
The above terminals should be set up according to the operating mode. Refer to Chapter 5, "PROM
Programming and Operating Mode", for details.