i-See IGEPv2 BOARD Quick user guide

ISEE
IGEPv2
BOARD
ISEE ( Integration Software & Electronics Engineering )
Address: C/Vallespir nº19 Planta 1 odulo 1
Post Code: 08173
City: Sant Cugat
Country: SPAIN
Phone: [phone]
[email protected]m
http://www.iseebcn.com
http://www.igep.es
IGEPv2 BOARD
Hardware Reference anual
(Revision 1.21 26/10/2010)

IGEPv2
ISEE 2007 SL.
All rights reserved
provided for informational
purposes only
DOCU ENT FRO ISEE 2007 S.L.
1 COPYRIGHT NOTICE
................................
2 WARRANTY
................................
3
ISEE IGEPv2 BOARD FEATURES
3.1
ISEE IGEPv2 BOARD GEN
3.2
SYSTE BLOCK DIAGRA
3.2.1
IGEPv2 Revision B board series block diagram
3.2.2
IGEPv2 Revision C board series block diagram
3.2.3
IGEPv2 Revision C board series improvements
3.3 GENERAL VIEW
................................
3.3.1
IGEPv2 Revision B board series view
3.3.2
IGEPv2 Revision C board series view
3.4
ECHANICAL SPECIFICATION
3.4.1
IGEPv2 Revision
3.4.2
IGEPv2 Revision C board series mechanical
3.5
ELECTRICAL SPECIFICATIONS
4
WIFI/BLUETOOTH INTERFACE
4.1
BLOCK DIAGRA
4.2 INTERFACES
................................
4.3 Power-
on Reset Sequence for WLAN
4.4
WLAN RESET/PDN PINS
4.5
BLUETOOTH RESET PINS
4.6 PC INTERFACE
................................
4.6.1
TPS65950 SIDE
4.6.2
WIFI ODULE SIDE
5
CONNECTORS DESCRIPTION
5.1
CONNECTOR J200: AIN 5.0VCC POWER
IGEPv2
BOARD HARDWARE USER ANUAL v1.21
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, IGEP® is a registered trademark from
ISEE 2007 SL.
purposes only
.
DOCU ENT FRO ISEE 2007 S.L.
AN-PR-IGEP.0020-001.21.HW_RC
CONTENTS
................................
................................
................................
................................
.............................
ISEE IGEPv2 BOARD FEATURES
................................
................................
ISEE IGEPv2 BOARD GEN
ERAL SPECIFICATIONS
................................
SYSTE BLOCK DIAGRA
................................
................................
IGEPv2 Revision B board series block diagram
...............................
IGEPv2 Revision C board series block diagram
...............................
IGEPv2 Revision C board series improvements
...............................
................................
................................
IGEPv2 Revision B board series view
................................
IGEPv2 Revision C board series view
................................
ECHANICAL SPECIFICATION
................................
............................
IGEPv2 Revision
B board series mechanical
................................
IGEPv2 Revision C board series mechanical
................................
ELECTRICAL SPECIFICATIONS
................................
...........................
WIFI/BLUETOOTH INTERFACE
................................
................................
BLOCK DIAGRA
................................
................................
................................
................................
....................
on Reset Sequence for WLAN
................................
...................
WLAN RESET/PDN PINS
................................
................................
BLUETOOTH RESET PINS
................................
................................
................................
................................
TPS65950 SIDE
................................
................................
WIFI ODULE SIDE
................................
................................
CONNECTORS DESCRIPTION
................................
................................
CONNECTOR J200: AIN 5.0VCC POWER
................................
BOARD HARDWARE USER ANUAL v1.21
ISEE 2007 SL.
The following is
10/26/2010
2
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7
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25
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... 28
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IGEPv2
ISEE 2007 SL.
All rights reserved
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purposes only
DOCU ENT FRO ISEE 2007 S.L.
5.2
CONNECTOR J400: JTAG DEBUG
5.3
CONNECTOR J940: POWER + RS485
5.4
CONNECTOR J960
5.5
CONNECTOR J971: KEYBOARD ATRIX 4x4
5.6
TFT CONNECTORS: JA41
5.6.1
CONNECTOR JA41
5.6.2
CONNECTOR JA42
5.6.3
CONNECTOR JA41
5.7
CONNECTOR J990: GPIO
5.8
IGEPv2 ANTENNAS (INTERNAL/EXTERNAL
5.9
CONNECTOR JC20/JC21: ANALOG TO DIGITAL CONVERTER
5.10
CONNECTOR JC30: CA ERA CONNECTOR
5.11
S_VIDEO SIGNALS (TP400 and TP401)
5.12
RTC BACKUP BATTERY
6 BOARD REFERENCE
................................
7 LIST OF FIGURES
................................
8 CHANGELOG
................................
IGEPv2
BOARD HARDWARE USER ANUAL v1.21
All rights reserved
, IGEP® is a registered trademark from
ISEE 2007 SL.
purposes only
.
DOCU ENT FRO ISEE 2007 S.L.
AN-PR-IGEP.0020-001.21.HW_RC
CONNECTOR J400: JTAG DEBUG
................................
........................
CONNECTOR J940: POWER + RS485
................................
CONNECTOR J960
: SERIAL PORT DEBUG (+ EXTRA RS232)
CONNECTOR J971: KEYBOARD ATRIX 4x4
................................
TFT CONNECTORS: JA41
-JA42 ................................
...........................
CONNECTOR JA41
................................
................................
CONNECTOR JA42
................................
................................
CONNECTOR JA41
-JA42 COUNTERPART
................................
CONNECTOR J990: GPIO
................................
................................
IGEPv2 ANTENNAS (INTERNAL/EXTERNAL
-
UD11, JD21, JD22)
CONNECTOR JC20/JC21: ANALOG TO DIGITAL CONVERTER
CONNECTOR JC30: CA ERA CONNECTOR
................................
S_VIDEO SIGNALS (TP400 and TP401)
................................
RTC BACKUP BATTERY
................................
................................
................................
................................
................................
................................
...................
................................
................................
..........................
BOARD HARDWARE USER ANUAL v1.21
ISEE 2007 SL.
The following is
10/26/2010
3
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29
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.................. 31
.................. 33
................................
......... 37
...........................
39
................................
...... 39
................................
...... 43
................................
........ 44
................................
... 45
UD11, JD21, JD22)
............. 50
.................. 55
................................
........ 57
................................
............ 60
................................
... 61
................................
................ 64
...................
65
..........................
68

IGEPv2
ISEE 2007 SL.
All rights reserved
provided for informational
purposes only
DOCU ENT FRO ISEE 2007 S.L.
VERSION DATE
1.00 19/03/2009
1.02 20/05/2009
1.10 24/07/2009
1.11 21/09/2009
1.12 24/09/2009
1.13 23/10/2009
1.14 18/11/2009
1.15 9/03/2010
1.16 15/05/2010
1.17 6/07/2010
1.18 9/07/2010
1.19 31/08/10
1.20 1/10/10
1.21 26/10/10
IGEPv2
BOARD HARDWARE USER ANUAL v1.21
All rights reserved
, IGEP® is a registered trademark from
ISEE 2007 SL.
purposes only
.
DOCU ENT FRO ISEE 2007 S.L.
AN-PR-IGEP.0020-001.21.HW_RC
VERSION CONTROL
ORIGIN DESCRIPTION
R&D Initial version
R&D Board Confi uration update.
R&D Update Hw Revision RB
R&D Document Update
R&D Document Update
R&D Document Update
R&D Document Update
R&D Update Hw Revision RC
R&D Document Update
R&D Document Update
R&D Document Update
R&D Document Update
R&D Document Update
R&D Document Update
BOARD HARDWARE USER ANUAL v1.21
ISEE 2007 SL.
The following is
10/26/2010
4

IGEPv2
ISEE 2007 SL.
All rights reserved
provided for informational
purposes only
DOCU ENT FRO ISEE 2007 S.L.
1COPYRIGHT
NOTICE
Th
is document is copyrighted, 20
reserves the right to make improvements to the products described in this manual
at any time without notice. No part of this manual may be reproduced, copied,
transl
ated or transmitted in any form or by any means without the prior written
permission of the original manufacturer. Information provided in this manual is
intended to be accurate and reliable. However, the original manufacturer assumes
no responsibility for
its use, nor for any infringements upon the rights of third
parties which may result from its use.
2WARRANTY
Should this evaluation board/kit not meet the specifications indicated in the User’s
Guide, the board/kit may be returned within 30 days from the date of delivery for a
full refund.
THE FOREGOING WARRANTY IS THE EXCLUSIVE WARRANTY MADE BY
SELLER TO BUYER
AND IS IN LIEU OF ALL OTHER WARRANTIES,
EXPRESSED, IMPLIED, OR STATUTORY, INCLUDING ANY WARRANTY OF
MERCHANTABILITY OR FITNESS FOR ANY PARTICULAR PURPOSE.
The user assumes all responsibility and liability for proper and safe handling of the
goods. Further,
the user indemnifies ISEE 2007 SL from all claims arising from the
handling or use of the goods. Due to the open construction of the product, it is the
user’s responsibility to take any and all appropriate precautions with regard to
electrostatic discharge.
EXCEPT TO THE EXTENT OF THE INDEMNITY SET FORTH ABOVE, NEITHER
PARTY SHALL BE LIABLE TO THE OTHER FOR ANY INDIRECT, SPECIAL,
INCIDENTAL, OR CONSEQUENTIAL DAMAGES.
ISEE 2007 SL currently deals with a variety of customers for products, and
therefore our a
rrangement with the user is not exclusive.
for applications assistance, customer product design, software performance, or
infringement of patents or services described herein.
Please read specifically, the Warnings and Restriction
handling the product. This notice contains important safety information about
temperatures and voltages. For additional information on
and/or safety programs, please contact with ISEE (support@iseebcn.c
IGEPv2
BOARD HARDWARE USER ANUAL v1.21
All rights reserved
, IGEP® is a registered trademark from
ISEE 2007 SL.
purposes only
.
DOCU ENT FRO ISEE 2007 S.L.
AN-PR-IGEP.0020-001.21.HW_RC
NOTICE
is document is copyrighted, 20
10
, by ISEE 2007 SL. All rights are reserved. ISEE
reserves the right to make improvements to the products described in this manual
at any time without notice. No part of this manual may be reproduced, copied,
ated or transmitted in any form or by any means without the prior written
permission of the original manufacturer. Information provided in this manual is
intended to be accurate and reliable. However, the original manufacturer assumes
its use, nor for any infringements upon the rights of third
parties which may result from its use.
Should this evaluation board/kit not meet the specifications indicated in the User’s
Guide, the board/kit may be returned within 30 days from the date of delivery for a
THE FOREGOING WARRANTY IS THE EXCLUSIVE WARRANTY MADE BY
AND IS IN LIEU OF ALL OTHER WARRANTIES,
EXPRESSED, IMPLIED, OR STATUTORY, INCLUDING ANY WARRANTY OF
MERCHANTABILITY OR FITNESS FOR ANY PARTICULAR PURPOSE.
The user assumes all responsibility and liability for proper and safe handling of the
the user indemnifies ISEE 2007 SL from all claims arising from the
handling or use of the goods. Due to the open construction of the product, it is the
user’s responsibility to take any and all appropriate precautions with regard to
EXCEPT TO THE EXTENT OF THE INDEMNITY SET FORTH ABOVE, NEITHER
PARTY SHALL BE LIABLE TO THE OTHER FOR ANY INDIRECT, SPECIAL,
INCIDENTAL, OR CONSEQUENTIAL DAMAGES.
ISEE 2007 SL currently deals with a variety of customers for products, and
rrangement with the user is not exclusive.
ISEE
assumes no liability
for applications assistance, customer product design, software performance, or
infringement of patents or services described herein.
Please read specifically, the Warnings and Restriction
s notice in this manual prior to
handling the product. This notice contains important safety information about
temperatures and voltages. For additional information on
IGEPV2
and/or safety programs, please contact with ISEE (support@iseebcn.c
BOARD HARDWARE USER ANUAL v1.21
ISEE 2007 SL.
The following is
10/26/2010
5
, by ISEE 2007 SL. All rights are reserved. ISEE
reserves the right to make improvements to the products described in this manual
at any time without notice. No part of this manual may be reproduced, copied,
ated or transmitted in any form or by any means without the prior written
permission of the original manufacturer. Information provided in this manual is
intended to be accurate and reliable. However, the original manufacturer assumes
its use, nor for any infringements upon the rights of third
Should this evaluation board/kit not meet the specifications indicated in the User’s
Guide, the board/kit may be returned within 30 days from the date of delivery for a
THE FOREGOING WARRANTY IS THE EXCLUSIVE WARRANTY MADE BY
AND IS IN LIEU OF ALL OTHER WARRANTIES,
EXPRESSED, IMPLIED, OR STATUTORY, INCLUDING ANY WARRANTY OF
MERCHANTABILITY OR FITNESS FOR ANY PARTICULAR PURPOSE.
The user assumes all responsibility and liability for proper and safe handling of the
the user indemnifies ISEE 2007 SL from all claims arising from the
handling or use of the goods. Due to the open construction of the product, it is the
user’s responsibility to take any and all appropriate precautions with regard to
EXCEPT TO THE EXTENT OF THE INDEMNITY SET FORTH ABOVE, NEITHER
PARTY SHALL BE LIABLE TO THE OTHER FOR ANY INDIRECT, SPECIAL,
ISEE 2007 SL currently deals with a variety of customers for products, and
assumes no liability
for applications assistance, customer product design, software performance, or
s notice in this manual prior to
handling the product. This notice contains important safety information about
IGEPV2
environmental
and/or safety programs, please contact with ISEE (support@iseebcn.c
om).

IGEPv2
ISEE 2007 SL.
All rights reserved
provided for informational
purposes only
DOCU ENT FRO ISEE 2007 S.L.
No license is granted under any patent right or other intellectual property right of
ISEE
covering or relating to any machine, process, or combination in which such
ISEE
products or services might be or are used.
WARRANTY: IGEPV2
w rkmanship f r a peri d f
c ver any pr blems ccurring as a result f impr per use, m dificati ns,
exp sure t water, excessive v ltages, abuse, r accidents. All
be returned via standard mail if an issue is f und. If n issue is f und r
express return is needed, the cust mer will pay all shipping c sts.
I
SEE IGEP platform web site:
ISEE IGEP wiki:
http://labs.igep.es
ISEE shop:
http://shop.igep.es
ISEE Software Repositories:
IGEPv2
BOARD HARDWARE USER ANUAL v1.21
All rights reserved
, IGEP® is a registered trademark from
ISEE 2007 SL.
purposes only
.
DOCU ENT FRO ISEE 2007 S.L.
AN-PR-IGEP.0020-001.21.HW_RC
No license is granted under any patent right or other intellectual property right of
covering or relating to any machine, process, or combination in which such
products or services might be or are used.
is warranted against defects in materials and
w rkmanship f r a peri d f
1 year
fr m purchase. This warranty d es n t
c ver any pr blems ccurring as a result f impr per use, m dificati ns,
exp sure t water, excessive v ltages, abuse, r accidents. All
be returned via standard mail if an issue is f und. If n issue is f und r
express return is needed, the cust mer will pay all shipping c sts.
SEE IGEP platform web site:
http://www.igep.es
http://labs.igep.es
http://shop.igep.es
or https://shop.igep.es
ISEE Software Repositories:
http://git.igep.es
BOARD HARDWARE USER ANUAL v1.21
ISEE 2007 SL.
The following is
10/26/2010
6
No license is granted under any patent right or other intellectual property right of
covering or relating to any machine, process, or combination in which such
is warranted against defects in materials and
fr m purchase. This warranty d es n t
c ver any pr blems ccurring as a result f impr per use, m dificati ns,
exp sure t water, excessive v ltages, abuse, r accidents. All
b ards will
be returned via standard mail if an issue is f und. If n issue is f und r
express return is needed, the cust mer will pay all shipping c sts.

IGEPv2
ISEE 2007 SL.
All rights reserved
provided for informational
purposes only
DOCU ENT FRO ISEE 2007 S.L.
3ISEE IGEPV2
BOARD
Descripti n
Pr cess r
Pr cess r Speed
Mem ry SDRAM
Nand Flash
DSP
DSP Speed
Vide 3D Accelerat r
P wer Management
Debug
PCB size
IGEPv2
BOARD HARDWARE USER ANUAL v1.21
All rights reserved
, IGEP® is a registered trademark from
ISEE 2007 SL.
purposes only
.
DOCU ENT FRO ISEE 2007 S.L.
AN-PR-IGEP.0020-001.21.HW_RC
BOARD
FEATURES
Characteristics
O AP3530 (AR Cortex-A8)
720 hz
512 Bytes LPDDR SDRA – 200 hz
512 bytes
T S320D 64+
430 hz
PowerVR SGX 530
TPS65950
Console RS232 + JTAG Interface
93 x 65 x 1.6 mm
BOARD HARDWARE USER ANUAL v1.21
ISEE 2007 SL.
The following is
10/26/2010
7

IGEPv2
ISEE 2007 SL.
All rights reserved
provided for informational
purposes only
DOCU ENT FRO ISEE 2007 S.L.
Indicat rs
USB 2.0 LS/FS/HS
OTG
USB 2.0 HS HOST
Audi stere in/ ut
micr SD
DVI vide utput
P wer
Expansi n c nnect r
Wifi
Bluet th
Antenna
WiFi/Bluet th
Ethernet
Temperature Range
WARNING:
IGEPv2
POWER SUPPLY
The following sections provide more detail on each feature and components on the
IGEPv2 BOARD.
IGEPv2
BOARD HARDWARE USER ANUAL v1.21
All rights reserved
, IGEP® is a registered trademark from
ISEE 2007 SL.
purposes only
.
DOCU ENT FRO ISEE 2007 S.L.
AN-PR-IGEP.0020-001.21.HW_RC
2 Bicolor USER LEDS
OTG
1 ini AB USB socket connector
(dual slave and host
1 Type A USB
socket connector (standard USB host)
3.5mm standard stereo audio jack
microSD connector
(SD and SDHC cards supported)
DVI-D using HD I connector. (v
ideo and TS lines
available in expansion connector also).
5Vcc / 1A
3.5mm socket connector for w
all plug or JST Connector
Power 5V and 1.8V, UART, cBSP, cSPI, I2C, GPIO,
RS485 with transceiver, Keyboard.
IEEE 802.11b/g 2,4GHz
2.0
WiFi/Bluet th
1 shared internal antenna (integrated on
PCB
10/100 B BaseT
(RJ45 connector with led link/activity)
Commercial ( 0 to 70 Cº) and
Industrial range (
+80 Cº Degrees) are available (C ntact
ISEE
IGEPv2
BOARD CAN ONLY BE POWERED
WITH 5V
POWER SUPPLY
OR THE BOARD WILL BE DAMAGED!
The following sections provide more detail on each feature and components on the
BOARD HARDWARE USER ANUAL v1.21
ISEE 2007 SL.
The following is
10/26/2010
8
(dual slave and host
role)
socket connector (standard USB host)
(SD and SDHC cards supported)
ideo and TS lines
are
all plug or JST Connector
Power 5V and 1.8V, UART, cBSP, cSPI, I2C, GPIO,
PCB
)
(RJ45 connector with led link/activity)
Industrial range (
-40 to
ISEE
sales)
WITH 5V
DC
OR THE BOARD WILL BE DAMAGED!
The following sections provide more detail on each feature and components on the

IGEPv2
ISEE 2007 SL.
All rights reserved
provided for informational
purposes only
DOCU ENT FRO ISEE 2007 S.L.
3.1 ISEE IGEPV2
BOARD GENERAL SPECIF
OMAP Pr cess r
The IGEPv2
BOARD uses the O AP3530 version ES3.
memory POP package
on it
POP (Package on Package) is a technique where the memory, NAND and SDRA ,
are mounted on top of the O AP3530. For this reason, when looking at the
BOARD, yo
u will not find an actual part labeled O AP3530.
Mem ry
The
memory is mounted on top of the processor as mentioned. The key function of
the POP memory is to provide:
•4Gb NAND x 16 (
512
•4Gb LP-
DDR SDRA x32
P wer Management
The TPS65950 is used on the board to provide power to the
exception of the 3.3V regulator which is used to provide power to the DVI
encoder and RS232 driver. In addition to the power it also provid
•Stereo Audio Out
•Stereo Audio in
•Power on reset
•USB OTG PHY
•Status LED
No se pude mostrar la ima en vinculada. Puede que se haya mov ido, cambiado de nombr e o eliminado el archivo . Compruebe q ue el vínculo señala al archivo y ub icaciones correctos.
IGEPv2
BOARD HARDWARE USER ANUAL v1.21
All rights reserved
, IGEP® is a registered trademark from
ISEE 2007 SL.
purposes only
.
DOCU ENT FRO ISEE 2007 S.L.
AN-PR-IGEP.0020-001.21.HW_RC
BOARD GENERAL SPECIF
ICATIONS
BOARD uses the O AP3530 version ES3.
1
and comes in a
on it
.
POP (Package on Package) is a technique where the memory, NAND and SDRA ,
are mounted on top of the O AP3530. For this reason, when looking at the
u will not find an actual part labeled O AP3530.
Figure 1 POP Package
memory is mounted on top of the processor as mentioned. The key function of
the POP memory is to provide:
512
B)
DDR SDRA x32
(512 B @ 200 Hz)
The TPS65950 is used on the board to provide power to the
IGEPv2
exception of the 3.3V regulator which is used to provide power to the DVI
encoder and RS232 driver. In addition to the power it also provid
es:
No se pude mostrar la ima en vinculada. Puede que se haya mov ido, cambiado de nombr e o eliminado el archivo . Compruebe q ue el vínculo señala al archivo y ub icaciones correctos.
BOARD HARDWARE USER ANUAL v1.21
ISEE 2007 SL.
The following is
10/26/2010
9
and comes in a
0.4mm pitch
POP (Package on Package) is a technique where the memory, NAND and SDRA ,
are mounted on top of the O AP3530. For this reason, when looking at the
IGEPv2
memory is mounted on top of the processor as mentioned. The key function of
IGEPv2
Board with the
exception of the 3.3V regulator which is used to provide power to the DVI
-D

IGEPv2
ISEE 2007 SL.
All rights reserved
provided for informational
purposes only
DOCU ENT FRO ISEE 2007 S.L.
USB 2.0 LS/FS/HS OTG
On the board a single USB 2.0 OT
It is not possible to power the board with the OTG
USB 2.0 HS HOST
On the board a single
USB 2.0 HS
connector. Hardware
provides power on/off
current limit at 5V.
USB HOST Port
supports o
HS devices). In order to support low speed
LS devices) or full speed devices (USB 1.
be used.
WIFI
IEEE802.11b/g compliant
.
Chipset based on
arvell 88W8686
operating at 2.4GHz, a physical layer, a media access controller, and an AR
processor into a single die
BLUETOOTH
Bluetooth 2.0 compliant.
Class 2,
2.5 mW (4 dBm) ~10 meters
Version 2.0 + EDR 3 b
it/s
ETHERNET
A
RJ45 connector is provided for the Ethernet
interface.
There is a EEPRO (U830) memory for AC configuration (Not populated).
NOTE: Contact
ISEE sales for custom assembly boards
IGEPv2
BOARD HARDWARE USER ANUAL v1.21
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, IGEP® is a registered trademark from
ISEE 2007 SL.
purposes only
.
DOCU ENT FRO ISEE 2007 S.L.
AN-PR-IGEP.0020-001.21.HW_RC
USB 2.0 LS/FS/HS OTG
On the board a single USB 2.0 OT
G Port is provided.
Figure 2
USB OTG c nnect r
It is not possible to power the board with the OTG
connector.
USB 2.0 HS
HOST port
is provided via a USB Type A
provides power on/off
switch
control and up to 500mA of
Figure 3 USB HOST c nnect r
supports o
nly high speed devices (USB 2.0
HS devices). In order to support low speed
devices (USB 1.0
LS devices) or full speed devices (USB 1.
1 FS devices),
external USB 2.0
.
arvell 88W8686
. T
he 88W8686 integrates a RF transceiver
operating at 2.4GHz, a physical layer, a media access controller, and an AR
processor into a single die
.
2.5 mW (4 dBm) ~10 meters
it/s
RJ45 connector is provided for the Ethernet
Auto-
DIX Full Duplex
There is a EEPRO (U830) memory for AC configuration (Not populated).
ISEE sales for custom assembly boards
.
BOARD HARDWARE USER ANUAL v1.21
ISEE 2007 SL.
The following is
10/26/2010
10
USB OTG c nnect r
is provided via a USB Type A
socket
control and up to 500mA of
external USB 2.0
HUB must
he 88W8686 integrates a RF transceiver
operating at 2.4GHz, a physical layer, a media access controller, and an AR
DIX Full Duplex
10/100 Base T
There is a EEPRO (U830) memory for AC configuration (Not populated).

IGEPv2
ISEE 2007 SL.
All rights reserved
provided for informational
purposes only
DOCU ENT FRO ISEE 2007 S.L.
This connectors come
with link and activity status led.
Stere Audi Output C nnect r
A 3.5mm standard stereo output audio jack is provided to access the stereo output
of the onboard audio CODEC. The Audio CODEC
Figure
Stere Audi In c nnect r
A 3.5mm standard stereo audio input jack is provided to access the stereo
the onboard audio CODEC.
Figure
IGEPv2
BOARD HARDWARE USER ANUAL v1.21
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ISEE 2007 SL.
purposes only
.
DOCU ENT FRO ISEE 2007 S.L.
AN-PR-IGEP.0020-001.21.HW_RC
Figure 4 ETHERNET c nnect r
with link and activity status led.
Stere Audi Output C nnect r
A 3.5mm standard stereo output audio jack is provided to access the stereo output
of the onboard audio CODEC. The Audio CODEC
is provided by the TPS65950.
Figure
5 Stere Output c nnect r l cati n
Stere Audi In c nnect r
A 3.5mm standard stereo audio input jack is provided to access the stereo
the onboard audio CODEC.
Figure
6 Stere Input c nnect r l cati n
BOARD HARDWARE USER ANUAL v1.21
ISEE 2007 SL.
The following is
10/26/2010
11
A 3.5mm standard stereo output audio jack is provided to access the stereo output
is provided by the TPS65950.
A 3.5mm standard stereo audio input jack is provided to access the stereo
input of

IGEPv2
ISEE 2007 SL.
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provided for informational
purposes only
DOCU ENT FRO ISEE 2007 S.L.
DVI-D C nnect r
The IGEPv2
BOARD can drive a LCD panel equipped with a DVI
is the standard LCD panel interface of the O AP3530.
DDC2B (Display Data Channel) or EDID (Enhanced Display ID) support over I2C i
provided in order to allow
The IGEPv2 BOARD
does not support the full HD I interface and is used to
the DVI-
D interface portion only. The user must use a HD I to DVI
adapter to connect to a LCD monitor. A standard HD I cable can be used when
connecting to a monitor with and HD I connector.
LCD and t uchscreen h
eader
A pair of 1.27mm pitch 2x10 headers are provided to
signals
and touchscreen control
boards, JA41 connector is wider and
IGEPv2 boards (Revi
sions
compatible.
This allows for the creation of LCD boards to support different LCD panels.
micr SD C nnect r
A micro
SD connector is provided
factor.
The microSD memory card
available commercially, with the lowest price per capacity
and the highest capacity. At 15 mm × 11 mm × 1 mm
(about the size of a fingernail), it is about a quarter the size
of an SD card.
The microSD connector supports
Capacity, SD 2.0) is an extension of the SD standard which increases card's storage
IGEPv2
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purposes only
.
DOCU ENT FRO ISEE 2007 S.L.
AN-PR-IGEP.0020-001.21.HW_RC
BOARD can drive a LCD panel equipped with a DVI
-
D digital input. This
is the standard LCD panel interface of the O AP3530.
Figure 7 HDMI c nnect r
DDC2B (Display Data Channel) or EDID (Enhanced Display ID) support over I2C i
the identification of the LCD monitor type and settings.
does not support the full HD I interface and is used to
D interface portion only. The user must use a HD I to DVI
adapter to connect to a LCD monitor. A standard HD I cable can be used when
connecting to a monitor with and HD I connector.
eader
A pair of 1.27mm pitch 2x10 headers are provided to
have
access to the LCD
and touchscreen control
(IGEPv2 Revision B boards).
On IGEPv2 Revision C
boards, JA41 connector is wider and
enhanced with additional
LCD bits depth. All
sions
B and C) are mechanical, electrical and logical
This allows for the creation of LCD boards to support different LCD panels.
SD connector is provided
for microSD cards form
The microSD memory card
is the smallest memory card
available commercially, with the lowest price per capacity
and the highest capacity. At 15 mm × 11 mm × 1 mm
(about the size of a fingernail), it is about a quarter the size
The microSD connector supports
SD and SDHC cards
. SDHC (Secure Digital High
Capacity, SD 2.0) is an extension of the SD standard which increases card's storage
BOARD HARDWARE USER ANUAL v1.21
ISEE 2007 SL.
The following is
10/26/2010
12
D digital input. This
DDC2B (Display Data Channel) or EDID (Enhanced Display ID) support over I2C i
s
the identification of the LCD monitor type and settings.
does not support the full HD I interface and is used to
provide
D interface portion only. The user must use a HD I to DVI
-D cable or
adapter to connect to a LCD monitor. A standard HD I cable can be used when
access to the LCD
On IGEPv2 Revision C
LCD bits depth. All
B and C) are mechanical, electrical and logical
This allows for the creation of LCD boards to support different LCD panels.
. SDHC (Secure Digital High
Capacity, SD 2.0) is an extension of the SD standard which increases card's storage

IGEPv2
ISEE 2007 SL.
All rights reserved
provided for informational
purposes only
DOCU ENT FRO ISEE 2007 S.L.
capacity up to 32GB. SDHC cards shares the same physical and electrical form
factor as older (SD 1.x) cards, allowing SDHC
cards and older SD-
cards.
RS232
IGEPv2 Revision B boards provide
IGEPv2 Revision C boards provide both UART1 and UART3 with RS232 levels on
J960. [Contact ISEE sales
RS485
The IGEPv2 board comes with 1 x RS485 on
IGEPv2 Revision B are default populated.
default populated. [
Contact ISEE sales
feature].
ANALOG TO DIGITAL CONVERTER (
The IGEPv2 BOARD
could come
The analog signal inputs from U.FL HIROSE connector (located at the bottom) or
two 2,54mm pins header.
Several ADC
devices can be populated. For example:
•ADC-SPI 3 Sps 3
V
•ADC-
SPI 1 Sps 5VDC (ADC121S101)
Indicat rs
There are two bicolor LEDs on the Board that can be controlled by the user.
are like 4 individual leds and 16 color schemes
•Three leds are
controlled via GPIO pins
•
One is programmed via the I2C interface on the TPS65950
P wer C nnect r
Power will be supplied via the DC power jack
JTAG C nnect r
A 14 pin JTAG header is provided on the
and debugging of the board by using various JTAG emulators. The interface is at
1.8V on all signals.
Only 1.8V C OS l
JTAG header t 3.3V.
Expansi n Header
IGEPv2
BOARD HARDWARE USER ANUAL v1.21
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ISEE 2007 SL.
purposes only
.
DOCU ENT FRO ISEE 2007 S.L.
AN-PR-IGEP.0020-001.21.HW_RC
capacity up to 32GB. SDHC cards shares the same physical and electrical form
factor as older (SD 1.x) cards, allowing SDHC
-devices to support b
oth newer SDHC
cards.
IGEPv2 Revision B boards provide
only
UART3 with RS232 levels on J960.
IGEPv2 Revision C boards provide both UART1 and UART3 with RS232 levels on
for custom assembly boards for UART2 port
The IGEPv2 board comes with 1 x RS485 on
JST
connector J940
IGEPv2 Revision B are default populated.
On IGEPv2 Revision C
, RS485
Contact ISEE sales
for custom assembl
y boards for
ANALOG TO DIGITAL CONVERTER (
A/D)
could come
with one
ADC (Analog to digital converter) device.
The analog signal inputs from U.FL HIROSE connector (located at the bottom) or
devices can be populated. For example:
V
3 (LTC2366)
SPI 1 Sps 5VDC (ADC121S101)
There are two bicolor LEDs on the Board that can be controlled by the user.
are like 4 individual leds and 16 color schemes
controlled via GPIO pins
on the O AP3530 Processor
One is programmed via the I2C interface on the TPS65950
Power will be supplied via the DC power jack
(or via JST connector
J940
A 14 pin JTAG header is provided on the
board to facilitate the SW development
and debugging of the board by using various JTAG emulators. The interface is at
Only 1.8V C OS l
evels are supported.
DO NOT exp se the
BOARD HARDWARE USER ANUAL v1.21
ISEE 2007 SL.
The following is
10/26/2010
13
capacity up to 32GB. SDHC cards shares the same physical and electrical form
oth newer SDHC
UART3 with RS232 levels on J960.
IGEPv2 Revision C boards provide both UART1 and UART3 with RS232 levels on
for custom assembly boards for UART2 port
]
connector J940
(UART1). On
, RS485
are not
y boards for
RS485
ADC (Analog to digital converter) device.
The analog signal inputs from U.FL HIROSE connector (located at the bottom) or
There are two bicolor LEDs on the Board that can be controlled by the user.
In total
on the O AP3530 Processor
J940
).
board to facilitate the SW development
and debugging of the board by using various JTAG emulators. The interface is at
DO NOT exp se the

IGEPv2
ISEE 2007 SL.
All rights reserved
provided for informational
purposes only
DOCU ENT FRO ISEE 2007 S.L.
An option for a single
28 pin header is provided o
connection of various expansion cards that could be developed by the users or
other sources. Due to multiplexing, different signals can be provided on each pin
providing more that 24 actual signal access
IGEPv2
BOARD HARDWARE USER ANUAL v1.21
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, IGEP® is a registered trademark from
ISEE 2007 SL.
purposes only
.
DOCU ENT FRO ISEE 2007 S.L.
AN-PR-IGEP.0020-001.21.HW_RC
28 pin header is provided o
n the board to allow
connection of various expansion cards that could be developed by the users or
other sources. Due to multiplexing, different signals can be provided on each pin
providing more that 24 actual signal access
es.
BOARD HARDWARE USER ANUAL v1.21
ISEE 2007 SL.
The following is
10/26/2010
14
n the board to allow
the
connection of various expansion cards that could be developed by the users or
other sources. Due to multiplexing, different signals can be provided on each pin

IGEPv2
ISEE 2007 SL.
All rights reserved
provided for informational
purposes only
DOCU ENT FRO ISEE 2007 S.L.
3.2 SYSTE BLOCK
DIAGRA
3.2.1
IGEPV2 REVISION B BO
Figure 8
IGEPv2
ETHERNET
INTERFACE
WIFI
INTERFACE
BLUETOOTH
INTERFACE
DVI
INTERFACE
DVI digital
transmiter
ETHERNET
Controller
10/E
100
WIFI
BLUETOOTH
CO BO
Controller
IGEPv2
BOARD HARDWARE USER ANUAL v1.21
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, IGEP® is a registered trademark from
ISEE 2007 SL.
purposes only
.
DOCU ENT FRO ISEE 2007 S.L.
AN-PR-IGEP.0020-001.21.HW_RC
DIAGRA
IGEPV2 REVISION B BO
ARD SERIES BLOCK DIA
GRA
IGEPv2
Revisi n B b ard series bl ck diagram
O AP3530
USB HOST
HS
microSD
INTERFACE
JTAG
INTERFACE
TPS65950
DVI digital
transmiter
ETHERNET
Controller
100
WIFI
-
BLUETOOTH
CO BO
Controller
RS485
INTERFACE
RS485
DRIVER
EXPANSION
INTERFACE
BOARD HARDWARE USER ANUAL v1.21
ISEE 2007 SL.
The following is
10/26/2010
15
GRA
USB-OTG
LS/FS/HS
STEREO-IN
STEREO-OUT
KEYBOARD

IGEPv2
ISEE 2007 SL.
All rights reserved
provided for informational
purposes only
DOCU ENT FRO ISEE 2007 S.L.
3.2.2
IGEPV2 REVISION
Figure 9
IGEPv2 Revisi n C b ard series bl ck diagram
JTAG
INTERFACE
ETHERNET
INTERFACE
WIFI
INTERFACE
BLUETOOTH
INTERFACE
DVI
INTERFACE
DVI digital
transmiter
ETHERNET
Controller
10/E
100
WIFI
BLUETOOTH
CO BO
Controller
CA ERA
INTERFACE
IGEPv2
BOARD HARDWARE USER ANUAL v1.21
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, IGEP® is a registered trademark from
ISEE 2007 SL.
purposes only
.
DOCU ENT FRO ISEE 2007 S.L.
AN-PR-IGEP.0020-001.21.HW_RC
IGEPV2 REVISION
C BOARD SERIES BLOCK D
IAGRA
IGEPv2 Revisi n C b ard series bl ck diagram
O AP3530
USB HOST
HS
microSD
INTERFACE
INTERFACE
TPS65950
DVI digital
transmiter
ETHERNET
Controller
100
WIFI
-
BLUETOOTH
CO BO
Controller
RS485
INTERFACE
RS485
DRIVER
EXPANSION
INTERFACE
RS232
DRIVER
RS232
INTERFACE
RTC
Backup
Battery
BOARD HARDWARE USER ANUAL v1.21
ISEE 2007 SL.
The following is
10/26/2010
16
IAGRA
USB-OTG
LS/FS/HS
STEREO-IN
STEREO-OUT
KEYBOARD

IGEPv2
ISEE 2007 SL.
All rights reserved
provided for informational
purposes only
DOCU ENT FRO ISEE 2007 S.L.
3.2.3
IGEPV2 REVISION
ain goals of new IGEPv2 revision C series are:
•
RTC Battery Backup for TPS65950 (Super Capacitor or Rechargeable
Battery)
•Updated
TFT interface from 18bit to 24bit
•
New Camera Connector (full O AP interface on a new 28pin header
connector)
•Optional
high speed 3 Bps ADC
•
Added second RS232 UART on J960 (Now 2 UARTs on J960
•Changed JD22
from GSC urata connector to Hirose U.FL connector
•Added optional
second external antenna
•
New GPIO to physically reset BT module
•Added resistors
for hardware UART selection
•Non-
populated parts:
o
J400 JTAG connector
o
J990: GPIO expansion connector
o
J970: 4x4 keyboard connector
o
JD22: External wifi antenna connector
o
JA41 and JA42: TFT interface
o
JC30: Camera
o
UC20 3 Bps ADC + JC21 Hirose connect
Contact ISEE sales for custom assembly boards
revision B compatible (mechanical, electrical and lo ical) on IGEP0020
RCx PCBs.
IGEPv2
BOARD HARDWARE USER ANUAL v1.21
All rights reserved
, IGEP® is a registered trademark from
ISEE 2007 SL.
purposes only
.
DOCU ENT FRO ISEE 2007 S.L.
AN-PR-IGEP.0020-001.21.HW_RC
IGEPV2 REVISION
C BOARD SERIES
I PROVE ENTS
ain goals of new IGEPv2 revision C series are:
RTC Battery Backup for TPS65950 (Super Capacitor or Rechargeable
TFT interface from 18bit to 24bit
.
New Camera Connector (full O AP interface on a new 28pin header
high speed 3 Bps ADC
(Hirose U.FL connector
or two pin
Added second RS232 UART on J960 (Now 2 UARTs on J960
,
UART3+UART1)
from GSC urata connector to Hirose U.FL connector
second external antenna
(
Hirose U.FL connector
New GPIO to physically reset BT module
for hardware UART selection
populated parts:
J400 JTAG connector
J990: GPIO expansion connector
J970: 4x4 keyboard connector
JD22: External wifi antenna connector
JA41 and JA42: TFT interface
JC30: Camera
interface
UC20 3 Bps ADC + JC21 Hirose connect
or
Contact ISEE sales for custom assembly boards
for fully
previous
revision B compatible (mechanical, electrical and lo ical) on IGEP0020
BOARD HARDWARE USER ANUAL v1.21
ISEE 2007 SL.
The following is
10/26/2010
17
I PROVE ENTS
RTC Battery Backup for TPS65950 (Super Capacitor or Rechargeable
New Camera Connector (full O AP interface on a new 28pin header
or two pin
header)
UART3+UART1)
from GSC urata connector to Hirose U.FL connector
Hirose U.FL connector
)
previous
IGEPv2
revision B compatible (mechanical, electrical and lo ical) on IGEP0020
-

IGEPv2
ISEE 2007 SL.
All rights reserved
provided for informational
purposes only
DOCU ENT FRO ISEE 2007 S.L.
3.3 GENERAL VIEW
3.3.1
IGEPV2 REVISION
Figure 10
Figure 11
IGEPv2 revisi n B b ard b tt m side c mp nents
IGEPv2
BOARD HARDWARE USER ANUAL v1.21
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, IGEP® is a registered trademark from
ISEE 2007 SL.
purposes only
.
DOCU ENT FRO ISEE 2007 S.L.
AN-PR-IGEP.0020-001.21.HW_RC
IGEPV2 REVISION
B BOARD SERIES VIEW
IGEPv2 revisi n B b ard t p side c mp nents
IGEPv2 revisi n B b ard b tt m side c mp nents
BOARD HARDWARE USER ANUAL v1.21
ISEE 2007 SL.
The following is
10/26/2010
18
IGEPv2 revisi n B b ard b tt m side c mp nents

IGEPv2
ISEE 2007 SL.
All rights reserved
provided for informational
purposes only
DOCU ENT FRO ISEE 2007 S.L.
3.3.2
IGEPV2 REVISION
Figure 12
Figure 13
IGEPv2
IGEPv2
BOARD HARDWARE USER ANUAL v1.21
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, IGEP® is a registered trademark from
ISEE 2007 SL.
purposes only
.
DOCU ENT FRO ISEE 2007 S.L.
AN-PR-IGEP.0020-001.21.HW_RC
IGEPV2 REVISION
C BOARD SERIES VIEW
IGEPv2 revisi n C b ard t p side c mp nents
IGEPv2
revisi n C b ard
b tt m side c mp nents
BOARD HARDWARE USER ANUAL v1.21
ISEE 2007 SL.
The following is
10/26/2010
19
b tt m side c mp nents

IGEPv2
ISEE 2007 SL.
All rights reserved
provided for informational
purposes only
DOCU ENT FRO ISEE 2007 S.L.
3.4
ECHANICAL SPECIFICA
3.4.1
IGEPV2 REVISION
Figure 14
Get echanical drawings on:
http://www.igep.es 
User enu
HW_ echanical
IGEPv2
BOARD HARDWARE USER ANUAL v1.21
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ISEE 2007 SL.
purposes only
.
DOCU ENT FRO ISEE 2007 S.L.
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ECHANICAL SPECIFICA
TION
IGEPV2 REVISION
B BOARD SERIES
ECHANICAL
IGEPv2-RB T p view mechanical specificati n
Get echanical drawings on:
User enu
 Download  01-Products 
IGEPv2
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ECHANICAL
IGEPv2
