GE MiCOM P40 Agile User manual

GE Energy Connections
Grid Solutions
MiCOM P40 Agile
P14D
Technical Manual
Feeder Management IED
Hardware Version: A
Software Version: 60
Publication Reference: P14D-TM-EN-8

Contents
Chapter 1 Introduction 1
1 Chapter Overview 3
2 Foreword 4
2.1 Target Audience 4
2.2 Typographical Conventions 4
2.3 Nomenclature 5
2.4 Compliance 5
3 Product Scope 6
3.1 Ordering Options 6
4 Features and Functions 7
4.1 Protection Functions 7
4.2 Control Functions 8
4.3 Measurement Functions 9
4.4 Communication Functions 9
5 Logic Diagrams 10
6 Functional Overview 11
Chapter 2 Safety Information 13
1 Chapter Overview 15
2 Health and Safety 16
3 Symbols 17
4 Installation, Commissioning and Servicing 18
4.1 Lifting Hazards 18
4.2 Electrical Hazards 18
4.3 UL/CSA/CUL Requirements 19
4.4 Fusing Requirements 19
4.5 Equipment Connections 20
4.6 Protection Class 1 Equipment Requirements 20
4.7 Pre-energisation Checklist 21
4.8 Peripheral Circuitry 21
4.9 Upgrading/Servicing 22
5 Decommissioning and Disposal 23
6 Regulatory Compliance 24
6.1 EMC Compliance: 2014/30/EU 24
6.2 LVD Compliance: 2014/35/EU 24
6.3 R&TTE Compliance: 2014/53/EU 24
6.4 UL/CUL Compliance 24
6.5 ATEX Compliance: 2014/34/EU 24
Chapter 3 Hardware Design 27
1 Chapter Overview 29
2 Hardware Architecture 30
2.1 Memory and Real Time Clock 30
3 Mechanical Implementation 31
3.1 Housing Variants 31
3.2 20TE Rear Panel 32
3.3 30TE Rear Panel 32
4 Terminal Connections 35
4.1 I/O Options 35
5 Front Panel 36
5.1 20TE Front Panel 36

5.2 30TE Front Panel 37
5.3 Keypad 37
5.4 Liquid Crystal Display 38
5.5 USB Port 38
5.6 Fixed Function LEDs 39
5.7 Function Keys 39
5.8 Programable LEDs 39
Chapter 4 Software Design 41
1 Chapter Overview 43
2 Software Design Overview 44
3 System Level Software 45
3.1 Real Time Operating System 45
3.2 System Services Software 45
3.3 Self-Diagnostic Software 45
3.4 Startup Self-Testing 45
3.4.1 System Boot 45
3.4.2 System Level Software Initialisation 46
3.4.3 Platform Software Initialisation and Monitoring 46
3.5 Continuous Self-Testing 46
4 Platform Software 47
4.1 Record Logging 47
4.2 Settings Database 47
4.3 Interfaces 47
5 Protection and Control Functions 48
5.1 Acquisition of Samples 48
5.2 Frequency Tracking 48
5.3 Fourier Signal Processing 48
5.4 Programmable Scheme Logic 49
5.5 Event Recording 49
5.6 Disturbance Recorder 50
5.7 Fault Locator 50
5.8 Function Key Interface 50
Chapter 5 Configuration 51
1 Chapter Overview 53
2 Settings Application Software 54
3 Using the HMI Panel 55
3.1 Navigating the HMI Panel 56
3.2 Getting Started 56
3.3 Default Display 57
3.4 Default Display Navigation 58
3.5 Password Entry 59
3.6 Processing Alarms and Records 59
3.7 Menu Structure 60
3.8 Changing the Settings 61
3.9 Direct Access (The Hotkey menu) 62
3.9.1 Setting Group Selection Using Hotkeys 62
3.9.2 Control Inputs 62
3.9.3 Circuit Breaker Control 63
3.10 Function Keys 63
4 Date and Time Configuration 65
4.1 Time Zone Compensation 65
4.2 Daylight Saving Time Compensation 65
5 Settings Group Selection 66
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Chapter 6 Current Protection Functions 67
1 Chapter Overview 69
2 Overcurrent Protection Principles 70
2.1 IDMT Characteristics 70
2.1.1 IEC 60255 IDMT Curves 71
2.1.2 European Standards 73
2.1.3 North American Standards 74
2.1.4 IEC and IEEE Inverse Curves 76
2.1.5 Differences Between the North american and European Standards 77
2.1.6 Programmable Curves 77
2.2 Principles of Implementation 77
2.2.1 Timer Hold Facility 78
3 Phase Overcurrent Protection 80
3.1 Phase Overcurrent Protection Implementation 80
3.2 Non-Directional Overcurrent Logic 81
3.3 Directional Element 82
3.3.1 Directional Overcurrent Logic 84
3.4 Phase Overcurrent Settings for Model H 84
3.5 Application Notes 85
3.5.1 Parallel Feeders 85
3.5.2 Ring Main Arrangements 86
3.5.3 Setting Guidelines 86
3.5.4 Setting Guidelines (Directional Element) 87
4 Voltage Dependent Overcurrent Element 88
4.1 Voltage Dependent Overcurrent Protection Implementation 88
4.1.1 Voltage Controlled Overcurrent Protection 88
4.1.2 Voltage Restrained Overcurrent Protection 89
4.2 Voltage Dependent Overcurrent Logic 90
4.3 Application Notes 90
4.3.1 Setting Guidelines 90
5 Current Setting Threshold Selection 92
6 Negative Sequence Overcurrent Protection 93
6.1 Negative Sequence Overcurrent Protection Implementation 93
6.2 Non-Directional Negative Sequence Overcurrent Logic 94
6.3 Directional Element 94
6.3.1 Directional Negative Sequence Overcurrent Logic 94
6.4 Application Notes 95
6.4.1 Setting Guidelines (Current Threshold) 95
6.4.2 Setting Guidelines (Time Delay) 95
6.4.3 Setting Guidelines (Directional element) 95
7 Earth Fault Protection 97
7.1 Earth Fault Protection Elements 97
7.2 Non-directional Earth Fault Logic 98
7.3 IDG Curve 98
7.4 Directional Element 99
7.4.1 Residual Voltage Polarisation 99
7.4.2 Negative Sequence Polarisation 101
7.5 Application Notes 102
7.5.1 Setting Guidelines (Directional Element) 102
7.5.2 Peterson Coil Earthed Systems 103
7.5.3 Setting Guidelines (Compensated networks) 106
8 Sensitive Earth Fault Protection 107
8.1 SEF Protection Implementation 107
8.2 Non-directional SEF Logic 107
8.3 EPATR B Curve 108
8.4 Directional Element 108
8.4.1 Wattmetric Characteristic 109
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8.4.2 Icos phi / Isin phi characteristic 110
8.4.3 Directional SEF Logic 112
8.5 Application Notes 112
8.5.1 Insulated Systems 112
8.5.2 Setting Guidelines (Insulated Systems) 114
9 Cold Load Pickup 116
9.1 Implementation 116
9.2 CLP Logic 116
9.3 Application Notes 117
9.3.1 CLP for Resistive Loads 117
9.3.2 CLP for Motor Feeders 117
9.3.3 CLP for Switch Onto Fault Conditions 117
10 Selective Logic 118
10.1 Selective Logic Implementation 118
10.2 Selective Logic Diagram 118
11 Timer Setting Selection 120
12 Thermal Overload Protection 121
12.1 Single Time Constant Characteristic 121
12.2 Dual Time Constant Characteristic 121
12.3 Thermal Overload Protection Implementation 122
12.4 Thermal Overload Protection Logic 122
12.5 Application Notes 122
12.5.1 Setting Guidelines for Dual Time Constant Characteristic 122
12.5.2 Setting Guidelines for Single Time Constant Characteristic 124
13 Broken Conductor Protection 126
13.1 Broken Conductor Protection Implementation 126
13.2 Broken Conductor Protection Logic 126
13.3 Application Notes 126
13.3.1 Setting Guidelines 126
14 Blocked Overcurrent Protection 128
14.1 Blocked Overcurrent Implementation 128
14.2 Blocked Overcurrent Logic 128
14.3 Blocked Earth Fault Logic 128
14.4 Application Notes 129
14.4.1 Busbar Blocking Scheme 129
15 Second Harmonic Blocking 131
15.1 Second Harmonic Blocking Implementation 131
15.2 Second Harmonic Blocking Logic (POC Input) 132
15.3 Application Notes 132
15.3.1 Setting Guidelines 132
16 Load Blinders 133
16.1 Load Blinder Implementation 133
16.2 Load Blinder Logic 134
17 Neutral Admittance Protection 136
17.1 Neutral Admittance Operation 136
17.2 Conductance Operation 136
17.3 Susceptance Operation 137
18 High Impedance Fault Detection 139
18.1 High Impedance Fault Protection Implementation 139
18.1.1 Fundamental Analysis 139
18.1.2 Component Harmonic Analysis 140
18.1.3 Directional Analysis 140
18.1.4 Summary 141
18.2 High Impedance Fault Protection Logic 142
Chapter 7 Restricted Earth Fault Protection 143
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1 Chapter Overview 145
2 REF Protection Principles 146
2.1 Resistance-Earthed Star Windings 147
2.2 Solidly-Earthed Star Windings 147
2.3 Through Fault Stability 148
2.4 Restricted Earth Fault Types 148
2.4.1 Low Impedance REF Principle 148
2.4.2 High Impedance REF Principle 149
3 Restricted Earth Fault Protection Implementation 151
3.1 Restricted Earth Fault Protection Implementation 151
3.2 Low Impedance REF 151
3.2.1 Setting the Bias Characteristic 151
3.2.2 Delayed Bias 152
3.2.3 Transient Bias 152
3.3 High Impedance REF 152
3.3.1 High Impedance REF Calculation Principles 152
4 Application Notes 154
4.1 Star Winding Resistance Earthed 154
4.2 Low Impedance REF Protection Application 155
4.2.1 Setting Guidelines for Biased Operation 155
4.2.2 Low Impedance REF Scaling Factor 155
4.2.3 Parameter Calculations 155
4.3 High Impedance REF Protection Application 156
4.3.1 High Impedance REF Operating Modes 156
4.3.2 Setting Guidelines for High Impedance Operation 157
Chapter 8 CB Fail Protection 161
1 Chapter Overview 163
2 Circuit Breaker Fail Protection 164
3 Circuit Breaker Fail Implementation 165
3.1 Circuit Breaker Fail Timers 165
3.2 Zero Crossing Detection 165
4 Circuit Breaker Fail Logic 167
5 Undercurrent and ZCD Logic for CB Fail 169
6 CB Fail SEF Protection Logic 170
7 CB Fail Non Current Protection Logic 171
8 Circuit Breaker Mapping 172
9 Application Notes 173
9.1 Reset Mechanisms for CB Fail Timers 173
9.2 Setting Guidelines (CB fail Timer) 173
9.3 Setting Guidelines (Undercurrent) 174
Chapter 9 Current Transformer Requirements 175
1 Chapter Overview 177
2 CT requirements 178
2.1 Phase Overcurrent Protection 178
2.1.1 Directional Elements 178
2.1.2 Non-directional Elements 178
2.2 Earth Fault Protection 179
2.2.1 Directional Elements 179
2.2.2 Non-directional Elements 179
2.3 SEF Protection (Residually Connected) 179
2.3.1 Directional Elements 179
2.3.2 Non-directional Elements 179
2.4 SEF Protection (Core-Balanced CT) 180
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2.4.1 Directional Elements 180
2.4.2 Non-directional Elements 180
2.5 Low Impedance REF Protection 180
2.6 High Impedance REF Protection 180
2.7 High Impedance Busbar Protection 181
2.8 Use of Metrosil Non-linear Resistors 181
2.9 Use of ANSI C-class CTs 183
Chapter 10 Voltage Protection Functions 185
1 Chapter Overview 187
2 Undervoltage Protection 188
2.1 Undervoltage Protection Implementation 188
2.2 Undervoltage Protection Logic 189
2.3 Application Notes 190
2.3.1 Undervoltage Setting Guidelines 190
3 Overvoltage Protection 191
3.1 Overvoltage Protection Implementation 191
3.2 Overvoltage Protection Logic 192
3.3 Application Notes 192
3.3.1 Overvoltage Setting Guidelines 192
4 Rate of Change of Voltage Protection 194
4.1 Rate of Change of Voltage Protection Implementation 194
4.2 Rate of Change of Voltage Logic 194
5 Residual Overvoltage Protection 196
5.1 Residual Overvoltage Protection Implementation 196
5.2 Residual Overvoltage Logic 197
5.3 Application Notes 197
5.3.1 Calculation for Solidly Earthed Systems 197
5.3.2 Calculation for Impedance Earthed Systems 198
5.3.3 Neutral Voltage Displacement (Nvd) Protection Applied To Condenser Bushings (Capacitor Cones) 199
5.3.4 Setting Guidelines 203
6 Negative Sequence Overvoltage Protection 204
6.1 Negative Sequence Overvoltage Implementation 204
6.2 Negative Sequence Overvoltage Logic 204
6.3 Application Notes 204
6.3.1 Setting Guidelines 204
7 Positive Sequence Undervoltage Protection 206
7.1 Positive Sequence Undervoltage Implementation 206
7.2 Positive Sequence Undervoltage Logic 206
8 Positive Sequence Overvoltage Protection 207
8.1 Positive Sequence Overvoltage Implementation 207
8.2 Positive Sequence Overvoltage Logic 207
9 Moving Average Voltage Functions 208
9.1 Moving Average Undervoltage Logic 208
9.2 Moving Average Overvoltage Logic 209
9.3 Moving Average Zero Sequence Voltage Logic 209
9.4 Moving Average Positive Sequence Voltage Logic 209
9.5 Moving Average Negative Sequence Voltage Logic 210
9.6 Moving Average Undervoltage Blocking PSL 210
10 Voltage Vector Shift Protection 211
10.1 Application Notes 211
10.2 Voltage Vector Shift Calculations 211
Chapter 11 Frequency Protection Functions 215
1 Chapter Overview 217
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2 Frequency Protection Overview 218
2.1 Frequency Protection Implementation 218
3 Underfrequency Protection 219
3.1 Underfrequency Protection Implementation 219
3.2 Underfrequency Protection Logic 219
3.3 Application Notes 219
3.3.1 Setting Guidelines 219
4 Overfrequency Protection 221
4.1 Overfrequency Protection Implementation 221
4.2 Overfrequency Protection Logic 221
4.3 Application Notes 221
4.3.1 Setting Guidelines 221
5 Independent R.O.C.O.F Protection 223
5.1 Indepenent R.O.C.O.F Protection Implementation 223
5.2 Independent R.O.C.O.F Protection Logic 223
5.3 Application Notes 224
5.3.1 Setting Guidelines 224
6 Frequency-supervised R.O.C.O.F Protection 225
6.1 Frequency-supervised R.O.C.O.F Implementation 225
6.2 Frequency-supervised R.O.C.O.F Logic 226
6.3 Application Notes 226
6.3.1 Frequency-Supervised R.O.C.O.F Example 226
6.3.2 Setting Guidelines 227
7 Average Rate of Change of Frequency Protection 228
7.1 Average R.O.C.O.F Protection Implementation 228
7.2 Average R.O.C.O.F Logic 229
7.3 Application Notes 229
7.3.1 Setting Guidelines 229
8 Load Shedding and Restoration 231
8.1 Load Restoration Implementation 231
8.2 Holding Band 231
8.3 Load Restoration Logic 233
8.4 Application Notes 234
8.4.1 Setting Guidelines 234
Chapter 12 Power Protection Functions 235
1 Chapter Overview 237
2 Overpower Protection 238
2.1 Overpower Protection Implementation 238
2.2 Overpower Logic 238
2.3 Application Notes 239
2.3.1 Forward Overpower Setting Guidelines 239
2.3.2 Reverse Power Considerations 239
2.3.3 Reverse Overpower Setting Guidelines 239
3 Underpower Protection 241
3.1 Underpower Protection Implementation 241
3.2 Underpower Logic 242
3.3 Application Notes 242
3.3.1 Low Forward Power Considerations 242
3.3.2 Low Forward Power Setting Guidelines 242
4 Sensitive Power Protection 244
4.1 Sensitive Power Protection Implementation 244
4.2 Sensitive Power Measurements 244
4.3 Sensitive Power Logic 245
4.4 Application Notes 245
4.4.1 Sensitive Power Calculation 245
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4.4.2 Sensitive Power Setting Guidelines 247
5 Wattmetric Directional Earth Fault Protection 248
5.1 WDE Implementation 249
5.2 WDE Logic 249
Chapter 13 Autoreclose 251
1 Chapter Overview 253
2 Introduction to 3-phase Autoreclose 254
3 Implementation 255
4 Autoreclose Function Inputs 256
4.1 CB Healthy 256
4.2 Block AR 256
4.3 Reset Lockout 256
4.4 AR Auto Mode 256
4.5 AR LiveLine Mode 256
4.6 Telecontrol Mode 256
4.7 Live/Dead Ccts OK (Live/Dead Circuits OK) 256
4.8 AR Sys Checks (AR System Checks) 256
4.9 Ext AR Prot Trip (External AR Protection Trip) 257
4.10 Ext AR Prot Start (External AR Protection Start) 257
4.11 DAR Complete (Delayed Autoreclose Complete) 257
4.12 CB in Service (Circuit Breaker in Service) 257
4.13 AR Restart 257
4.14 DT OK To Start (Dead Time OK to Start) 257
4.15 DeadTime Enabled 257
4.16 AR Init TripTest (Initiate Trip Test) 258
4.17 AR Skip Shot 1 258
4.18 Inh Reclaim Time (Inhibit Reclaim Time) 258
5 Autoreclose Function Outputs 259
5.1 AR In Progress 259
5.2 DAR In Progress 259
5.3 Sequence Counter Status DDB signals 259
5.4 Successful Close 259
5.5 AR In Service 259
5.6 AR Blk Main Prot (Block Main Protection) 259
5.7 AR Blk SEF Prot (Block SEF Protection) 259
5.8 Reclose Checks 259
5.9 DeadTime In Prog 260
5.10 DT Complete (Dead Time Complete) 260
5.11 AR Sync Check (AR Synchronisation Check) 260
5.12 AR SysChecks OK (AR System Checks OK) 260
5.13 Auto Close 260
5.14 Protection Lockt (Protection Lockout) 260
5.15 Reset Lckout Alm (Reset Lockout Alarm) 260
5.16 Reclaim In Prog 260
5.17 Reclaim Complete 260
6 Autoreclose Function Alarms 261
6.1 AR No Sys Check 261
6.2 AR CB Unhealthy 261
6.3 AR Lockout 261
7 Autoreclose Operation 262
7.1 Operating Modes 262
7.1.1 Four-Position Selector Switch Implementation 263
7.1.2 Operating Mode Selection Logic 264
7.2 Autoreclose Initiation 264
7.2.1 Start Signal Logic 265
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7.2.2 Trip Signal Logic 266
7.2.3 Blocking Signal Logic 266
7.2.4 Shots Exceeded Logic 267
7.2.5 AR Initiation Logic 267
7.3 Blocking Instantaneous Protection for Selected Trips 267
7.4 Blocking Instantaneous Protection for Lockouts 268
7.5 Dead Time Control 269
7.5.1 AR CB Close Control 270
7.6 AR System Checks 271
7.7 Reclaim Timer Initiation 272
7.8 Autoreclose Inhibit 273
7.9 Autoreclose Lockout 274
7.10 Sequence Co-ordination 275
7.11 System Checks for First Reclose 276
8 Setting Guidelines 277
8.1 Number of Shots 277
8.2 Dead Timer Setting 277
8.2.1 Stability and Synchronism Requirements 277
8.2.2 Operational Convenience 277
8.2.3 Load Requirements 278
8.2.4 Circuit Breaker 278
8.2.5 Fault De-ionisation Time 278
8.2.6 Protection Reset Time 278
8.3 Reclaim Timer Setting 279
Chapter 14 Monitoring and Control 281
1 Chapter Overview 283
2 Event Records 284
2.1 Event Types 284
2.1.1 Opto-input Events 285
2.1.2 Contact Events 285
2.1.3 Alarm Events 285
2.1.4 Fault Record Events 286
2.1.5 Security Events 286
2.1.6 Maintenance Events 286
2.1.7 Protection Events 286
2.1.8 Platform Events 287
3 Disturbance Recorder 288
4 Measurements 289
4.1 Measured Quantities 289
4.1.1 Measured and Calculated Currents 289
4.1.2 Measured and Calculated Voltages 289
4.1.3 Power and Energy Quantities 289
4.1.4 Demand Values 290
4.1.5 Frequency Measurements 290
4.1.6 Other Measurements 290
4.2 Measurement Setup 290
4.3 Fault Locator 291
4.3.1 Fault Locator Settings Example 291
4.4 Opto-input Time Stamping 291
5 CB Condition Monitoring 292
5.1 Application Notes 292
5.1.1 Setting the Thresholds for the Total Broken Current 292
5.1.2 Setting the thresholds for the Number of Operations 292
5.1.3 Setting the thresholds for the Operating Time 293
5.1.4 Setting the Thresholds for Excesssive Fault Frequency 293
6 CB State Monitoring 294
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6.1 CB State Monitoring Logic 295
7 Circuit Breaker Control 296
7.1 CB Control using the IED Menu 296
7.2 CB Control using the Hotkeys 297
7.3 CB Control using the Function Keys 297
7.4 CB Control using the Opto-inputs 298
7.5 Remote CB Control 298
7.6 Synchronisation Check 299
7.7 CB Healthy Check 299
7.8 CB Control Logic 300
8 Pole Dead Function 301
8.1 Pole Dead Logic 301
9 System Checks 302
9.1 System Checks Implementation 302
9.1.1 VT Connections 302
9.1.2 Voltage Monitoring 302
9.1.3 Check Synchronisation 303
9.1.4 Check Syncronisation Vector Diagram 303
9.1.5 System Split 304
9.2 System Check Logic 305
9.3 System Check PSL 306
9.4 Application Notes 306
9.4.1 Slip Control 306
9.4.2 Use of Check Sync 2 and System Split 306
9.4.3 Predictive Closure of Circuit Breaker 307
9.4.4 Voltage and Phase Angle Correction 307
10 Switch Status and Control 308
10.1 Switch Status Logic 309
10.2 Switch Control Logic 310
Chapter 15 Supervision 311
1 Chapter Overview 313
2 DC Supply Monitor 314
2.1 DC Supply Monitor Implementation 314
2.2 DC Supply Monitor Logic 315
3 Voltage Transformer Supervision 316
3.1 Loss of One or Two Phase Voltages 316
3.2 Loss of all Three Phase Voltages 316
3.3 Absence of all Three Phase Voltages on Line Energisation 316
3.4 VTS Implementation 317
3.5 VTS Logic 317
3.6 VTS Acceleration Indication Logic 318
4 Current Transformer Supervision 319
4.1 CTS Implementation 319
4.2 CTS Logic 319
4.3 Application Notes 319
4.3.1 Setting Guidelines 319
5 Trip Circuit Supervision 321
5.1 Trip Circuit Supervision Scheme 1 321
5.1.1 Resistor Values 321
5.1.2 PSL for TCS Scheme 1 322
5.2 Trip Circuit Supervision Scheme 2 322
5.2.1 Resistor Values 323
5.2.2 PSL for TCS Scheme 2 323
5.3 Trip Circuit Supervision Scheme 3 323
5.3.1 Resistor Values 324
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5.3.2 PSL for TCS Scheme 3 324
5.4 Trip Circuit Supervision Scheme 4 324
5.4.1 Resistor Values 325
5.4.2 PSL for TCS Scheme 4 326
Chapter 16 Digital I/O and PSL Configuration 327
1 Chapter Overview 329
2 Configuring Digital Inputs and Outputs 330
3 Scheme Logic 331
3.1 PSL Editor 332
3.2 PSL Schemes 332
3.3 PSL Scheme Version Control 332
4 Configuring the Opto-Inputs 333
5 Assigning the Output Relays 334
6 Fixed Function LEDs 335
6.1 Trip LED Logic 335
7 Configuring Programmable LEDs 336
8 Function Keys 338
9 Control Inputs 339
10 Inter-PSL Inputs and Outputs 340
Chapter 17 Communications 341
1 Chapter Overview 343
2 Communication Interfaces 344
3 Serial Communication 345
3.1 Universal Serial Bus 345
3.2 EIA(RS)485 Bus 345
3.2.1 EIA(RS)485 Biasing Requirements 346
3.3 K-Bus 346
4 Standard Ethernet Communication 348
5 Redundant Ethernet Communication 349
5.1 Supported Protocols 349
5.2 Parallel Redundancy Protocol 349
5.3 High-Availability Seamless Redundancy (HSR) 350
5.3.1 HSR Multicast Topology 350
5.3.2 HSR Unicast Topology 351
5.3.3 HSR Application in the Substation 352
5.4 Rapid Spanning Tree Protocol 352
5.5 Configuring IP Address 353
6 Data Protocols 354
6.1 Courier 354
6.1.1 Physical Connection and Link Layer 354
6.1.2 Courier Database 354
6.1.3 Settings Categories 355
6.1.4 Setting Changes 355
6.1.5 Event Extraction 355
6.1.6 Disturbance Record Extraction 357
6.1.7 Programmable Scheme Logic Settings 357
6.1.8 Time Synchronisation 357
6.1.9 Courier Configuration 357
6.2 IEC 60870-5-103 359
6.2.1 Physical Connection and Link Layer 359
6.2.2 Initialisation 359
6.2.3 Time Synchronisation 360
6.2.4 Spontaneous Events 360
6.2.5 General Interrogation (GI) 360
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6.2.6 Cyclic Measurements 360
6.2.7 Commands 360
6.2.8 Test Mode 360
6.2.9 Disturbance Records 360
6.2.10 Command/Monitor Blocking 361
6.2.11 IEC 60870-5-103 Configuration 361
6.3 DNP 3.0 362
6.3.1 Physical Connection and Link Layer 362
6.3.2 Object 1 Binary Inputs 363
6.3.3 Object 10 Binary Outputs 363
6.3.4 Object 20 Binary Counters 364
6.3.5 Object 30 Analogue Input 364
6.3.6 Object 40 Analogue Output 364
6.3.7 Object 50 Time Synchronisation 364
6.3.8 DNP3 Device Profile 365
6.3.9 DNP3 Configuration 373
6.3.10 DNP3 Unsolicited Reporting 374
6.4 MODBUS 374
6.4.1 Physical Connection and Link Layer 375
6.4.2 MODBUS Functions 375
6.4.3 Response Codes 375
6.4.4 Register Mapping 376
6.4.5 Event Extraction 376
6.4.6 Disturbance Record Extraction 377
6.4.7 Setting Changes 385
6.4.8 Password Protection 385
6.4.9 Protection and Disturbance Recorder Settings 385
6.4.10 Time Synchronisation 386
6.4.11 Power and Energy Measurement Data Formats 387
6.4.12 MODBUS Configuration 388
6.5 IEC 61850 389
6.5.1 Benefits of IEC 61850 389
6.5.2 IEC 61850 Interoperability 390
6.5.3 The IEC 61850 Data Model 390
6.5.4 IEC 61850 in MiCOM IEDs 391
6.5.5 IEC 61850 Data Model Implementation 391
6.5.6 IEC 61850 Communication Services Implementation 391
6.5.7 IEC 61850 Peer-to-peer (GOOSE) communications 392
6.5.8 Mapping GOOSE Messages to Virtual Inputs 392
6.5.9 Ethernet Functionality 392
6.5.10 IEC 61850 Configuration 393
7 Read Only Mode 395
7.1 IEC 60870-5-103 Protocol Blocking 395
7.2 Courier Protocol Blocking 395
7.3 IEC 61850 Protocol Blocking 396
7.4 Read-Only Settings 396
7.5 Read-Only DDB Signals 396
8 Time Synchronisation 397
8.1 Demodulated IRIG-B 397
8.1.1 Demodulated IRIG-B Implementation 397
8.2 SNTP 398
8.3 Time Synchronsiation using the Communication Protocols 398
Chapter 18 Cyber-Security 399
1 Overview 401
2 The Need for Cyber-Security 402
3 Standards 403
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3.1 NERC Compliance 403
3.1.1 CIP 002 404
3.1.2 CIP 003 404
3.1.3 CIP 004 404
3.1.4 CIP 005 404
3.1.5 CIP 006 404
3.1.6 CIP 007 405
3.1.7 CIP 008 405
3.1.8 CIP 009 405
3.2 IEEE 1686-2007 405
4 Cyber-Security Implementation 407
4.1 NERC-Compliant Display 407
4.2 Four-level Access 408
4.2.1 Blank Passwords 409
4.2.2 Password Rules 409
4.2.3 Access Level DDBs 410
4.3 Enhanced Password Security 410
4.3.1 Password Strengthening 410
4.3.2 Password Validation 410
4.3.3 Password Blocking 411
4.4 Password Recovery 412
4.4.1 Password Recovery 412
4.4.2 Password Encryption 413
4.5 Disabling Physical Ports 413
4.6 Disabling Logical Ports 413
4.7 Security Events Management 414
4.8 Logging Out 416
Chapter 19 Installation 417
1 Chapter Overview 419
2 Handling the Goods 420
2.1 Receipt of the Goods 420
2.2 Unpacking the Goods 420
2.3 Storing the Goods 420
2.4 Dismantling the Goods 420
3 Mounting the Device 421
3.1 Flush Panel Mounting 421
3.1.1 Rack Mounting 421
3.2 K-Series Retrofit 423
3.2.1 Conventions 425
3.3 Software Only 425
4 Cables and Connectors 427
4.1 Terminal Blocks 427
4.2 Power Supply Connections 427
4.3 Earth Connnection 428
4.4 Current Transformers 428
4.5 Voltage Transformer Connections 428
4.6 Watchdog Connections 429
4.7 EIA(RS)485 and K-Bus Connections 429
4.8 IRIG-B Connection 429
4.9 Opto-input Connections 430
4.10 Output Relay Connections 430
4.11 Ethernet Metallic Connections 430
4.12 Ethernet Fibre Connections 430
4.13 USB Connection 430
5 Case Dimensions 431
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Chapter 20 Commissioning Instructions 433
1 Chapter Overview 435
2 General Guidelines 436
3 Commissioning Test Menu 437
3.1 Opto I/P Status Cell (Opto-input Status) 437
3.2 Relay O/P Status Cell (Relay Output Status) 437
3.3 Test Port Status Cell 437
3.4 Monitor Bit 1 to 8 Cells 437
3.5 Test Mode Cell 437
3.6 Test Pattern Cell 438
3.7 Contact Test Cell 438
3.8 Test LEDs Cell 438
3.9 Test Autoreclose Cell 438
3.10 Red and Green LED Status Cells 438
4 Commissioning Equipment 440
4.1 Recommended Commissioning Equipment 440
4.2 Essential Commissioning Equipment 440
4.3 Advisory Test Equipment 441
5 Product Checks 442
5.1 Product Checks with the IED De-energised 442
5.1.1 Visual Inspection 442
5.1.2 Insulation 443
5.1.3 External Wiring 443
5.1.4 Watchdog Contacts 443
5.1.5 Power Supply 443
5.2 Product Checks with the IED Energised 444
5.2.1 Watchdog Contacts 444
5.2.2 Test LCD 444
5.2.3 Date and Time 444
5.2.4 Test LEDs 445
5.2.5 Test Alarm and Out-of-Service LEDs 445
5.2.6 Test Trip LED 445
5.2.7 Test User-programmable LEDs 445
5.2.8 Test Opto-inputs 445
5.2.9 Test Output Relays 445
5.2.10 Test Serial Communication Port RP1 446
5.2.11 Test Serial Communication Port RP2 447
5.2.12 Test Ethernet Communication 447
5.2.13 Test Current Inputs 447
5.2.14 Test Voltage Inputs 448
6 Setting Checks 450
6.1 Apply Application-specific Settings 450
6.1.1 Transferring Settings from a Settings File 450
6.1.2 Entering settings using the HMI 450
7 Protection Timing Checks 452
7.1 Overcurrent Check 452
7.2 Connecting the Test Circuit 452
7.3 Performing the Test 452
7.4 Check the Operating Time 452
8 Onload Checks 454
8.1 Confirm Current Connections 454
8.2 Confirm Voltage Connections 454
8.3 On-load Directional Test 455
9 Final Checks 456
Chapter 21 Maintenance and Troubleshooting 457
Contents P14D
xiv P14D-TM-EN-8

1 Chapter Overview 459
2 Maintenance 460
2.1 Maintenance Checks 460
2.1.1 Alarms 460
2.1.2 Opto-isolators 460
2.1.3 Output Relays 460
2.1.4 Measurement Accuracy 460
2.2 Replacing the Unit 461
2.3 Cleaning 461
3 Troubleshooting 462
3.1 Self-Diagnostic Software 462
3.2 Power-up Errors 462
3.3 Error Message or Code on Power-up 462
3.4 Out of Service LED on at Power-up 463
3.5 Error Code during Operation 463
3.6 Mal-operation during testing 464
3.6.1 Failure of Output Contacts 464
3.6.2 Failure of Opto-inputs 464
3.6.3 Incorrect Analogue Signals 464
3.7 PSL Editor Troubleshooting 464
3.7.1 Diagram Reconstruction 465
3.7.2 PSL Version Check 465
3.8 Repair and Modification Procedure 465
Chapter 22 Technical Specifications 467
1 Chapter Overview 469
2 Interfaces 470
2.1 Front USB Port 470
2.2 Rear Serial Port 1 470
2.3 Rear Serial Port 2 470
2.4 IRIG-B Port 470
2.5 Rear Ethernet Port Copper 471
2.6 Rear Ethernet Port - Fibre 471
2.6.1 100 Base FX Receiver Characteristics 471
2.6.2 100 Base FX Transmitter Characteristics 471
3 Performance of Current Protection Functions 472
3.1 Three-phase Overcurrent Protection 472
3.1.1 Three-phase Overcurrent Directional Parameters 472
3.2 Earth Fault Protection 472
3.2.1 Earth Fault Directional Parameters 473
3.3 Sensitive Earth Fault Protection 473
3.3.1 SEF Directional Parameters 473
3.4 Restricted Earth Fault Protection 474
3.5 Negative Sequence Overcurrent Protection 474
3.5.1 NPSOC Directional Parameters 474
3.6 Circuit Breaker Fail and Undercurrent Protection 475
3.7 Broken Conductor Protection 475
3.8 Thermal Overload Protection 475
3.9 Cold Load Pickup Protection 475
3.10 Selective Overcurrent Protection 476
3.11 Voltage Dependent Overcurrent Protection 476
3.12 Neutral Admittance Protection 476
4 Performance of Voltage Protection Functions 477
4.1 Undervoltage Protection 477
4.2 Overvoltage Protection 477
4.3 Residual Overvoltage Protection 477
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4.4 Negative Sequence Voltage Protection 477
4.5 Rate of Change of Voltage Protection 478
5 Performance of Frequency Protection Functions 479
5.1 Overfrequency Protection 479
5.2 Underfrequency Protection 479
5.3 Supervised Rate of Change of Frequency Protection 479
5.4 Independent Rate of Change of Frequency Protection 480
5.5 Average Rate of Change of Frequency Protection 480
5.6 Load Restoration 481
6 Power Protection Functions 482
6.1 Overpower / Underpower Protection 482
6.2 Sensitive Power Protection 482
6.3 Wattmetric Earth Fault Protection 482
7 Performance of Monitoring and Control Functions 483
7.1 Voltage Transformer Supervision 483
7.2 Current Transformer Supervision 483
7.3 CB State and Condition Monitoring 483
7.4 PSL Timers 483
7.5 Check Synchronisation 483
7.6 DC Supply Monitor 483
8 Measurements and Recording 485
8.1 General 485
8.2 Disturbance Records 485
8.3 Event, Fault and Maintenance Records 485
8.4 Fault Locator 485
9 Regulatory Compliance 486
9.1 EMC Compliance: 2014/30/EU 486
9.2 LVD Compliance: 2014/35/EU 486
9.3 R&TTE Compliance: 2014/53/EU 486
9.4 UL/CUL Compliance 486
9.5 ATEX Compliance: 2014/34/EU 486
10 Mechanical Specifications 488
10.1 Physical Parameters 488
10.2 Enclosure Protection 488
10.3 Mechanical Robustness 488
10.4 Transit Packaging Performance 488
11 Ratings 489
11.1 AC Measuring Inputs 489
11.2 Current Transformer Inputs 489
11.3 Voltage Transformer Inputs 489
12 Power Supply 490
12.1 Auxiliary Power Supply Voltage 490
12.2 Nominal Burden 490
12.3 Auxiliary Power Supply Interruption 490
13 Input / Output Connections 491
13.1 Isolated Digital Inputs 491
13.1.1 Nominal Pickup and Reset Thresholds 491
13.2 Standard Output Contacts 491
13.3 Watchdog Contacts 492
13.4 Shorting Link 492
14 Environmental Conditions 493
14.1 Ambient Temperature Range 493
14.2 Temperature Endurance Test 493
14.3 Ambient Humidity Range 493
14.4 Corrosive Environments 493
15 Type Tests 494
Contents P14D
xvi P14D-TM-EN-8

15.1 Insulation 494
15.2 Creepage Distances and Clearances 494
15.3 High Voltage (Dielectric) Withstand 494
15.4 Impulse Voltage Withstand Test 494
16 Electromagnetic Compatibility 496
16.1 1 MHz Burst High Frequency Disturbance Test 496
16.2 Damped Oscillatory Test 496
16.3 Immunity to Electrostatic Discharge 496
16.4 Electrical Fast Transient or Burst Requirements 496
16.5 Surge Withstand Capability 496
16.6 Surge Immunity Test 497
16.7 Immunity to Radiated Electromagnetic Energy 497
16.8 Radiated Immunity from Digital Communications 497
16.9 Radiated Immunity from Digital Radio Telephones 497
16.10 Immunity to Conducted Disturbances Induced by Radio Frequency Fields 497
16.11 Magnetic Field Immunity 498
16.12 Conducted Emissions 498
16.13 Radiated Emissions 498
16.14 Power Frequency 498
Appendix A Ordering Options 499
Appendix B Settings and Signals 501
Appendix C Wiring Diagrams 503
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Contents P14D
xviii P14D-TM-EN-8