IBM 1 GB Microdrive Storage Card User manual

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ii GA34-0033
First Edition (November
1976)
Changes are periodically made to the information herein; any such changes will be reported in
subsequent revisions
or Technical Newsletters.
Requests for copies
of IBM publications should be made to your IBM representative or the IBM
branch office serving your locality.
A form for readers' comments
is provided at the back of this publication. If the form has been
removed, send your comments to
IBM Corporation, Systems Publications, Department 27T, P.O. Box
1328, Boca Raton, Florida 33432. Comments become the property
of IBM.
©Copyright International Business Machines Corporation 1976
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PREFACE
Summary of Publication
Prerequisite Publications
vii
viii
x
CHAPTER 1. INTRODOCTION 1-1
Processor I/O Channel 1-1
C han ne1 Re po we r i" eat u re 1- 1
Channel Socket Adapter Feature 1-3
I/O Attachment Features 1-3
Timer Feature 1-3
Teletypewriter Adapter Feature 1-3
Inteqrated Diqital Input/Output
Non-Isolated Feature 1-3
customer Direct Proqram Control Adapter Feature 1-4
Customer Access Panel Feature 1-4
CHAPTER 2. PROCESSOrl I/O CHANNEL
Introduction
Functional Description of the I/O Channel
Siqnal Lines
Siqndl Line Groups
Service Group of Siqnal Lines
Poll Group of Siqnal Lines
Functional Subsets of thE Siqnal Lines
B as ic S ub se t
Interrupt Subset
Cvcle Steal/IPL Subset
Service Group Line Definition
Poll Group Line Definition
Processor I/O Cha nnel Operational Character ist ics
operational Sequences on the Channel
DPC Sequence Description
Interrupt Service Sequence Description
Cycle Steal service Sequence Description
Poll Sequence Description
Processor Initiated IPL Sequence Description
Host Initiated IPL Sequence Description
Reset Sequenc€s Description
Desiqn Considerations for Operational Sequences
Operational Power Considerations
Processor I/O Channel Electrical Cnaracteristics
Channel Siqnal Line Blectrical Characteristics
D ri ver/Rece iver I nf arma tion
Other Attachment Considerations
Power Supply Electrical Characteristics
Processor I/O Cha nnel Ph ysical Characteristics
Siqnal Pin and Cable Assiqnments
I/O Channel Physical Components Description
Sequence of Pluqqinq Device Attachments
2-1
2- 1
2-3
2-)
2-3
2-4
2-5
2-5
2-7
2-8
2-9
2-14
2-18
2-18
2-21
2-25
2-28
2-31
2-37
2-41
2-43
2-44
2-54
2-51
2-57
2-60
2-72
2-74
2-75
2-75
2-19
2-82
Contents iii

Processor I/O Channel Attachment F€atures
Channel Repower Feature
Socket Adapter Feature
CHAPTER 3. TIMER FEATURE
In tl:oduct ion
Relationship to other Features
Application Summary
General Description
Functional Description of the External Timer
S iq na. 1 Line s
customer c loc k
External Gate
Hun
External Gate Enable
Siqna.l Line Considerations
Application Sequences
In t er val Time r
Pulse Counter
Pulse Duration Counter
Timer Feature Operational CharactEristics
Interrupts
Interrupt Presentation
status After Povec TransitionE and Hesets
Timer Feature Electrical Characteristics
Rec~ivers
Dcivers
Timer Feature Physical Characteristics
Si~nal Pin Assiqnmants
Pin .l\s~iqnments Sho.inq customer Access
Panel (CAP) Connections
Jumper Selections
Timer Feature Desiqn considerations
wirinq Practices
App lica tioD Notes
CHAPTER 4. fELETYPEWRITER ADAPTER FEATURE
Introduct ion
Relationship to other Features
Application Summary
General Descripticn
Data Transmission
Initial ProqraID Load
Teletypewriter Adapter Operational Characteristics
Types ai Receive Operations
Interrupt Presentation
Commands that Initiate ReceivE and
Transmit Operations
Transmit Operation
Receive Operation
System Related Characteristics
Teletypewriter Adapter Electrical Characteristics
Teletypewriter Adapter Communications Lines
Driver/Receiver Information
Power Supplies
Teletypewriter Adapter Physical Characteristics
Physical Description
iv GA34-0033
2-82
2-82
2-86
3-1
3-1
3- 2
3-4
3-5
3-5
3-5
3-6
3-6
3-6
3-6
3-6
3-6
3-7
3-7
3-8
3-8
3-8
3-9
3-10
3-10
J -11
3-13
3-13
3-14
3-15
3-15
3-15
3-15
4-1
4-1
4-4
4-4
4-9
4-9
4-10
4-10
4-11
4-11
4-13
4-13
4-15
4 -17
4-17
4-17
4-25
4-26
4-27
4-27

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siqnal Pin Assiqnments
Teletvpewriter Adapter Desiqn Considerations
Teletypewriter DevicE Information
Cable Connection to the Teletypewriter Adapter
Customer Access Panel Connections
CHAPTER 5. INtEGRATED DIGITAL INPU~/OUTPUT FEATURE
Introduction
Diqitdl Input (Dr)
Diqital Outpu t (DO)
Inteqrated Diqital I/O Operational Characteristics
Diqital output Operation
Oiqital Input Operation
Inteqrated Diqital I/O Electrical Characteristics
Diqital Input (01) cnaracteristics
Diqital and External Sync Input Specifications
D iqita 1 0 utpu t (DO) Cha racteristics
Diqital and Readv output specifications
Inteqrated Diqital I/O Physical Characteristics
Siqnal Pin Assiqnments
Inteqrated Diqital I/O to Customer Access
Panel connections
Jumper Selections
Inteqrated Diqitdl I/O Design Considerations
APplication Notes
CHAPTER 6. CUSTOMER DIRECT PROGRA~ CONTROL
A DA PT ER FEAT URB
Introduction
Relationship to other Features
A pplica tieD Summa rv
General Description
Functional Description of the DPC Adapter
S i q na 1 Line s
I/O Act iv€
Function Bits
[1 od if iee Bi ts
Dev ice Addr es s
Data Bus Out
Interrupt S€rvice Active
Strobe
Data Bus In
Interrupt Requests
Condi ti 0 n Code In
Select Return
Halt or Machine Check
System Reset
Power-O n Re se t
Diaqnostic Mode and Diaqnostic Mode Modifier
D~C Adapter Operational Characteristics
a ut put Sequence
I np ut Seq uence
Interrupt Ser vice Sequence
DPC AdaJ:,)ter Electrical Characteristics
Drivers
Receivers
4- 27
4-29
4-29
4-29
4-34
5-1
5-1
5-3
5-4
5-5
5-5
5-7
5-9
5-q
5-9
5-9
5-10
5-12
5-12
5-16
5- 21
5-22
5-22
6-1
6-1
6-1
6-3
6-3
6-3
6-4
6-5
6- 5
6-5
6-6
6-6
6-6
6-7
6-7
6-7
6-7
6-8
6-8
6-8
6-8
6-8
6-9
6-10
6-11
6-12
6-12
6-12
contents v

DPe Adapter physical Characteristics
Siqnal Pin Assiqnments
DPe Adapter to Customer Access Panel
C onnec tions
Jumper Selections
DPe Adapter Desiqn Considerations
Application Notes
vi GA34-0033
6-14
6-14
6-18
6-21
6-22
6-22
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rhis publication provides reference information to aid in
desiqninq loqic for communicating with an IBM 4953 or 4955
Proc€ssor throuqh the input/output channel and several
desiqnated user attachment features. This information is
primarily intended for experienced engineers and
technicians. This publication will also be useful to
cus tamers who nee d deta iled inf or aa ti cn f or connecting their
instruments and devices to the various attachment features.
The reader should have a workinq knowledge of the
information contained in the manuals listed in the
"Prerequisite Publications" section of this preface. These
publications contain information about: the processor, the
channel, the operate I/O instruction, device control blocks
with their associated commands and parameters, and the
interrupt mechanism. The reader should especially note that
the machine code information for the user attachment
features can be found in the ~rerequisite publications.
This information includes: command formats and descriptions,
condition codes, and status words.
Additional ~ublications that the reader will find useful
are listed in the tiRe la ted Pu.blications" section of this
preface. These publications provide physical planning
information and list the available machines and features.
li2tg. The processor I/O channel architecture, or any aspect
of the I/O interfaces described in this publication, may be
altered from time to time by IBM or may be withdrawn by IBM
in part or in whole.
Preface vii

SUMMARY OF PUBLICATION
~ha.Ql~[ 1.!. In.t.f.2!i'y
ct
iQ'!!- This chapter introduces the reader
to the I/O channel and the user attachment features that are
described in the subsequent chapters. A block diagram shovs
where the user attachment features are located with respect
to the processor and the I/O channel. The attachment points
covered are:
• Processor I/O channel
Channel socket adapter fEature
Channel repower feature
• Timer feature
• Teletypewriter adapter feature
• Inteqrated diqital input/output non-isolated feature
• customer direct proqram control adapter feature
~hg.Qt~~ ~~ E£Q£~§§Q~ lLQ ~h~nngl. The introduction to this
cha pter provides a qenera 1 description of the channel,
direct proqram centrol (DPC) operations, cycle steal (CS)
operations. interrupts, and initial program load (IPL).
•
•
•
•
The remaininq sections of this chapter provide:
Siqnal line descriptions--this section includes a list
of the I/O channel siqnal lines and identifies groups
and subsets of the lines. A functional description is
included for each siqnal line.
Operational characteristics--this section consists of
timinq charts and descripti v€ text for the various
siqnal sequences that can occur on the I/O channel.
Special timinq requirements and maximum skew are shown
on the charts.
Electrical characteristics--this includes (1) electrical
requirements for dr1vers and receivers and a) other
attachment considerations.
Phvsical characteristics--this section provides
connector information includinq illustrations and signal
pin assiqnments. This information is supplied for the:
1. I/O channel cahle connectors,
2. Channel socket adapter feature, and
3. C han DEI repo werfea ture.
~h~Qi§r 1~ Ii~§~ 1~~!Y£§. The introduction to this
provides a qeneral descripticn of the timer
includinq a block diaqram.
chapter
feature
•
•
•
•
The remaininq sections of this chapter provide:
Detailed information about the timer signal lines.
Operational characteristics of timer interrupts.
Timer electrical characteristics--tbis includes driver
and receiver information for external control of the
timers.
Timer physical characteristics--this section provides
connector information, including an illustration and
siqnal pin assiqnments for the connector located on the
printed circuit card.
viii GA34- 0033
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~Bg~!~~ ~~ Ig!giYBev!i1~! AggB!g£ Feature. This chapter
provides a qeneral description and a block--diagram of the
teletypewriter adapter feature.
Other sections of the chapter provide:
• Interface options for the teletypewriter adapter--this
includes isolated and non-isolated current loops and
voltaqe level interfaces for ElA* and TTL
(transistor-transistor loqic).
• Timinq sequences for transmit and receive operations.
• Electrical characteristics--this includes driver and
receiver information for each method of attaching a
device to the teletypewriter adapter.
• Physical characteristics--this section provides
connector information and signal pin assignments.
~!!.~l2i~£ 2.!. !.n.t~.9!g!~g Qigi1g1 !1l1H!.!LQY.1I2Y1 199j;'y!g. This
chapter provides a qeneral description of the integrated
diqital input/output non-isolated feature. A block diagram
shows the reqisters and signal lines associated ~ith this
feature. The introduction includes a functional description
for: diqital input, digital output, and the external control
line s.
•
•
•
other sections of the chapter provide:
Operational characteristics--this section includes
timinq sequences for write diqital output and read
diqital input usinq external Eync.
Electrical characteristics--this includes driver and
receiver information for attaching the user's instrument
or device.
Physical characteristics--this section provides
connector information and siqnal pin assignments at the
connectors for the digital I/O fea ture and a t the
connectors for the customer access panel feature.
*Electronic Industries Association
2001 Eve Street. N.W.
Washington, D.C. 20006
Preface ix

~!lgJ2!:~~ .Q.!. ~"y§!Q'!~.I Qi~§st. prQgJ;~,! ~.Q!!trol Aggj2:.t~!: 19at.YJ;~.
The introduction to this chapter describes the customer
direct proqram centrol adapter feature. A block diagram
shows the data flov from the processor I/O channel through
the direct proqram control adapter to the user's devices.
The remaining sections of this chapter provide:
• Detailed information about the signal lines.
• Operational characteristics--this section consists of
tiainq charts and descriptive text for the various
siqnal sequences. Special timing requirements are shown
on the charts. Timing charts arE included for: an
output sequence, an Lnpu t sequence, and an interrupt
service sequence.
• Electrical characteristics--this provides driver and
receiver specifications for attaching the user's
device(s).
• Physical characteristics--this section provides
connector information and signal pin assignments at (1)
the connectors for the adapter feature and (2) the
connectors for the customer access panel feature.
PREREQUISITE PUBLICATIONS
• IBK
Ser ies/l
Model
3:
4953 Processor and Processor
Features Description,
GA34-0021
. . •
or
• IBM
Series/l
Model
5:
4955
Processor and Processor
Features Description,
GA34-0022
•
IBM
Series/1:
Customer Direct Program
Control
Adapter
Feature Description, GA34-0031
BELATED PUBLICATIONS
• IBM Series/l Physical Planning Manual, GA34-0029
• IBM Series/1 Coniiqurator, GA34-0042
!21~. Installation instructions are shipped with each system
order. These instructions contain the information required
for selectinq options and device addresses on the I/O
attachment feature cards.
x GA34-0033
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A variety of interfaces are provided for the user to attach
his own input/output (I/O) devices and instruments to an IBM
4953 or 4955 Processor. Both serial and parallel data paths
are provided in addition to a multifunction timer. The user
may choose one of the I/O adapter features or design his own
I/O adapter to communicate directly with the processor I/O
channel.
Fiqure 1-1 shows the various methods of attachment and
the available attachment features. Each attachment is
described in subsequent sections cf this chapter.
PROCESSOR I/O CHANNEL
Input/output devices are attached to the ~rocessor through
the I/O channel. The channel directs the flow of
information between the I/O devices and main storage. It
contains the facilities for the control of the I/O
operations and can accommodate 256 device addresses. The
I/O channel is asynchronous with lultidropped lines that
link the prccessor resource to its external facilities. The
I/O channel architecture includes: address, control, and
data siqnal lines.
To use the full capability of the channel including
cycle steal, the user can connect to the I/O channel lines
usinq any of the following features:
• c ha nne 1 re power fea t ure
• channel socket adapter feature
These features are described in the following sections.
The channel repower feature is a
channel that repovers and isolates
This feature permits connection of
or
controllers via four connectors
circuit ca rd.
serial feature on the
the channel signal lines.
additional I/O adapters
on the top of the repower
Introduction 1-1

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User's
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Idevice(s) 1
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Integrated
digital I/O
non-isolated
feature
I/O channel
1------
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II I/O adapter I
1 _____ I
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to other
I/O adapters
1- --
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I device ,
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Teletypewriter
adapter feature
Customer
DPC adapter
feature
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The channel socket adapter feature consists of an IB~
printed circuit card that pluqs into the backpanel of the
IBM 4953 or 4955 Processor or 4959 I/O Expansion Unit. On
the top edqe of the IBM ~rinted circuit card is an industry
standard connector that accepts the user's I/O adapter card.
To power the user's circuits, +5 volts dc at 2 amFeres is
available at the connector.
I/O ATTACHMENT FEATURES
The timeL feature card has two separately addressable 16-bit
timers. If desired, the user can supply his own time base
and qatinq siqnals throuqh a connector on the top of the
card.
Each timer can generate periodic or aperiodic
interrupts with, or without, the external gate.
In addition to operatinq as an interval timer or pulse
counter, each timer can o~erat€ as a self-contained pulse
duration counter with end interrupt.
The teletypewriter adapter feature card provides a way of
attachinq a serial I/O device. This feature provides a
loqical subset of the EIA RS232-C interface. Full duplex
operation and initial program load are supported by the
adapter.
Attachment to a teletypewriter is by a dc current loop
(isolated or non-isolated). Tva other attachment options
are offered: (1) TTL compatible and (2) an ElA voltage level
inter face.
The integrated diqital I/O feature card contains:
• Two 16-point groups of non-isolated digital
input/process interrupt (Dl/PI)
• Two 16-point groups of non-isolated digital output (DO)
Each qroup of DI/PI and DO have a ready and a sync line
for synchronizing their operations with attached devices.
The diqital points for each group and their associated ready
and sync lines are available at three top-card connectors.
Introduction 1-3

The direct proqram control adapter feature card supplies a
loqical subset of the I/O channel architecture. This
feature provides a conv€nient meaDS of attaching I/O devices
and subsystems to a 4953 or 4955 Processor. The interfacE
circuits are TTL compatible. The adapter is designed to
perform direct proqram control (DPC) functions only; cycle
steal (overlapped) operations cannot be performed. The
feature card can be confiqured to accommodate 4, 8, or 16
I/O device addresses. The adapter allows for interrupt
vectorinq of 16 interrupt sources.
User attachment is throuqh three top-card connectors.
There are 75 siqnal lines; these include: 18 data bus out,
18 data bus in, 16 interrupt request in. 3 function bits, 4
modifier bits, 4 device address bits, and 12 control and
response lines. The data flow is always 16 bits without.
parity option or 18 bits with parity option (2 parit.y bits).
The customer access panel feature provides an assembly for
mountinq optional, quick-disconnect type connectors for I/O
equipment. The assembly can accommodate: one timer
connector, one teletypewriter connEctor, and up to four
connectors for either the in teqrated digital input/output
feature, or the customer direct program control feature.
The assembly mounts to the standard rack mounting screw
holes at the rear of the enclosuIE frame.
1-4 GA34-0033
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INTRODUCTION
Input/output devices communicate with the processor and main
storage devices through the processor I/O channel.
Attachment of the devices to the channel is through an I/O
adapter or I/O attachment logic card.
The channel directs the flow of information between the
I/O devices, the processor, and main storage. A maximum of
256 devices can be addressed.
The processor I/O channel supports the following basic
types of operations:
• Direct program control (DPC) operations -- An immediate
data transfer is made between main storage and the
device for each Operate I/O instruction. The data may
consist of one byte or one word. The operation mayor
may not terminate with an interrupt.
•
Cycle steal operations An Operate I/O instruction
can initiate cycle stealing data transfers of up to 65,
535 bytes (per device control block) between main
storage and the device. Cycle steal operations are
overlapped with processing operations. Word or byte
transfers, command and data chaining, burst mode, and
program controlled interrupts can be supported.
• Interrupt servicing four preemptive priority
interrupt levels are available to facilitate device
service. The device interrupt level is assignable by
the program. In addition, the device interrupt
capability can be masked under program control.
• Initial program load (LPL) operations A record
consisting of initial instructions for the processor is
read into storage from either a local I/O device or
from a host system.
The channel provides comprehensive error checking
including timeouts, sequence checking, and parity checking.
Reporting of errors, exceptions, and status is accomplished
by (1) recording condition codes in the processor during
execution of Operate I/O instructions, and (2) recording
condition codes and an interrupt information byte (IIB) in
the processor during interrupt acceptance. Additional
sta tus words may be used .by the device as necessary to
describe its status.
The I/O Channel is asynchronous and multidropped.
Asynchronous means there are no timing restrictions inherent
in the architecture. The response from a given I/O device
triggers the next sequential action rather than a specified
Processor I/O Channel 2-1

timing condition. (Timeout conditions for error detection
are, of course, not excluded.) An asynchronous channel
allows the attachment of devices that have various speeds
and technologies over a wide range of distances or delays.
All of the I/O channel signal lines are TTL level
compatible. This allows the user to attach a wide variety
of I/O devices.
The I/O channel signal lines are distributed internally
through the processor backpanel board to each I/O attachment
card socket. Distribution of the channel signal lines can
be continued by connecting cables or a channel repower
feature from a processor I/O socket (usually the A-socket)
to an adjacent I/O expansion unit as the particular
processor or configuration requires. A channel repower
feature card is required if the channel is extended from an
1/0 expansion unit to an additional I/O expansion unit.
IBM I/O attachment cards plug directly into the
backpanel sockets. External I/O devices are connected to
the attachment cards via top-card connectors.
Two features are available for connecting non-IBM
devices directly to the channel: (1) the channel socket
adapter feature and (2) the channel repower featur~.
•
Channel socket adapter feature -- this feature consists
of an IBM printed circuit card that plugs into the
backpanel of the processor unit or I/O expansion unit.
An industry standard connector on the top edge of the
IBM printed circuit card accepts the userts I/O adapter
card. For further information, see "Socket Adapter
Featu['e" near the end of this chapter.
• Channel repower feature -- this feature is a logic card
that repowers and isolates the channel signal lines.
This card can be installed in any I/O socket, as the
last series element on the channel, to provide for
connection of additional I/O adapters or controllers.
For further information, see "Channel Repower Feature"
near the end of this chapter.
If the user connects directly to the channel at the
backpanel sockets instead of through one of the available
features, unit load, power, and physical requirements must
be considered. These and other requirements are discussed
in subsequent sections of this chapter.
2-2 GA34-0033
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FUNCTIONAL DESCRIPTION OF THE I/O CHANNEL SIGNAL LINES
The I/O channel consists of 81 signal lines. These signal
lines are divided into two physical groups: (1) the .§~llic~
g£Q~ and (2) the Eol! g£QYE. Eaen group can operate
concurrently and asynchronously with the other group.
However, the initiation of sequences on the channel is
interdependent. The service group supports:
• Data and control information transfers
• 1PL initiation
• Reset functions
The poll group supports:
• Cycle steal requests from the devices
• Interrupt requests from the devices
• Acknovlegement of both types of requests
The I/O channel signal lines are listed by group in Figures
2-1 and 2-2.
!Q!~. The direction shown for each line assumes that the I/O
channel originates on the left; I/O attachments are on the
right.
The signal lines associated with the service group are
listed in Figure 2-1.
Processor I/O Channel 2-3

Figure 2-1.
~~liic~ GrouE 21 Sig.!!E:l Li~
Address bus bits
Address bus bit
Data bus
Address gate
Address gate return
Service gate
00--15
16
service gate return
Condition code in bus
Cycle input indicator
Cycle byte indicator
Stat us bus
Data strobe
Initiate IPL
IPL
Halt or MCHK (machine check)
System reset
Power on reset
Total number of lines
Direction
<------)
-------)
(--_._--)
-----_._)
<_. __ ._---
._------)
(-------
(-------
(-------
(-------
_._-----)
--_._---)
._------)
(-------
-------)
._------)
-------)
No. of 1ine,2
16
1
18
1
1
1
1
3
1
1
4
1
1
1
1
1
1
54
The signal lines associated with the poll group are listed
inP'igure 2-2.
Figure 2-2.
Pol! §£Q~£ Q! Signal 11~~§
Signal ngme _________ _
Request in bus
Cycle steal request in
Poll identifier
Poll
Poll prime
Poll propagate
Poll return
Burst return
<------
(---_._-
------)
------)
------)
------>
<------
<------
No. of line§
16
1
5
1
1
1
1
1
Total number of lines 27
2-4 GA34-0033
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c
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The I/O Channel signal lines can be subsetted depending upon
the level of fU,nction reguired by the I/O att.achment. In
order of increasing level of function, these subsets are:
• Basic subset
• Interrupt subset
• Cycle Steal/IPL subset
Attachment to a subset is a prerequisite for attachment
to the next higher level subset.
The basic subset consists of the busses and tags to support
functions initiated by the processor; that is, DPC (direct
program control) commands. This includes the data transfers
associated with the ope command itselt. The basic subset
supports DPC devices that do not interrupt.
The I/O signal lines in the basic subset are listed in
Figure 2-3.
Figure 2-3 (Part 1 of 2).
~asi£ Subset--Ser.!i~ GrQ'!!£ ~~gn~l 1in~
Address bus bit
Address bus bit
Data bus *2
Address gate
00-15 *1
16
Address gate return
Condition code in bus
Da ta strobe
Halt or MCHK
System reset
Power on reset
------)
_._----)
------>
------>
<------
<------
------)
------>
------>
------>
16
1
18
1
1
]
1
1
1
1
Processor I/O Channel 2-5