Infineon EiceDRIVER 2EDL803 Series User manual

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User Manual Please read the Important Notice and Warnings at the end of this document V 1.0
www.infineon.com/2edl803x page 1 of 19 2023-06-07
UM_2305_PL88_2305_223554
Half-bridge buck converter evaluation board
using the EiceDRIVER™ 2EDL803x
Order code: EVAL_HB_2EDL803x-G3C, EVAL_HB_2EDL803x-G4B,
EVAL_HB_2EDL803x-G4C
About this document
Scope and purpose
The 2EDL803x is the EiceDRIVER™family designed to drive both high-side and low-side MOSFETs in a half-
bridge configuration. The floating high-side driver is capable of driving a high-side MOSFET operating at up to
120 V bootstrap voltage. Version 4 provides full 4 A current capability, while version 3 provides 3 A. The high-
side bias voltage is generated using a bootstrap technique with an integrated bootstrap diode. The inputs of
the driver are TTL logic compatible and can withstand input common mode swing from -10 V up to 20 V.
Independent inputs allow controlling high- and low-side domains independently. Undervoltage lockout (UVLO)
on both high- and low-side supplies forces the corresponding outputs low in case of insufficient supply. The
2EDL803x is available in SON-8 pins 4 mm x 4 mm, SON-10 pins 4 mm x 4 mm, and SON-10 pins 3 mm x 3 mm
packages.
The half-bridge buck converter evaluation board described in this document is designed as a test platform for
evaluating the performance of 2EDL8034_G3C. For evaluation of different packages, evaluation boards are
available as shown in Table 1.
Table 1 Board specifications
Part number
Package
Body size
Evaluation board
2EDL803x-G3C
PG-VDSON-10-4
3 mm x 3 mm
EVAL_HB_2EDL803x-G3C
2EDL803x-G4B
PG-VSON-8-5
4 mm x 4 mm
EVAL_HB_2EDL803x-G4B
2EDL803x-G4C
PG-VDSON-10-2
4 mm x 4 mm
EVAL_HB_2EDL803x-G4C
Intended audience
Power supply designers, component engineers, hardware engineers, etc.

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Table of contents
Table of contents
About this document....................................................................................................................... 1
Table of contents............................................................................................................................ 2
1Introduction .......................................................................................................................... 3
2Getting started with the hardware ........................................................................................... 4
2.1 Evaluation board.....................................................................................................................................4
2.2 List of connection and test points ..........................................................................................................5
2.3 Quick start guide .....................................................................................................................................5
3Test results............................................................................................................................ 6
4Footprint selection for different FETs....................................................................................... 9
5Addendum............................................................................................................................12
5.1 Schematic..............................................................................................................................................12
5.2 Layout....................................................................................................................................................15
5.3 Bill of materials (BOM) ..........................................................................................................................17
Revision history.............................................................................................................................18

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Introduction
1Introduction
The evaluation board provides the design engineer with a test platform for evaluating the performance of the
2EDL8034 gate driver –such as, but not limited to, its propagation delay, delay matching, and rise/fall time
characteristics. The influence of the surrounding gate drive circuitry such as the external gate resistors on the
MOSFET’s switching behavior can also be evaluated. The board is configured as a half-bridge buck converter in
an open-loop configuration and tested with 48 V typical input voltage and 12 V typical output voltage. The
Infineon components used in this evaluation board are:
•EiceDRIVER™2EDL8034 as half-bridge driver for the low-side and high-side MOSFET
•OptiMOS™100 V 4 mΩ(BSC040N10NS5) in SuperSO8 package as the power MOSFET
Table 2 shows the typical board electrical specifications, but the user has the freedom to vary the input voltage
(60 V maximum), output voltage, output current, switching frequency and dead time, because the board is
configured in open-loop configuration. Care must be taken not to exceed the components’maximum voltage
ratings and current ratings (e.g., the inductor’s saturation current rating), as well as the devices’temperature
ratings. Provide adequate airflow or forced air if necessary.
Table 2 Board specifications
Parameter
Symbol
Value
Unit
Input voltage
Vin
48
V
Output voltage
Vout
12
V
Output current
Iout
0 to 8
A
Switching frequency
Fsw
200
kHz
Dead time
DTon, DToff
100
ns
Board dimensions
88.0 mm (L) x 60.5 mm (W)
Figure 1 Block diagram of EVAL_HB_2EDL803x

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Getting started with the hardware
2Getting started with the hardware
2.1 Evaluation board
Figure 2 EVAL_HB_2EDL803x –top side
Figure 3 EVAL_HB_2EDL803x –bottom side

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Getting started with the hardware
2.2 List of connection and test points
Table 3 Connection and test points –functional descriptions
Connection/test point
Description
X1
HI and LI PWM input
X2
Input GND
X3
Vout connector
X4
VDD connector
X5
Output GND
X6
Vin connector
X7*
EN connector
+Vin
Vin sense point
+Vout
Vout sense point
Note: EN connector (X7) is only available on board EVAL_2EDL803x-G3C
2.3 Quick start guide
1. Input the PWM signals (LI and HI) using a function generator with the desired pulse width, dead time and
frequency through connector X1. Ensure that there is sufficient dead time to avoid cross-conduction of the
two MOSFETs.
2. Supply VDD voltage using an external auxiliary power supply between 8 V and 17 V through connector X4.
3. For 2EDL803x-G3C, enable signal should be supplied between 3 V and VDD + 0.3 V through connector X7.
Other drivers don’t require enable signal.
4. Supply the Vin voltage using an external power supply with 48 V (60 V maximum) through connector X6 (Vin)
and X2 (GND). If verifying the gate driver IC characteristics only, such as propagation delay, there is no need
to supply the Vin voltage. In this case, the HS pin must be shorted to GND in order to have a charging path for
the bootstrap capacitor.
5. Connect the Vout to the electronic load through connector X3 (Vout) and X5 (GND) and increase the output
current up to 8 A maximum. Care must be taken not to exceed the inductor’s saturation limit.
6. The VDD, LI, HI, LO, and HS pin of the gate driver can be measured by a low-voltage single-ended probe, while
the HO-HS and HB-HS should be measured using low-voltage differential probes. Probing loops should be
as short as possible to avoid any induced ringing, and probes should be placed near the driver pins to
ensure accurate measurement of the driver’s performance.
7. To power down the board, turn off the load first and then turn off the input voltage supply. Then turn off the
enable signal in the case of 2EDL80x-G3C. Finally, turn off the driver bias supply.

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Test results
3Test results
Figure 4 and Figure 5 show the falling and rising propagation delay of the low-side and high-side drives with
the VDD bias supplied and Vin = 48 V with no load on output.
Figure 4 LI-LO falling (33.6 ns) and rising (34.7 ns) propagation delay (VDD = 12 V, Vin = 48 V, Cload =
4.1 nF)

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Test results
Figure 5 HI-HO falling (34.3 ns) and rising (33.5 ns) propagation delay (VDD = 12 V, Vin = 48 V, Cload =
4.1 nF)
Figure 6 shows the high-side and low-side output waveforms together with the switch node waveforms at Vin =
48 V, VDD = 12 V, duty = 23 percent, Fsw = 200 kHz, load = 8 A, and TA= 25°C.

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Test results
Figure 6 LO (green), HO (pink), HS (yellow) waveforms

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Footprint selection for different FETs
4Footprint selection for different FETs
The evaluation board allows the user to test the performance of the driver IC with different FETs available in
various footprints. Table 4 lists all the footprints supported on this board.
Table 4 FET footprints supported on the evaluation board
Package
Ref. designator
Preferred FET
Figure
PG-TDSON-8-1
(SuperSO8)
Q1 and Q2
BSC040N10NS5
Figure 7
TO263-7-3
Q3 and Q10
IPB032N10N5
Figure 8
PG-HSOF-8-1
Q4 and Q9
IPT020N10N3
Figure 9
PG-HSOG-8-1
Q5 and Q8
IAUS300N10S5N014
Figure 10
PG-HDSOP-16-2
Q6 and Q7
IAUS260N10S5N019T
Figure 11
Figure 7 PG-TDSON-8-1 (SuperSO8) package
Figure 8 TO263-7-3 package

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Footprint selection for different FETs
Figure 9 PG-HSOF-8-1 package

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Footprint selection for different FETs
Figure 10 PG-HSOG-8-1 package
Figure 11 PG-HDSOP-16-2 package

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Addendum
5Addendum
5.1 Schematic
Figure 12 EVAL_HB_2EDL803x-G3C board schematic

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Addendum
Figure 13 EVAL_HB_2EDL803x-G4B board schematic

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Addendum
Figure 14 EVAL_HB_2EDL803x-G4C board schematic

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Addendum
5.2 Layout
Figure 15 EVAL_HB_2EDL803x-G3C board layout
Figure 16 EVAL_HB_2EDL803x-G4B board layout

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Addendum
Figure 17 EVAL_HB_2EDL803x-G4C board layout

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Addendum
5.3 Bill of materials (BOM)
Figure 18 EVAL_HB_2EDL803x board BOM

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Revision history
Revision history
Document
version
Date of release
Description of changes
V 1.0
2023-06-07
Initial release

Trademarks
All referenced product or service names and trademarks are the property of their respective owners.
Edition 2023-06-07
UM_2305_PL88_2305_223554
Published by
Infineon Technologies AG
81726 Munich, Germany
© 2023 Infineon Technologies AG.
All Rights Reserved.
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IMPORTANT NOTICE
The information contained in this application note is
given as a hint for the implementation of the product
only and shall in no event be regarded as a
description or warranty of a certain functionality,
condition or quality of the product. Before
implementation of the product, the recipient of this
application note must verify any function and other
technical information given herein in the real
application. Infineon Technologies hereby disclaims
any and all warranties and liabilities of any kind
(including without limitation warranties of non-
infringement of intellectual property rights of any
third party) with respect to any and all information
given in this application note.
The data contained in this document is exclusively
intended for technically trained staff. It is the
responsibility of customer’s technical departments
to evaluate the suitability of the product for the
intended application and the completeness of the
product information given in this document with
respect to such application.
For further information on the product, technology,
delivery terms and conditions and prices please
contact your nearest Infineon Technologies office
(www.infineon.com).
WARNINGS
Due to technical requirements products may contain
dangerous substances. For information on the types
in question please contact your nearest Infineon
Technologies office.
Except as otherwise explicitly approved by Infineon
Technologies in a written document signed by
authorized representatives of Infineon
Technologies, Infineon Technologies’ products may
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