Intel E7500 Guide

Intel®E7500/E7505 Chipset
Thermal Design Guide
Intel®E7500/E7505 Chipset Memory Controller Hub (MCH) Thermal
and Mechanical Design Guidelines
November 2002
Document Number: 298647-002
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2 Intel®E7500/E7505 Chipset MCH Thermal Design Guide
INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL®PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY
ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN
INTEL’S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS, INTEL ASSUMES NO LIABILITY WHATSOEVER, AND INTEL
DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY, RELATING TO SALE AND/OR USE OF INTEL PRODUCTS INCLUDING LIABILITY OR
WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT,
COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. Intel products are not intended for use in medical, life saving, or life sustaining
applications.
Intel may make changes to specifications and product descriptions at any time, without notice.
Designers must not rely on the absence or characteristics of any features or instructions marked "reserved" or "undefined." Intel reserves these for
future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them.
The Intel®E7500/E7505 chipset MCH may contain design defects or errors known as errata which may cause the product to deviate from published
specifications. Current characterized errata are available on request.
Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order.
Intel, Pentium, Intel Xeon and the Intel logo are trademarks or registered trademarks of Intel Corporation or its subsidiaries in the United States and
other countries.
*Other names and brands may be claimed as the property of others.
Copyright © 2002, Intel Corporation

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Intel®E7500/E7505 Chipset MCH Thermal Design Guide 3
Contents
1Introduction ..........................................................................................................................7
1.1 Design Flow ............................................................................................................8
1.2 Definition of Terms..................................................................................................9
1.3 Reference Documents ..........................................................................................10
2Packaging Technology ......................................................................................................11
3Thermal Simulation............................................................................................................13
4Thermal Specifications ......................................................................................................15
4.1 Case Temperature and Thermal Design Power ...................................................15
4.2 Die Temperature...................................................................................................15
5Thermal Metrology.............................................................................................................17
5.1 Die Temperature Measurements ..........................................................................17
5.1.1 0° Angle Attach Methodology ................................................................17
5.2 Power Simulation Software...................................................................................19
6Reference Thermal Solutions ............................................................................................21
6.1 Operating Environment .........................................................................................21
6.2 Mechanical Design Envelope................................................................................21
6.3 Thermal Solution Assembly ..................................................................................23
6.3.1 Heatsink Orientations ............................................................................25
6.3.2 Extruded Heatsink Profiles ....................................................................26
6.3.3 Mechanical Interface Material ...............................................................27
6.3.4 Thermal Interface Material ....................................................................27
6.3.5 Heatsink Clip .........................................................................................27
6.3.6 Clip Retention Anchors..........................................................................28
6.3.7 Board Level Component Keep-out Dimensions ....................................28
6.4 Reliability Guidelines.............................................................................................30
Appendix A: Thermal Solution Component Suppliers ...............................................................................31
Appendix B: Mechanical Drawings............................................................................................................33

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4 Intel®E7500/E7505 Chipset MCH Thermal Design Guide
Figures
Figure 1. Thermal Design Process ......................................................................................8
Figure 2. MCH Package Dimensions (Side View) .............................................................11
Figure 3. MCH Package Dimensions (Top View)..............................................................12
Figure 4. 0 Angle Attach Methodology (Top View) ............................................................18
Figure 5. 0° Angle Attach Heatsink Modifications..............................................................18
Figure 6. Thermal Solution Decision Flowchart.................................................................19
Figure 7. Reference Heatsink Volumetric Envelope for the MCH .....................................22
Figure 8. Reference Thermal Solution Assembly..............................................................23
Figure 9. Reference Thermal Solution Assembly (Side View)...........................................24
Figure 10. Reference Thermal Solution (Top View) ..........................................................24
Figure 11. Preferred Heatsink Orientation.........................................................................25
Figure 12. Extruded Heatsink Profile.................................................................................26
Figure 13. Alternate Tall Heatsink Profile ..........................................................................26
Figure 14. Heatsink Mechanical Gasket, Optional Two-Piece ..........................................27
Figure 15. Heatsink Retention Mechanism Layout............................................................28
Figure 16. Retention Mechanism Component Keep-out Zones ........................................29
Figure 17. MCH Heatsink Assembly..................................................................................34
Figure 18. MCH Heatsink Clip ...........................................................................................35
Tables
Table 1. Intel®E7500 Chipset MCH Thermal Specifications.............................................15
Table 2. Intel®E7505 Chipset MCH Thermal Specifications.............................................15
Table 3. Reliability Guidelines............................................................................................30
Table 4. Complete Thermal Solution Kits ..........................................................................31
Table 5. Extruded Heatsinks .............................................................................................31
Table 6. Interface Materials ...............................................................................................32
Table 7. Attach Hardware..................................................................................................32

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Intel®E7500/E7505 Chipset MCH Thermal Design Guide 5
Revision History
Revision
Number
Description Date
-001 Initial Release as an Intel®E7500 chipset specific document February 2002
-002 • Added Intel®E7505 chipset specific information and re-titled
document
• Updated E7500/E7505 chipset MCH thermal specifications
• Removed 90°C Angle Attach Die Temperature Measurement
Methodology
• Updated Supplier Contact Information
• All reference to Tdie-hs changed to Tcase
November 2002

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Introduction
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Intel®E7500/E7505 Chipset MCH Thermal Design Guide 7
1 Introduction
As the complexity of computer systems increase, so do the power dissipation requirements. Care
must be taken to ensure that the additional power is properly dissipated. Typical methods to
improve heat dissipation include selective use of ducting, and/or passive heatsinks.
The goals of this document are:
• To specify the operating limits of the Intel®E7500/E7505 chipset MCH components.
• To describe a reference thermal solution that meets the thermal specifications of the
Intel®E7500/E7505 chipset MCH components.
Properly designed solutions provide adequate cooling to maintain the E7500/E7505 chipset MCH
die temperatures at or below thermal specifications. This is accomplished by providing a low
local-ambient temperature, ensuring adequate local airflow, and minimizing the die to local-
ambient thermal resistance. By maintaining the E7500/E7505 chipset MCH die temperature at or
below the specified limits, a system designer can ensure the proper functionality, performance, and
reliability of the chipset. Operation outside the functional limits can degrade system performance
and may cause permanent changes in the operating characteristics of the component.
The simplest and most cost effective method is to improve the inherent system cooling
characteristics through careful design and placement of fans, vents, and ducts. When additional
cooling is required, component thermal solutions may be implemented in conjunction with system
thermal solutions. The size of the fan or heatsink can be varied to balance size and space
constraints with acoustic noise.
This document addresses thermal design and specifications for the E7500/E7505 chipset MCH
components only. For thermal design information on other chipset components, refer to the
respective component datasheet. For the P64H2, refer to the Intel®PCI-64 Hub 2 (P64H2)
Thermal Design Guidelines. For the ICH3-S, refer to the Intel®82801CA I/O Controller Hub 3
(ICH3-S) Datasheet. For the ICH4, refer to the Intel® 82801DB I/O Controller Hub 4 (ICH4)
Datasheet.
Note: Unless otherwise specified, the term “MCH” refers to both the E7500 chipset MCH and E7505
chipset MCH.

Introduction
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8 Intel®E7500/E7505 Chipset MCH Thermal Design Guide
1.1 Design Flow
To develop a reliable, cost-effective thermal solution, several tools have been provided to the
system designer. Figure 1 illustrates the design process implicit to this document and the tools
appropriate for each step.
Figure 1. Thermal Design Process
Step 1: Thermal Simulation
- Thermal Models
- Thermal Model Users
Guide
Step 2: Heatsink Selection
- Thermal Reference
- Mechanical Reference
Step 3: Thermal Validation
- Thermal Testing Software
- Software Users Guide
Therm_Design_Proc

Introduction
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Intel®E7500/E7505 Chipset MCH Thermal Design Guide 9
1.2 Definition of Terms
Term Definition
BGA Ball Grid Array. A package type defined by a resin-fiber substrate, onto which a die is
mounted, bonded and encapsulated in molding compound. The primary electrical
interface is an array of solder balls attached to the substrate opposite the die and
molding compound.
Intel®ICH3-S /
Intel®ICH4
I/O Controller Hub. The chipset component that contains the primary PCI interface,
LPC interface, USB, ATA-33, and other legacy functions.
MBGA Mini Ball Grid Array. A version of the BGA with a smaller ball pitch.
MCH Memory Controller Hub. The chipset component that contains the processor interface
and the memory interface.
FC-BGA Flip Chip Ball Grid Array. A package type defined by a resin-fiber substrate where a die
is mounted using an underfilled C4 (Controlled Collapse Chipset Connection) attach
style. The primary electrical interface is an array of solder balls attached to the
substrate opposite the die. The device arrives at the customer with solder balls
attached. This is the packaging technology used for the MCH.
Intel®P64H2 Bus Controller Hub. The chipset component that interfaces the PCI-X buses.
Tcase Maximum die temperature allows. This temperature is measured at the geometric
center of the top of the package die.
TDP Thermal Design Power. Thermal solutions should be designed to dissipate this target
power level.

Introduction
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10 Intel®E7500/E7505 Chipset MCH Thermal Design Guide
1.3 Reference Documents
Document Document
Number
Intel®Xeon™ Processor Thermal Design Guidelines
http://www.intel.com/design/Xeon/guides/298348.htm
298348
Intel®PCI/PCI-X 64-bit Hub 2 (P64H2) Thermal and Mechanical Design Guidelines 298648
Intel®Xeon™ Processor with 512-KB L2 Cache and Intel®E7500 Chipset Platform
Design Guide
298649
Intel®E7500 Chipset: E7500 Memory Controller Hub (MCH) Datasheet 290730
Intel®Xeon™ Processor and Intel®E7505 Chipset Platform Design Guide 251934
Intel®E7505 Chipset Memory Controller Hub (MCH) Datasheet 251932
Intel®82801CA I/O Controller Hub 3 (ICH3-S) Datasheet 290733
Intel®82801DB I/O Controller Hub 4 (ICH4) Datasheet 290744
Intel®82870P2 PCI/PCI-X 64-bit Hub 2 (P64H2) Datasheet 290732
BGA/OLGA Assembly Development Guide Note 1
Thermal Design Suggestions for various form factors
http://www.formfactors.org
NOTES:
1. Contact your Intel Field Sales representative.

Packaging Technology
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Intel®E7500/E7505 Chipset MCH Thermal Design Guide 11
2 Packaging Technology
The E7500 chipset consists of three individual components: Intel®E7500 chipset MCH, Intel®
82870P2 P64H2, and Intel®82801CA ICH3-S. The E7505 chipset includes the same components
except for the I/O controller hub, which is an Intel®82801DB ICH4. The E7500/E7505 chipset
MCH components use a 42.5 mm, 6-layer FC-BGA package (see Figure 2 and Figure 3). For
information on the P64H2 package, refer to the Intel®82870P2 PCI/PCI-X 64-bit Hub 2 (P64H2)
Thermal and Mechanical Design Guidelines and the Intel®82870P2 PCI/PCI-X 64-bit Hub 2
(P64H2) Datasheet. For information on the ICH3-S package, refer to the Intel®82801CA I/O
Controller Hub 3 (ICH3-S) Datasheet. For information on the ICH4 package, refer to the Intel®
82801DB I/O Controller Hub 4 (ICH4) Datasheet.
Figure 2. MCH Package Dimensions (Side View)
1.10 ± 0.10 mm
Die Substrate
0.60 ± 0.10 mm Seating Plane
Package_Dimensions_Side
1.940 ± 0.150 mm
0.20 –C–
See note 1.
NOTES:
1. Primary datum –C– and seating plane are defined by the spherical crowns of the solder balls.
2. All dimensions and tolerances conform to ANSI Y14.5M–1982.

Packaging Technology
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12 Intel®E7500/E7505 Chipset MCH Thermal Design Guide
Figure 3. MCH Package Dimensions (Top View)
AN
AM
AL
AK
AJ
AH
AG
AF
AE
AD
AC
AB
AA
Y
W
V
U
T
R
P
N
M
L
K
J
H
G
F
E
E
C
B
A
101620 3579
111315
19 4618 81214
22 21
24 23 26 25
28 27
30 29
31
32
(n)x 0.025 Min
Metal Edge
(n)x ∅ 0.790 ± 0.025
Solder Resist Opening
(n)x 0.650 ± 0.040
Detail A
∅
∅∅
∅00.071 L C
∅
∅∅
∅00.200 L C A S B
33 1
2
1.270
20.320
40.640
2x 42.500 ±0.100
0.200 A B
1.270
21.250
Detail A
MCH_Pkg_TopView
17
NOTES:
1. All dimensions are in millimeters.
2. All dimensions and tolerances conform to ANSI Y14.5M–1982.

Thermal Simulation
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Intel®E7500/E7505 Chipset MCH Thermal Design Guide 13
3 Thermal Simulation
Intel provides thermal simulation models of the MCH and associated user’s guides to aid system
designers in simulating, analyzing, and optimizing their thermal solutions in an integrated system-
level environment. The models are for use with the commercially available Computational Fluid
Dynamics (CFD)-based thermal analysis tool “FLOTHERM*” (version 3.1 or higher) by
Flomerics* Inc. Contact your Intel Field Sales representative to order the thermal models and
user’s guides.

Thermal Simulation
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Thermal Specifications
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Intel®E7500/E7505 Chipset MCH Thermal Design Guide 15
4 Thermal Specifications
4.1 Case Temperature and Thermal Design Power
The TDP specifications are provide in Table 1 for the E7500 chipset MCH and Table 2 for the
E7505 chipset MCH. FC-BGA packages have poor heat transfer capability into the board and have
minimal thermal capability without thermal solutions. Intel recommends that system designers plan
for one or more heatsinks when using the E7500/E7505 chipset.
4.2 Die Temperature
To ensure proper operation and reliability of the MCH, the die temperatures must be at or below
the values specified in Table 1 and Table 2. System and/or component level thermal solutions are
required to maintain die temperatures below the maximum temperature specification. Refer to
Chapter 5 for guidelines on accurately measuring package die temperatures.
Table 1. Intel®E7500 Chipset MCH Thermal Specifications
Parameter Maximum
Tcase 102 °C
TDP 9 W
NOTE: Tcase is defined as the maximum die temperature with the reference thermal solution attached.
Table 2. Intel®E7505 Chipset MCH Thermal Specifications
Parameter Maximum
Tcase 105 °C
TDP 8 W
NOTE: Tcase is defined as the maximum die temperature with the reference thermal solution attached.

Thermal Specifications
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Thermal Metrology
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Intel®E7500/E7505 Chipset MCH Thermal Design Guide 17
5 Thermal Metrology
The system designer must make temperature measurements to accurately determine the thermal
performance of the system. Intel has established guidelines for proper techniques of measuring the
MCH die temperature. Section 5.1 provides guidelines on how to accurately measure the MCH die
temperatures. Section 5.2 contains information on running an application program that will
emulate anticipated maximum thermal design power. The flowchart in Figure 6 offers guidelines
for thermal performance and evaluation.
5.1 Die Temperature Measurements
To ensure functionality and reliability, the Tcase of the MCH must be maintained at or below the
maximum temperature specifications as noted in Table 1 and Table 2. The surface temperature at
the geometric center of the die corresponds to Tcase. Measuring Tcase requires special care to ensure
an accurate temperature measurement.
Temperature differences between the temperature of a surface and the surrounding local ambient
air can introduce errors in the measurements. The measurement errors could be due to a poor
thermal contact between the thermocouple junction and the surface of the package, heat loss by
radiation and/or convection, conduction through thermocouple leads, or contact between the
thermocouple cement and the heatsink base (if a heatsink is used). To maximum measurement
accuracy, only the 0° degree thermocouple attach approach is recommended for thermocouple
attach.
5.1.1 0° Angle Attach Methodology
1. Mill a 3.3 mm (0.13 in.) diameter and 1.5 mm (0.06 in.) deep hole centered on the bottom of
the heatsink base.
2. Mill a 1.3 mm (0.05 in.) wide and 0.5 mm (0.02 in.) deep slot, from the centered hole to one
edge of the heatsink. The slot should be in the direction parallel to the heatsink fins
(see Figure 5).
3. Attach thermal interface material (TIM) to the bottom of the heatsink base.
4. Cut out portions of the TIM to make room for the thermocouple wire and bead. The cutouts
should match the slot and hole milled into the heatsink base.
5. Attach a 36 gauge or smaller calibrated K-type thermocouple bead or junction to the center of
the top surface of the die using high thermal conductivity cement. During this step, make sure
no contact is present between the thermocouple cement and the heatsink base because any
contact will affect the thermocouple reading. It is critical that the thermocouple bead
makes contact with the die (see Figure 4).
6. Attach heatsink assembly to the MCH, and route thermocouple wire out through the milled
slot.

Thermal Metrology
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18 Intel®E7500/E7505 Chipset MCH Thermal Design Guide
Figure 4. 0 Angle Attach Methodology (Top View)
Cement +
Thermocouple Bead
angle_attach_1
Thermocouple Wire
Die
Substrate
NOTE: Not to scale.
Figure 5. 0° Angle Attach Heatsink Modifications
Angle_Attach_Heatsink_Mod
1.3 mm (0.05 in.)
(0.5 mm (0.02 in.) Depth)
3.3 mm (0.13 in.) Diameter
(1.5 mm (0.06 in.) Depth)
NOTE: Not to scale.

Thermal Metrology
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5.2 Power Simulation Software
The power simulation software is a utility designed to dissipate the thermal design power on an
E7500/E7505 chipset MCH when used in conjunction with Intel®Xeon™ processor with 512-KB
L2 cache. The combination of the Xeon processor(s) with 512-KB L2 cache and the higher
bandwidth capability of the E7500/E7505 chipsets enable new levels of system performance. To
assess the thermal performance of the chipset MCH thermal solution under “worst-case realistic
application” conditions, Intel has developed a software utility that operates the chipset at near
worst-case power dissipation.
The utility has been developed solely for testing customer thermal solutions at near the thermal
design power. Figure 6 shows a decision flowchart for determining thermal solution needs. Real
future applications may exceed the thermal design power limit for transient time periods. For
power supply current requirements under these transient conditions, refer to each component’s
datasheet for the ICC (Max Power Supply Current) specification. Contact your Intel Field Sales
representative to obtain a copy of this software.
Figure 6. Thermal Solution Decision Flowchart
Start
Therm_Flowchart
Attach device to
board using
normal reflow
process
Attach thermocouples
using recommended
methodology. Setup
the system in the
desired configuation.
Run the power
program and
monitor the
device die
temperature.
Tdie >
Specification?
End
No
Yes
Heatsink
requied
Select
heatsink

Thermal Metrology
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