Intel SL8K2 - Pentium 4 3.20EGHz 800MHz 1MB Socket 478... User manual

Intel®Pentium®4 Processor on
90 nm Process
Specification Update
September 2006
R
Notice: The Intel®Pentium®processor may contain design defects or errors known
as errata which may cause the product to deviate from published specifications.
Current characterized errata are documented in this Specification Update.
Document Number: 302352-031

R
2 Intel®Pentium®4 Processor on 90 nm Process Specification Update
INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL®PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY
ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN
INTEL’S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS, INTEL ASSUMES NO LIABILITY WHATSOEVER, AND INTEL
DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY, RELATING TO SALE AND/OR USE OF INTEL PRODUCTS INCLUDING LIABILITY OR
WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT,
COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. Intel products are not intended for use in medical, life saving, or life sustaining
applications.
Intel may make changes to specifications and product descriptions at any time, without notice.
Designers must not rely on the absence or characteristics of any features or instructions marked "reserved" or "undefined." Intel reserves these for
future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them.
The Intel®Pentium®processor may contain design defects or errors known as errata which may cause the product to deviate from published
specifications. Current characterized errata are available on request.
Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order.
1Hyper-Threading Technology requires a computer system with an Intel®Pentium®4 processor supporting HT Technology and a Hyper-Threading
Technology enabled chipset, BIOS and operating system. Performance will vary depending on the specific hardware and software you use. See
http:// www.intel.com/info/hyperthreading/ for more information including details on which processors support HT Technology.
Intel® Virtualization Technology requires a computer system with an enabled Intel® processor, BIOS, virtual machine monitor (VMM) and for some
uses, certain platform software enabled for it. Functionality, performance or other benefits will vary depending on hardware and software
configurations. Intel Virtualization Technology-enabled BIOS and VMM applications are currently in development.
ΔIntel processor numbers are not a measure of performance. Processor numbers differentiate features within each processor family, not across
different processor families. See http://www.intel.com/products/processor_number for details.
ΦIntel®Extended Memory 64 Technology (Intel®EM64T) requires a computer system with a processor, chipset, BIOS, operating system, device
drivers and applications enabled for Intel EM64T. Processor will not operate (including 32-bit operation) without an Intel EM64T-enabled BIOS.
Performance will vary depending on your hardware and software configurations. See www.intel.com/info/em64t for more information including
details on which processors support EM64T or consult with your system vendor for more information.
Not all specified units of this processor support Enhanced HALT State and Enhanced Intel SpeedStep® Technology. See the Processor Spec
Finder at http://processorfinder.intel.com or contact your Intel representative for more information.
Intel, Pentium, Celeron, Xeon, Intel SpeedStep, Intel Core, VTune and the Intel logo are trademarks or registered trademarks of Intel Corporation or
its subsidiaries in the United States and other countries.
*Other names and brands may be claimed as the property of others.
Copyright © 2004–2006, Intel Corporation

R
Intel®Pentium®4 Processor on 90 nm Process Specification Update 3
Contents
Revision History..................................................................................................................4
Preface................................................................................................................................6
Summary Tables of Changes .............................................................................................8
General Information ..........................................................................................................21
Identification Information...................................................................................................23
Errata ................................................................................................................................30
Specification Changes......................................................................................................73
Specification Clarifications................................................................................................74
Documentation Changes ..................................................................................................75
§

Revision History
R
4 Intel®Pentium®4 Processor on 90 nm Process Specification Update
Revision History
Revision
Number Description Date
-001 •Initial Release June 2004
-002 •Added content for Intel®Pentium®4 processor on 90 nm process
in 775-land package
•Added 775-land package processor upside marking diagram
in Figure 2
•Added processor identification information for 775-land
package to Table 1
•Notes added to clarify that C0 errata only apply to 478 pin
package
•Modified for Processor Identification information Table Notes
“Out-of-Cycle”
June 21 2004
-003 •Repaired drawings in Figures 1 and 2; reformatted document
layout “Out-of-Cycle”
June 22, 2004
-004 •Separated the D0 column in Summary Tables of Changes into
D0 and LD0 (L=LGA775) columns
•Updated errata R23 in summary table of changes
•Added errata R32-R38
Aug 2004
-005 •Updated Processor Identification Table, and Summary Table of
Changes
•Added errata R39-R54 Sept 2004
-006 •Updated Processor Identification Table, and Summary Table of
Changes
•Added E-stepping information
•Added errata R55-R68
Out of Cycle
9/23/2004
-007 •Updated and sorted Processor Identification Table
•Added errata R69-R74 October 2004
-008 •Updated Processor Identification Table
•Added errata R75-R77 November 2004
-009 •Updated Processor Identification Table
•Added errata R78, R79 December 2004
-010 •Updated Processor Identification Table December 2004
-011 •Updated Processor Identification Table and Summary Table of
Changes
•Added errata R80, R81, and R82 January 2005

Revision History
R
Intel®Pentium®4 Processor on 90 nm Process Specification Update 5
Revision
Number Description Date
-012 •Updated Processor Identification Table and its notes and
updated summary table of changes
•Added errata R83, R84, R85 February 2005
-013 •Updated Processor Identification Table, and Summary Table of
Changes, and processor upside marking for 660, 650, 640, and
630Δprocessor
•Added N-stepping information
•Added Errata R86
“Out of Cycle”
February 22, 2005
-014 •Updated Processor Identification Table, and Summary Table of
Changes
•Added Errata R87, R88, R89, R90 March 2005
-015 •Updated Summary Table of Changes, and affected documents
•Updated R31, R37, and added R91 April 2005
-016 •Updated R32 in Summary Table of Changes May 2005
-017 •Updated affected documents, added/updated 5x1 and 670 part
and processor upside marking, updated processor identification
table,
“Out of Cycle” May
26, 2005
-018 •Updated errata R36 and R41, and added specification changes
R1, and updated processor identification table June 2005
-019 •Added erratum R92 and updated related document July 2005
-020 •Added erratum R93, and updated processor identification table August 2005
-021 •Added errata R94, R95, and updated processor identification
table September 2005
-022 •Added G1-stepping info, updated processor identification table
and added errata R96, R97, R98 October 2005
-023 •Added R0-stepping info, updated affected document, updated
processor identification table and added errata R99-R109 “Out of Cycle”
November 14, 2005
-024 •Updated summary table of changes, updated processor
identification table and added erratum R110 December 2005
-025 •Updated erratum R17 and added errata R111-R114, updated
processor identification table, updated figure 3 and figure 4 to
show Pb-free marking January 2006
-026 •Updated related documents, updated processor identification
table, added erratum R115 February 2006
-027 •Added errata R116, R117 March 2006
-028 •Added errata R118, R119, R120 April 2006
-029 •Added erratum R121 May 2006
-030 •Added erratum R122, updated processor identification table June 2006
-031 •Updated R93, added R123, and updated processor identification
table September 2006
§

Preface
R
6 Intel®Pentium®4 Processor on 90 nm Process Specification Update
Preface
This document is an update to the specifications contained in the documents listed in the
following Affected Documents/Related Documents table. It is a compilation of device and
document errata and specification clarifications and changes, and is intended for hardware system
manufacturers and for software developers of applications, operating system, and tools.
Information types defined in the Nomenclature section of this document are consolidated into this
update document and are no longer published in other documents. This document may also
contain information that has not been previously published.
It is intended for hardware system manufacturers and software developers of applications,
operating systems, or tools. It contains S-Specs, Errata, Documentation Changes, Specification
Clarifications and Specification Changes.
Affected Documents
Document Title Document Number
Intel®Pentium®4 Processor on 90 nm Process Datasheet 300561-003
http://developer.intel.com/design/p
entium4/datashts/300561.htm
Intel®Pentium®4 Processors 570/571, 560/561, 550/551, 540/541,
530/531 and 520/521∆Supporting Hyper-Threading Technology
Datasheet On 90 nm Process in 775-land LGA Package and
supporting Intel®Extended Memory 64 TechnologyΦ
302351-004
http://developer.intel.com/design/p
entium4/datashts/302351.htm
Intel®Pentium®4 Processor 6xxΔSequence and Intel®Pentium®4
Processor Extreme Edition Datasheet On 90 nm Process in the 775-
land LGA Package and supporting Intel®Extended Memory 64
TechnologyΦ, and supporting Intel®Virtualization Technology
306382-003
http://developer.intel.com/design/p
entium4/datashts/306382.htm
Related Documents
Document Title Document Number
IA-32 Intel®Architecture Software Developer's Manual Volume 1:
Basic Architecture, document 253665
IA-32 Intel®Architecture Software Developer's Manual Volume 2A:
Instruction Set Reference Manual A–M, document 253666
IA-32 Intel®Architecture Software Developer's Manual Volume 2B:
Instruction Set Reference Manual, N–Z, document 253667
IA-32 Intel Architecture Software Developer's Manual Volume 3A:
System Programming Guide, document 253668
IA-32 Intel Architecture Software Developer's Manual Volume 3B:
System Programming Guide, document 253669
http://developer.intel.com/design/p
entium4/manuals/index_new.htm

Preface
R
Intel®Pentium®4 Processor on 90 nm Process Specification Update 7
Nomenclature
S-Spec Number is a five-digit code used to identify products. Products are differentiated by their
unique characteristics, e.g., core speed, L2 cache size, package type, etc. as described in the
processor identification information table. Care should be taken to read all notes associated with
each S-Spec number
Errata are design defects or errors. Errata may cause the Intel®Pentium®processor’s behavior to
deviate from published specifications. Hardware and software designed to be used with any given
stepping must assume that all errata documented for that stepping are present on all devices.
Specification Changes are modifications to the current published specifications. These changes
will be incorporated in the next release of the specifications.
Specification Clarifications describe a specification in greater detail or further highlight a
specification’s impact to a complex design situation. These clarifications will be incorporated in
the next release of the specifications.
Documentation Changes include typos, errors, or omissions from the current published
specifications. These changes will be incorporated in the next release of the specifications.
§

Summary Tables of Changes
R
8 Intel®Pentium®4 Processor on 90 nm Process Specification Update
Summary Tables of Changes
The following table indicates the Errata, Documentation Changes, Specification Clarifications, or
Specification Changes that apply to Pentium 4 processors on 90 nm process. Intel intends to fix
some of the errata in a future stepping of the component, and to account for the other outstanding
issues through documentation or specification changes as noted. This table uses the following
notations:
Codes Used in Summary Table
Stepping
X: Erratum, Specification Change or Clarification that applies to
this stepping.
(No mark) or (Blank Box): This erratum is fixed in listed stepping or specification change
does not apply to listed stepping.
Status
Doc: Document change or update that will be implemented.
Plan Fix: This erratum may be fixed in a future stepping of the product.
Fixed: This erratum has been previously fixed.
No Fix: There are no plans to fix this erratum.
PKG: This column refers to errata on the Intel®Pentium®4
processor on 90 nm process substrate.
AP: APIC related erratum.
Shaded: This item is either new or modified from the previous version
of the document.
Note: Each Specification Update item is prefixed with a capital letter to distinguish the product. The key
below details the letters that are used in Intel’s microprocessor Specification Updates:
A = Intel®Pentium®II processor
B = Mobile Intel®Pentium®II processor
C = Intel®Celeron®processor
D = Intel®Pentium®II Xeon®processor
E = Intel®Pentium®III processor
F = Intel®Pentium®processor Extreme Edition
G = Intel®Pentium®III Xeon®processor
H = Mobile Intel®Celeron®processor at 466 MHz, 433 MHz, 400 MHz, 366 MHz, 333 MHz,
300 MHz, and 266 MHz
K = Mobile Intel®Pentium®III Processor – M
L = Intel®Celeron®D processor
M = Mobile Intel®Celeron®processor
N = Intel®Pentium®4 processor

Summary Tables of Changes
R
Intel®Pentium®4 Processor on 90 nm Process Specification Update 9
O = Intel®Xeon®processor MP
P = Intel®Xeon®processor
Q = Mobile Intel®Pentium®4 processor supporting Hyper-Threading Technology on 90-nm
process technology
R = Intel®Pentium®4 processor on 90 nm process
S = 64-bit Intel®Xeon®Processor with 800 MHz system bus
T = Mobile Intel®Pentium®4 processor – M
U = 64-bit Intel®Xeon®processor MP with up to 8MB L3 Cache
V = Mobile Intel®Celeron®processor on 0.13 Micron Process in Micro-FCPGA Package
W = Intel®Celeron®M processor
X = Intel®Pentium®M processor on 90 nm process with 2-MB L2 cache
Y = Intel®Pentium®M processor
Z = Mobile Intel®Pentium®4 processor with 533 MHz system bus
AA = Intel®Pentium®processor Extreme Edition and Intel®Pentium®D processor on 65nm
process
AB = Intel®Pentium®4 processor on 65 nm process
AC = Intel®Celeron®Processor in 478 Pin Package
AD = Intel®Celeron®D processor on 65 nm process
AE = Intel®CoreTM Duo Processor and Intel®CoreTM Solo processor on 65nm process
NO. C01D0 LD02E0 LE02G11LG12LN02LR02Plan ERRATA
R1 X X X X X X X X X
No
Fix Transaction Is Not Retried after BINIT#
R2 X X X X X X X X X
No
Fix Invalid Opcode 0FFFh Requires a ModRM Byte
R3 X X X X X X X X X
No
Fix
Processor May Hang Due to
Speculative Page Walks to Non-
Existent System Memory
R4 X X X X X X X X X
No
Fix
Memory Type of the Load Lock
Different from Its Corresponding
Store Unlock
R5 X X X X X X X X X
No
Fix
Machine Check Architecture Error
Reporting and Recovery May Not
Work As Expected
R6 X X X X X X X X X
No
Fix Debug Mechanisms May Not Function as Expected
R7 X X X X X X X X X
No
Fix
Cascading of Performance
Counters Does Not Work Correctly
When Forced Overflow Is Enabled
R8 X X X X X X X X X
No
Fix EMON Event Counting of x87 Loads May Not Work As Expected
R9 X X X X X X X X X
No
Fix
System Bus Interrupt Messages
without Data Which Receive a
HardFailure Response May Hang
the Processor

Summary Tables of Changes
R
10 Intel®Pentium®4 Processor on 90 nm Process Specification Update
NO. C01D0 LD02E0 LE02G11LG12LN02LR02Plan ERRATA
R10 X X X X X X X X X
No
Fix
The Processor Signals Page-Fault
Exception (#PF) Instead of
Alignment Check Exception (#AC)
on an Unlocked CMPXCHG8B
Instruction
R11 X X X X X X X X X
No
Fix
FSW May Not Be Completely
Restored after Page Fault on
FRSTOR or FLDENV Instructions
R12 X X X X X X X X X
No
Fix
Processor Issues Inconsistent
Transaction Size Attributes for
Locked Operation
R13 X X X X X X X X X
No
Fix
When the Processor Is in the
System Management Mode (SMM),
Debug Registers May Be Fully
Writeable
R14 X X X X X X X X X
No
Fix
Shutdown and IERR# May Result
Due to a Machine Check Exception
on a Hyper-Threading Technology
Enabled Processor
R15 X X X X X X X X X
No
Fix
Processor May Hang under Certain
Frequencies and 12.5% STPCLK#
Duty Cycle
R16 X X X X X X X X X
No
Fix
System May Hang if a Fatal Cache
Error Causes Bus Write Line (BWL)
Transaction to Occur to the Same
Cache Line Address as an
Outstanding Bus Read Line (BRL)
or Bus Read-Invalidate Line (BRIL}
R17 X X X X X X X X X
No
Fix
A Write to an APIC Registers
Sometimes May Appear to Have
Not Occurred
R18 X Fixed
Some Front Side Bus I/O
Specifications are not Met
R19 X X X X X X X X X
No
Fix Parity Error in the L1 Cache May Cause the Processor to Hang
R20 X Fixed
BPM4# Signal Not Being Asserted
According to Specification
R21 X X X X X Fixed
Sequence of Locked Operations
Can Cause Two Threads to
Receive Stale Data and Cause
Application Hang
R22 X X X Fixed
A 16-bit Address Wrap Resulting
from a Near Branch (Jump or Call)
May Cause an Incorrect Address to
be Reported to the #GP Exception
Handler
R23 X X X X X X X X X
No
Fix
Bus Locks and SMC Detection May
Cause the Processor to Hang
Temporarily