JYTEK PXIe-3127e User manual

PXIe-3127e/3125e
PXI Express Embedded
Controller
User’s Manual
Manual Rev.: 1.0
Revision Date: Dec.21,2023

ii
Revision History
Revision Release Date Description of Change(s)
1.0 2023-12-21 Initial release

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PXIe-3127e/3125e
Preface
Copyright © 2023 Shanghai Jianyi Technology Co., Ltd.
This document contains proprietary information protected by copyright.
All rights are reserved. No part of this manual may be reproduced by
any mechanical, electronic, or other means in any form without prior
written permission of the manufacturer.
Disclaimer
The information in this document is subject to change without prior
notice in order to improve reliability, design, and function and does not
represent a commitment on the part of the manufacturer.
In no event will the manufacturer be liable for direct, indirect,
special, incidental, or consequential damages arising out of the use
or inability to use the product or documentation, even if advised of
the possibility of such damages.
JYTEK is committed to fulfill its social
responsibility to global environmental preservation
through compliance with the European Union's
Restriction of Hazardous Substances (RoHS)
directive and Waste Electrical and Electronic
Equipment (WEEE) directive. Environmental
protection is a top priority for JYTEK. We have
enforced measures to ensure that our products,
manufacturing processes, components, and raw
materials have as little impact on the environment as possible.
When products are at their end of life, our customers are encouraged
to dispose of them in accordance with the product disposal and/or
recovery programs prescribed by their nation or company.
Battery Labels (for products with battery)
废电池请回收

iv
California Proposition 65 Warning
WARNING: This product can expose you to chemicals
including acrylamide, arsenic, benzene, cadmium,
Tris(1,3-dichloro-2-propyl)phosphate (TDCPP), 1,4-Dioxane,
ane, formaldehyde, lead, DEHP, styrene, DINP, BBP, PVC, and vinyl
materials, which are known to the State of California to cause cancer,
and acrylamide, benzene, cadmium, lead, mercury, phthalates,
toluene, DEHP, DIDP, DnHP, DBP, BBP, PVC, and vinyl materials,
which are known to the State of California to cause birth defects or
other reproductive harm. For more information go to
www.P65Warnings.ca.gov.
Trademarks
Product names mentioned herein are used for identification
purposes only and may be trademarks and/or registered trademarks
of their respective companies.
Conventions
Take note of the following conventions used throughout this
manual to make sure that users perform certain tasks and
instructions properly.
NOTE:
NOTE:
Additional information, aids, and tips that help users perform
tasks.
CAUTION:
Information to prevent minor physical injury, component damage,
data loss, and/or program corruption when trying to complete a
task.
WARNING:
Information to prevent serious physical injury, component
damage, data loss, and/or program corruption when trying to
complete a specific task.

v
Table of Contents
Revision History...................................................................... ii
Preface .................................................................................... iii
List of Figures ........................................................................ ix
List of Tables.......................................................................... xi
1 Introduction ........................................................................ 1
1.1 Features............................................................................... 2
1.2 Specifications....................................................................... 3
1.3 I/O and Indicators ................................................................ 7
1.3.1 Front Panel ................................................................. 7
1.3.2 GPIB Connector ....................................................... 10
1.3.3 Reset Button............................................................. 11
1.3.4 LED Indicators .......................................................... 11
1.3.5 USB 2.0 Ports........................................................... 11
1.3.6 Gigabit Ethernet Ports .............................................. 12
1.3.7 USB 3.0 Ports........................................................... 13
1.3.8 COM Port.................................................................. 14
1.3.9 Onboard Connections and Settings.......................... 15
2 Getting Started ................................................................. 17
2.1 Package Contents ............................................................. 17
2.2 Operating System Installation............................................ 17
2.2.1 Installation Environment ........................................... 18
2.2.2 Installingthe PXIe-3127e/3125e............................... 20
2.2.3 Replacing the Hard Drive or Solid State Drive ......... 23
2.2.4 Replacing the Battery Backup .................................. 25
2.2.5 Clearing CMOS ........................................................ 26
PXIe-3127e/3125e

vi
3 Driver Installation.............................................................. 27
A Appendix: PXI Trigger I/O Function Reference...............29
A.1 Data Types......................................................................... 29
A.2 Function Library ................................................................. 30
A.2.1 TRIG_Init .................................................................. 30
A.2.2 TRIG_Close.............................................................. 31
A.2.3 TRIG_SetSoftTrg...................................................... 31
A.2.4 TRIG_Trigger_Route ................................................ 32
A.2.5 TRIG_Trigger_Clear ................................................. 34
A.2.6 TRIG_GetSoftTrg...................................................... 34
A.2.7 TRIG_Trigger_Route_Query .................................... 35
A.2.8 TRIG_GetDriverRevision.......................................... 37
B Appendix: Legacy Boot Mode Settings........................... 39
Important Safety Instructions .............................................. 41
Getting Service...................................................................... 45

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ix
List of Figures
Figure 1-1: Functional Block Diagram................................................ 3
Figure 1-2: Front Panel ...................................................................... 7
Figure 1-3: PXI Trigger SMB Jack ..................................................... 8
Figure 1-4: DisplayPort Connector..................................................... 9
Figure 1-5: GPIB Connector............................................................. 10
Figure 1-6: LED Indicators ............................................................... 11
Figure 1-7: COM Port....................................................................... 14
Figure 1-8: Onboard Configuration .................................................. 15
Figure B-1: BIOS Setup Navigation.................................................. 41
PXIe-3127e/3125e

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xi
List of Tables
Table 1-1: Front Panel Legend ......................................................... 7
Table 1-2: DisplayPort Pin Assignment ............................................ 9
Table 1-3: GPIB Pin Description ..................................................... 10
Table 1-4: LED Indicator Legend.................................................... 11
Table 1-5: USB 2.0 Port Pin Assignment........................................ 12
Table 1-6: Ethernet Port Pin Assignments...................................... 12
Table 1-7: D-sub COM Port Signal Functions................................. 14
Table 1-8: Onboard Configuration Legend ..................................... 15
Table B-1: BIOS Hot Key Functions................................................ 41
PXIe-3127e/3125e

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Introduction 1
1 Introduction
The JYTEK PXIe-3127e/3125e PXI Express™ embedded
controller is based on the twelfth generation Intel®Core™ i7/i5
processor specifically designed for PXI Express-based test-ing
systems. A rugged and stable operating environment is provided
for a variety of testing and measurement applications.
Combining state-of-the-art Intel®Core™ i7-11850HE/i5-11500HE
processors and DDR43200MHz memory, the
PXIe-3127e/3125e utilizes separate computing engines on a
single processor, enabling execution of multiple independent tasks
simultaneously. With a configurable PCIe switch, the
PXIe-3127e/3125e can support four links at x4 or two links at x8
PXI Express link capability, with maximum system throughput of
up to 16GB/s (PCI Express 3.0).
PXI Express-based testing systems typically make up a PXI
Express platform and diversified standalone instruments for
complex testing tasks. The PXIe-3127e/3125e series provides
ample interfaces, including two DisplayPort connectors, allowing
connection to two monitors, dual USB 3.0 connections for high
speed peripheral devices, dual Gigabit Ethernet ports, one for LAN
connection and the other for controlling LXI instruments, four USB
2.0 ports for peripheral devices and USB instrument control, and a
Micro-D GPIB connector for GPIB instrument connection, allowing
for control of hybrid PXI-based testing systems.
NOTE:
NOTE:
Memory addressing over 4GB is OS-dependent, such that a
32-bit operating system may be unable to address memory
space over 4GB. To fully utilize memory,64-bit operating
systems arerequired.
PXIe-3127e/3125e

2 Introduction
1.1 Features
PXITM-5 PXI Express Hardware Specification Rev.1.1
Intel® Core™ i7-11850HE/i5-11500HE processor for
maximum computing power
DDR4SODIMM x2
Default: 16G , up to 64GB 3200MHz
Maximum System Throughput 16GB/s
PXI Express Link Capability
Four Link Configuration: x4x4 x4x4
Two Link Configuration: x8x8
Optional SATA SSD
Supports 2.5” SSD
SATA6.0 Gb/s
Supports AHCI
Integrated I/O
Dual Gigabit Ethernet ports
Two USB 3.2Ports
Four USB 2.0 Ports
Built-in GPIB (IEEE488) controller
Dual DisplayPort connectors
One COM port (D-sub 9-pin serial)
Trigger I/O for advanced PXITM trigger functions
OS
Microsoft Windows 10/11 64-bit
Linux (Kernel>5.8)

Introduction 3
1.2 Specifications
Figure 1-1: Functional Block Diagram
Processor
Intel®Core™ i7-11850HE/i5-11500HE processor
Memory
Two standard 260-pin DDR4SODIMM sockets
Supports 3200MHz RAMup to 64 GBtotal
Supports non-ECC, unbuffered memory
NOTE:
NOTE:
The externally accessible SODIMM socket can accept replacement
DDR5DRAM DIMM modules.
PXIe-3127e/3125e specifications and stability guarantees are
only supported when JYTEK-provided DDR4DRAM SODIMM
modules are used.
Front Panel
Connectors
DisplayPort
Connector x2
GPIB
Connector
GbE
Connector
GbE
Connector
USB 3.2
Connector x2
USB 2.0
Connector x4
COM Port
Connector
(RS-23 2/422/485)
lntel Chipset
HM570E
GPIB Controller
GbE Controller
i210
LCP-COM Port
Programmable MUX
SMBus Controller
DP/HDMI Dual Mode
USB 3.2
USB 2.0
LPC
PCIe x1
Trigger Signal
SMB
Connector
SATA
2.5" SATA
Storage
PCI Express
Switch
(PCI Express 3.0)
DDR4 3200MHz
SODIMM x2
Bus
PCIe 3.0 x16
Rear
Connectors to
PXI Express
Chassis
PCIe 3.0
2 Link Mode
(x 8x8)
OR
PCIe 3.0
4 Link Mode
(x4 x4 x4 x4)
SMBus
Trigger Bus
PXIe-3127e/3125e
GbE Controller
i225
PCIe x1
PCIe x1
PCIe x1
11th Generation
Intel® Core™
i7-11850HE/i5-11500HE
Processor
(formerly “Tiger Lake”)

4 Introduction
Video
DisplayPort supports up to3840 x2160 @ 60Hz resolution
DVI (with passive DisplayPort-to-DVI adapter) supports
resolution up to1920 x1200 @ 60 Hz
Storage
Built-in 512GB NVMe SSD and optional SATA port for 2.5" SSD.
I/O Connectivity
Dual Gigabit Ethernet controllers through two RJ45 connectors
with speed/link/active LED on the faceplate, with both supporting
Wake-on-LAN.
USB
Four USB 2.0 and two USB 3.2ports on the faceplate.
GPIB
Onboard IEEE488 GPIB controller through Micro-D 25-pin
connector on the faceplate.
Trigger I/O
One SMB connector on the faceplate to route an external trigger
signal to/from PXI trigger bus
Dimensions (3U PXI module)
3U/4-slot PXI standard
Weight
1.0 kg (exclusive of packaging)
NOTE:
NOTE:
DisplayPort adapters for other standards are available, with
maximum available resolution dependent on the adapter
chosen

Introduction 5
Environmental
Shock and Vibration
Functional shock 30G, half-sine, 11ms pulse duration
Random vibration:
Operating 5 to 500Hz, 0.21Grms, 3 axes
Non-operating 5 to 500Hz, 2.46Grms, 3 axes
Operating temperature with SSD 0 to 55°C
Storage temperature -40 to 71°C
Relative humidity, non-condensing 5 to 95%
NOTE:
NOTE:
Environmental & Shock and Vibration values are only
guaranteed with use of an JYTEK provided SSD.
PXIe-3127e/3125e

6 Introduction
Power Requirements
Typical Consumption DC +3.3V DC +5V DC +12V
Typical operation
(Measured while W10 is idle) 1.722A 5.687A 1.953A
Heavy operation
(Measured while W10 is under heavy
CPU and storage utilization)
1.728A 6.460A 6.000A

Introduction 7
1.3 I/O and Indicators
1.3.1 Front Panel
Figure 1-2: Front Panel
Table 1-1: Front Panel Legend
A Reset Button F GPIB Connector
(Micro D-sub 25-pin)
B2xDisplayPort G 2xGigabit Ethernet
Cx2USB 3.2H PXI Trigger
D4xType-A USB 2.0
I LED indicators
ECOM port
(D-sub 9-pin serial)
A
C
G
B
D
F
H
E
I
PXIe-3127e/3125e

8 Introduction
PXI Trigger Connector
Figure 1-3: PXI Trigger SMB Jack
The PXI trigger connector is an SMB jack, used to route external
trigger signals to or from the PXI backplane. Trigger signals are
TTL-compatible and edge sensitive. The PXIe-3127e/3125e
provides four trigger routing modes from/to the PXI trigger
connector to synchronize PXI modules, including
From a selected trigger bus line to PXI trigger connector
From the PXI trigger connector to a selected trigger bus line
From software trigger to a selected trigger bus line
From software trigger to PXI trigger connector
All trigger modes are programmable by the provided driver.
DisplayPort Connectors
Provides monitor connection for VGA/DVI/HDMI monitors;
installation of requisite adapters required. Dual display function
is also supported.
Trigger
Ground

Introduction 9
Figure 1-4: DisplayPort Connector
Table 1-2: DisplayPort Pin Assignment
Pin Signal Pin Signal
1 CN_DDPx0+ 11 GND
2 GND 12 CN_DDPx3-
3 CN_DDPx0- 13 CN_DDPx_AUX_SEL
4 CN_DDPx1+ 14 CN_DDPx_CONFIG2
5 GND 15 CN_DDPx_AUX+
6 CN_DDPx1- 16 GND
7 CN_DDPx2+ 17 CN_DDPx_AUX-
8 GND 18 CN_DDPx_HPD
9 CN_DDPx2- 19 GND
10 CN_DDPx3+ 20 +V3.3_DDPx_PWR
19 1
2
20
PXIe-3127e/3125e