Mitsubishi Q Series User manual

Basic Model QCPU(Q Mode) User's Manual (Function Explanation, Program Fundamentals)
U
User's Manual (Function Explanation, Program Fundamentals) User's Manual
Mitsubishi Programmable
Logic Controller
Specifications subject to change without notice.
MODEL
MODEL
CODE
SQCPU(Q)-U-KI-E
13JR44
SH(NA)-080188-A(0108)MEE
Basic Model QCPU(Q Mode) Basic Model QCPU(Q Mode)
(Function Explanation,
Program Fundamentals)
When exported from Japan, this manual does not require application to the
Ministry of Economy, Trade and Industry for service transaction permission.
HEAD OFFICE : 1-8-12, OFFICE TOWER Z 14F HARUMI CHUO-KU 104-6212,JAPAN
NAGOYA WORKS : 1-14 , YADA-MINAMI 5 , HIGASHI-KU, NAGOYA , JAPAN

1 - 2 1 - 2
MELSEC-Q
1 OVERVIEW
1
The following table indicates differences between the Basic model QCPU.
Item Q00JCPU Q00CPU Q01CPU
CPU module CPU module, Power supply module, Main base unit
(5 slots) Integrated type Stand-alone CPU module
Main base unit Unnecessary Necessary (Q33B, Q35B, Q38B, Q312B)
Extension base unit Connectable (Q52B, Q55B, Q63B, Q65B, Q68B, Q612B)
Number of extension stages Up to 2 stages Up to 4 stages
Number of input/output modules to be
installed 16 modules 24 modules
Power supply module
Main base unit Unnecessary Necessary (Q61P-A1, Q61P-A2, Q62P, Q63P)
Q52B, Q55B Unnecessary
Extension
base unit Q63B, Q65B, Q68B, Q612B Necessary (Q61P-A1, Q61P-A2, Q62P, Q63P)
Extension cable QC05B, QC06B, QC12B, QC30B, QC50B, QC100B
Memory card interface No
RS-232 Yes (transmission rate: 9.6kbps, 19.2kbps, 38.4kbps, 57.6kbps, 115.2 kbps)
External interface USB No
LD X0 0.20µs 0.16µs 0.10µs
Processing speed
(Sequence instruction) MOV D0 D1 0.70µs 0.56µs 0.35µs
Program capacity 8k steps (32 kbyte) 8k steps (32 kbyte) 14k steps (56 kbyte)
Program memory 58 kbyte 94 kbyte
Standard RAM —— 64 kbyte
Memory
capacity Standard ROM 58 kbyte 94 kbyte
Device memory capacity The numberof device points can be changed within the range of 16.4 kbyte
Number of input/output devices points
(Remote I/O is contained.) 2048 points
Number of input/output points 256 points 1024 points
File register No Yes (32k points fixed)
Serial communication function No Yes
(using the RS-232 interface of the CPU module)
: 1 step of the program capacity is 4 Bytes.

1 - 3 1 - 3
MELSEC-Q
1 OVERVIEW
1.1 Features
(1) Many controllable input/output points
As the number of input/output points accessible to the input/output modules
loaded on the base units, 256 points (X/Y0 to FF) are supported by the
Q00JCPU and 1024 points (X/Y0 to 3FF) by the Q00CPU/Q01CPU.
Up to 2048 points (X/Y0 to 7FF) are supported as the number of input/output
device points usable for refreshing the remote input/output of CC-Link and the
link inputs and outputs (LX, LY) of MELSECNET/H.
(2) Lineup according to program capacity
The optimum CPU module for the program capacity to be used can be selected.
Q00JCPU, Q00CPU : 8k steps
Q01CPU : 14k steps
(3) Fast processing
The LD instruction processing speeds are the following values.
Q00JCPU : 0.20µs
Q00CPU : 0.16µs
Q01CPU : 0.10µs
In addition, the high-speed system bus of the MELSEC-Q series base unit
speeds up access to an intelligent function module and the link refresh of a
network.
MELSECNET/H link refresh processing : 2.2ms/2k words 1
*1 This speed only applies when the SB/SW is not used with the Q01CPU and
the MELSECNET/H network module is used as the main base unit.
(4) Increase in debugging efficiency through high-speed
communication with GX Developer
The RS-232 interface of the Basic model QCPU enables program write/read or
monitor at a maximum of 115.2kbps.
(5) Saved space by a reduction in size
The installation area of the Basic model QCPU is about 60% of that of the AnS
series.
1SX10 1SY50 1SX41 1SY41 1SX81 1SY81 1SX42 1SY42
9
8mm
(3.86
inch)
5 Slot Main Base Unit 245mm(9.65inch)
8 Slot Main Base Unit 328mm(12.92inch)
12 Slot Main Base Unit 439mm(17.30inch)
(depth:98mm(3.86inch))
Comparison of installation space

1 - 4 1 - 4
MELSEC-Q
1 OVERVIEW
(6) Connection of up to four/two extension base units
(a) The Q00JCPU can connect up to two extension base units (three base units
including the main) and accepts up to 16 modules.
(b) The Q00/Q01CPU can connect up to four extension base units (five base
units including the main) and accepts up to 24 modules.
(c) The overall distance of the extension cables is up to 13.2m to ensure high
degree of extension base unit arrangement.
POINT
When bus-connecting the GOT, the number of extension base units connected
decreases by one since the GOT uses one stage of the above base units.
(7) Serial communication function for communication with personal
computer or display device
With the RS-232 interface of the Q00CPU or Q01CPU connected with a personal
computer, display device or the like, the MELSEC communication protocol
(hereafter refered to as the MC protocol) can be used to make communication.
RS-232 cable
Communication in
MC protocol
Personal computer,
display device
The serial communication function only allows communication in the MC protocol
(QnA-compatible 3C frame (format 4), QnA-compatible 4C frame (format 4, 5)).
The serial communication function does not allow communication in the
nonprocedure protocol or bidirectional protocol.
Refer to the following manual for the MC protocol.
• Q Corresponding MELSEC Communication Protocol Reference Manual
(8) Built-in standard ROM
The flash ROM for storing parameters and sequential program is installed as a
standard feature for easier protection of important program.
(9) Easy operation of CC-Link system
The I/O signals for up to 32 remote I/O stations can be controlled without
parameters when one master module of the CC-Link system is used.
The remote I/O stations can be controlled in a similar manner to controlling the
input/output modules installed on the base unit.
(10) Blocking an invalid access using the file password
Program can be prevented from being altered through invalid access by
presetting the access level (reading prohibited, writing prohibited) in the file
password.

1 - 5 1 - 5
MELSEC-Q
1 OVERVIEW
1.2 Program Storage and Calculation
(1) Program storage
Program created at GX Developer can be stored in Basic model QCPU's
program memory or standard ROM.
Q00JCPU Q00/Q01CPU
Program memory
Program
Comment
Standard ROM 1
Parameters 3
Program
Comment
Standard RAM 2
File registers
Parameters 3 Program memory
Program
Comment
Parameters 3
Standard ROM 1
Parameters 3
Program
Comment
1: The standard ROM is used when parameters, program and comment
are written to ROM.
2: The standard RAM is used for file registers.
3: Including the intelligent parameters of the intelligent function module
set on GX Configurator.
(2) The Basic model QCPU processes program which are stored in the
program memory.
Program memory Execution of program
in program memory
Q00J/Q00/Q01CPU
Parameter
Program

1 - 6 1 - 6
MELSEC-Q
1 OVERVIEW
(3) Boot operation of program
The program stored on the standard ROM is booted (read) to the program
memory of the Basic model QCPU and executed.
Booting a program from the standard ROM to the program memory requires boot
file setting in the PLC parameter.
Boot
Execution of program booted
from the standard ROM to
the program memory.
Basic model QCPU
Program memory
Parameter
Program
Standard ROM
Parameter
Program

1 - 7 1 - 7
MELSEC-Q
1 OVERVIEW
1.3 Convenient Programming Devices and Instructions
The Q00J/Q00/A01CPU features devices and instructions which facilitate program
creation. A few of these are described below.
(1) Flexible device designation
(a) Word device bits can be designated to serve as contacts or coils.
Switches b10
of D0 ON and
OFF (1/0).
The 1/0 status
of b5 of D0 is used
as ON/OFF data.
b13
D0 b14b15 b12b11b10 1/0 b9 b8 b7 b6 b5 1/0 b4 b3 b2 b1 b0
[For the case of Basic model QCPU]
X0 D0.A
[For the case of AnS]
X0 K4M0
D0
D0MOV
K4M0MOV
M5 M10
: D0.5 Bit designation
Word device designation
Bit designation of
word device
D0.5
(b) Direct processing in 1-point units is possible within a program simply by
using direct access inputs (DX ) and direct access outputs (DY ).
Output tooutput
module at
instructionexecution
[For the case of Basic model QCPU]
M0 DX10 DY100
[For the case of AnS]
M9036 K1B0
K1B0
K1X10
SEG
K1Y100SEG
X10 Y100
M9036 M9052SET
M0
M9036
(X10 to X13 refresh)
(Y100 to Y103 refresh)
(Always ON)
Read from input
module at
instruction
execution
Direct access input
(c) Differential contacts ( /) eliminate the need for converting inputs to
pulses.
ON at leading
edge of X0
[For the case of Basic model QCPU]
X0 X1 Y100
[For the case of AnS]
M0
X0 M0PLS
Y100
Y100
X1
Y100
Differential contact

1 - 8 1 - 8
MELSEC-Q
1 OVERVIEW
(d) The buffer memory of intelligent function module (e.g. Q64AD, Q62DA) can
be used in the same way as devices when programming.
Readout of Q64AD
buffer memory's
address 12 data
[For the case of Basic model QCPU]
X0
[For the case of AnS]
X0 K1D10K12H4
FROMP
D0D10
+P
D0
U4\G12
+P
:U4\G12 Buffer memory address
designation
Intelligent function
module designation
Input/output Nos.:X/Y40 to X/Y4f
Power supply module
Q00CPU
Input (16 points) Input (16 points) Input (16 points)
Q64AD (16 points) Q64AD (16 points) Q62AD (16 points)
Output (16 points) Output (16 points)
(e) Direct access to link devices (LX, LY, LB, LW, LSB, LSW) of
MELSECNET/H network modules (e.g. QJ71LP21-25) is possible without
refresh settings.
Direct readout of the No.5 network module's
"LW12" link register
X0 D0
J5\W12
+P
Network No.5
:J5\W12 Link register designation
Network No. designation
Power supply module
Q00CPU
QJ71LP21-25
Input (16 points) Input (16 points)
Q68AD (16 points) Q68AD (16 points) Q62AD (16 points)
Output (16 points) Output (16 points)
(f) If index-qualified, each instruction of the Basic model QCPU does not
increase in processing time, facilitating writing of a structured program.

1 - 9 1 - 9
MELSEC-Q
1 OVERVIEW
(2) Edge relays simplify pulse conversion processing
(a) The use of a relay (V) that comes ON at the leading edge of the input
condition simplifies pulse processing when a contact index qualification has
been made.
X0Z1 V0Z1 M0Z1
K1000FOR
Z1RST
Z1INC
NEXT
M1000
M1000
[Circuit example]
Reset index register (Z1)
Repetition (1000 times) designation
Pulsing M0 to M999
Increment Index Register (Z1) (+1)
Return to FOR instruction
When Z1=0
X0 OFF
V0 OFF
M0 OFF
ON
ON
ON
1 Scan
[Timing chart]
When Z1=1
X1 OFF
V1 OFF
M1 OFF
ON
ON
ON
1 Scan
REMARK
: NUL indicates "00H(character string END)".
Data processing instructions such as table processing instructions, etc., enable
high-speed processing of large amounts of data.
X0 K2R0D0FINSP
Insertion
source R0 FIF0 table
R1
R2
R3
3
10
20
30
R4
Insertion
designationInsertion position R0 FIF0 table
R1
R2
R3
4
10
15
20
30R4
D0 15
Instruction for data insertion at table

1 - 10 1 - 10
MELSEC-Q
1 OVERVIEW
(4) Easy shared use of sub-routine programs
Subroutine call instructions with arguments will make it easier to create a
subroutine programs that makes several calls.
Argument designation
M10
100
M0 R0K4X00W0P0CALLP
R10K4X10W10P0CALLP
Argument from FD2
Argument to FD1
Argument to FD0
Argument from FD2
Argument to FD1
Argument to FD0
Argument designation
Subroutine program
designation
FEND
Sub-routine program
FD2FD1MOV
SM400 FD2FD0MOV
RET
M0
M0
P0 Always
ON
source data Destination data
END
Main routine program
REMARK
For details regarding the argument input/output condition, refer to Section 10.3.1.

2 - 1 2 - 1
MELSEC-Q
2 SYSTEM CONFIGURATION
2
2. SYSTEM CONFIGURATION
This section describes the system configuration of the Basic model QCPU, cautions on
use of the system, and configured equipment.
2.1 System Configuration
2.1.1 Q00JCPU
This section explains the equipment configuration of a Q00JCPU system and the
outline of the system configuration.
(1) Equipment configuration
Q6 B extension base unit
(Q63B, Q65B, Q68B, Q612B)
Battery
(Q6BAT) Basic model QCPU
(Q00JCPU) Input/output module/
Intelligent function module
Extension cable
(QC05B, QC06B, QC12B,
QC30B, QC50B, QC100B)
Input/output module/
Intelligent function module
MITSUBISHI
LITHIUM BATTERY
Q5 B extension base unit
(Q52B, Q55B)
Power supply module/
Input/output module/
Intelligent function module

2 - 2 2 - 2
MELSEC-Q
2 SYSTEM CONFIGURATION
2
(2) Outline of system configuration
System configuration
Extension 2
C
P
U
00
0F
10
1F
20
2F
30
3F
40
4F
01234
Extension base unit (Q68B)
12111098765
50
5F
151413
D0
DF
12111098765
50
5F
Extension
cable
Slot number
O
U
T
I
N
O
U
T
Extension 1 Extension 1
O
U
T
I
N
O
U
T
I
N
Extension base unit (Q65B)
Extension base unit (Q68B)
60
6F
70
7F
80
8F
90
9F
A0
AF
B0
BF
C0
CF
E0
EF
F0
FF
(a) System including extension base units
Inhibited
Extension cable connector
Loading will cause error
(b) System including extension base unit and GO
T
Number of extension units: 2
Slot No. : 0
Inhibited
Power supply module
Power supply module
C
P
U
00
0F
10
1F
20
2F
30
3F
40
4F
01234
O
U
T
Extension
cable
60
6F
70
7F
80
8F
90
9F
A0
AF
B0
BF
C0
CF
Both of the above systems assume that each slot of the main and extension base units is
loaded with a 16-point module.
Power supply module
Maximum number of
Extension Stages Two Extension Stages
Maximum number of
input/output modules to
be installed 16 modules
Maximum number of
input/output points 256
Main base unit Unnecessary
Extension base unit Q52B, Q55B, Q63B, Q65B, Q68B, Q612B
Extension cable QC05B, QC06B, QC12B, QC30B, QC50B, QC100B
Notes
(1) Do not use an extension cable longer than an overall extension length of 13.2m(43.31ft.).
(2) When using an extension cable, do not bind it together with the main circuit (high voltage and
heavy current) line or do not lay down them closely to each other.
(3) When setting the No. of the expansion stages, set it in the ascending order so that the same
No. is not set simultaneously by two extension base units.
(4) The QA1S6 B/QA65B cannot be connected as an extension base unit.
(5) Connect the extension cable from OUT of the extension cable connector of the base unit to IN
of the extension base unit on the next stage.
(6) If 17 or more modules are installed, an error will occur.
(7) When bus-connected, the GOT occupies one extension stage and one slot.
(8) The Q00JCPU processes the GOT as a 16-point intelligent function module. Hence, connection
of one GOT decreases the number of controllable points on base units by 16 points.
(9) The bus extension connector box (A9GT-QCNB) cannot be connected to the Q00JCPU. It
should be connected to the extension base unit.

2 - 3 2 - 3
MELSEC-Q
2 SYSTEM CONFIGURATION
2.1.2 Q00/Q01CPU
This section explains the equipment configuration of a Q00/Q01CPU system and the
outline of the system configuration.
(1) Equipment configuration
Q6 B extension base unit
(Q63B, Q65B, Q68B, Q612B)
Basic model QCPU
(Q00CPU, Q01CPU) Battery
(Q6BAT)
Main base unit
(Q33B, Q35B, Q38B, Q312B)
Power supply module/
Input/output module/
Intelligent function module
Extension cable
(QC05B, QC06B, QC12B,
QC30B, QC50B, QC100B)
Input/output module/
Intelligent function module
MITSUBISHI
LITHIUM BATTERY
Q5 B extension base unit
(Q52B, Q55B)
Power supply module/
Input/output module/
Intelligent function module

2 - 4 2 - 4
MELSEC-Q
2 SYSTEM CONFIGURATION
(2) Outline of system configuration
System configuration
C
P
U
00
1F
20
3F
40
5F
60
7F
80
9F
A0
BF
C0
DF
E0
FF
100
11F
120
13F
140
15F
160
17F
01234567891011
Extension base unit (Q68B)
1918171615141312 260
27F
240
25F
220
23F
200
21F
1E0
1FF
1C0
1DF
180
19F
1A0
1BF
23222120 2E0
2FF
2C0
2CF
2A0
2BF
280
29F
Extension
cable
Slot No.
O
U
T
I
N
O
U
T
Main base unit (Q312B)
O
U
T
I
N
Extension base unit (Q65B)
Inhibited
Extension 1
Extension 2
Loading will cause error
The above system assumes that each slot is loading with
a 32-point module.
Power supply module
Power supply module
Power supply module
Maximum number of
Extension Stages Four Extension Stages
Maximum number of
input/output modules to
be installed 24 modules
Maximum number of
input/output points 1024
Main base unit Q33B, Q35B, Q38B, Q312B
Extension base unit Q52B, Q55B, Q63B, Q65B, Q68B, Q612B
Extension cable QC05B, QC06B, QC12B, QC30B, QC50B, QC100B
Notes
(1) Do not use an extension cable longer than an overall extension length of 13.2m(43.31ft.).
(2) When using an extension cable, do not bind it together with the main circuit (high voltage and
heavy current) line or do not lay down them closely to each other.
(3) When setting the No. of the expansion stages, set it in the ascending order so that the same
No. is not set simultaneously by two extension base units.
(4) The QA1S6 B/QA65B cannot be connected as an extension base unit.
(5) Connect the extension cable from OUT of the extension cable connector of the base unit to IN
of the extension base unit on the next stage.
(6) If 25 or more modules are installed, an error will occur.
(7) When bus-connected, the GOT occupies one extension stage and one slot.
(8) The Q00/Q01CPU processes the GOT as a 16-point intelligent function module. Hence,
connection of one GOT decreases the number of controllable points on base units by 16 points.

2 - 5 2 - 5
MELSEC-Q
2 SYSTEM CONFIGURATION
2.1.3 Configuration of GX Developer
Basic model QCPU
(Q00CPU, Q01CPU)
RS-232 cable
(QC30R2)
Basic model QCPU
(Q00JCPU)
Personal Computer
GX Developer
(Version 7 or later)

2 - 6 2 - 6
MELSEC-Q
2 SYSTEM CONFIGURATION
2.2 Precaution on System Configuration
This section describes hardware and software packages compatible with Basic model
QCPU.
(1) Hardware
(a) The number of modules to be installed and functions are limited depending on
the type of the modules.
Applicable Module Type Limit of number of
modules to be installed
Q Series MELSECNET/H
network module QJ71LP21, QJ71BR11, QJ71LP21-25, QJ71LP21G, QJ71LP21GE One module only
Q series Ethernet interface
module QJ71E71, QJ71E71-B2, QJ71E71-100 One module only
Q series CC-Link system
master local module QJ61BT11 Up to 2 modules
function version B or
later
Interrupt module QI60 One module only
(b) A graphic operation terminal can be used only for the GOT900 series and
F900 series (Basic OS matching Q-mode and communication driver must be
installed).
The GOT800 series, A77GOT, and A64GOT cannot be used.
(c) A DeviceNet Master-Slave module (QJ71DN91) whose function version is B
or later can be used.
(2) Software package
GX Developer and GX Configurator of the versions or later in the following table
are usable with the Basic model QCPU.
Product Name Type Version
GX Developer SW7D5C-GPPW-E Ver. 7
GX Simulator SW6D5C-LLT-E Ver. 6
GX Configurator-AD SW0D5C-QADU-E Ver. 1.10L
GX Configurator-DA SW0D5C-QDAU-E Ver. 1.10L
GX Configurator-SC SW0D5C-QSCU-E Ver. 1.10L
GX Configurator-CT SW0D5C-QCTU-E Ver. 1.10L
GX Configurator-TC SW0D5C-QTCU-E Ver. 1.10L
GX Configurator-FL SW0D5C-QFLU-E Ver. 1.10L
GX Configurator-DN SW0D5C-QDNU-E Ver. 1.10L
GX Configurator-TI SW0D5C-QTIU-E Ver. 1.10L
GX Configurator-PT SW1D5C-QPTU-E Ver. 1.10L
GX Configurator-QP SW2D5C-QD75P-E Ver. 2.10L

2 - 7 2 - 7
MELSEC-Q
2 SYSTEM CONFIGURATION
2.3 Confirming the function version
The Basic model QCPU function version can be confirmed on the rating nameplate
and GX Developer's system monitor.
(1) Confirming the function version on the rating nameplate
The function version is indicated on the rating nameplate.
Serial No. (First five digits
)
Function version
MADE IN JAPAN
LISTED 80M1
IND.CONT.EQ.
MODEL
SERIAL 03051 0000000000-A
(2) Confirming the function version on the system monitor (product
information List)
The product information list in the system monitor of GX Developer allows you to
confirm the function version of the Basic model QCPU.
The product information list of the system monitor also allows you to confirm the
function versions of the intelligent function modules.
Serial No. Function versio
n

3 - 1 3 - 1
MELSEC-Q
3 PERFORMANCE SPECIFICATION
3
3. PERFORMANCE SPECIFICATION
The table below shows the performance specifications of the Basic model QCPU.
Performance Specifications
Model
Item Q00JCPU Q00CPU Q01CPU Remark
Control method Repetitive operation of stored program
I/O control method Refresh mode
Direct input/output is
possible by direct
input/output
specification (DX ,
DY )
Programming language
(Sequence control dedicated
language) Relay symbol language, logic symbolic language The SFC function is
not applicable.
LD X0 0.20µs 0.16µs 0.10µs
Processing speed
(Sequence instruction) MOV D0 D1 0.70µs 0.56µs 0.35µs
Total number of instructions 249
(excluding intelligent function module dedicated
instructions)
Constant scan
(Function to make the scan time
constant) 2 to 2000 ms (configurable in increments of 1 ms) Set parameter values
to specify
Program 1 2
capacity 8k steps (32 kbyte) 8k steps (32 kbyte) 14k steps (56 kbyte)
Program memory
(Drive 0) 58 kbyte 94 kbyte 94 kbyte
Standard RAM
(Drive 3) 0 64 kbyte 64 kbyte
Memory
capacity Standard ROM
(Drive 4) 58 kbyte 94 kbyte 94 kbyte
Program memory 1 1 1
Number of
stored
programs Standard ROM 1 1 1
Number of
stored file
registers Standard RAM —— 1 1
Number of I/O devices points 2048 points (X/Y0 to 7FF) Number of devices
usable on program
Number of I/O points 256 points
(X/Y0 to FF) 1024 points (X/Y0 to 3FF)
Number of points
accesible to
input/output modules
1: "1 step" in program capacity equals 4 bytes.
2: The maximum number of steps that can be executed can be obtained as follows:
(Program capacity) - (File header size (Default: 34 steps))

3 - 2 3 - 2
MELSEC-Q
3 HARDWARE SPECIFICATION OF THE CPU MODULE
3
Performance Specifications (continued)
Model
Item Q00JCPU Q00CPU Q01CPU Remark
Internal relay [M] Default 8192 points (M0 to 8191)
Latch relay [L] Default 2048 points (L0 to 2047)
Link relay [B] Default 2048 points (B0 to 7FF)
Timer [ T ]
Default 512 points (T0 to 511) (for low / high speed timer)
Select between low / high speed timer by instructions.
The measurement unit of the low / high speed timer is set
with parameters.
(Low speed timer : 1 to 1000ms, 1ms/unit , default 100ms)
(High speed timer : 0.1 to 100ms, 0.1ms/unit , default 10ms)
Retentive timer [ ST ]
Default 0 point
(for low / high speed retentive timer)
Switchover between the low / high speed retentive timer is
set by instructions.
The measurement unit of the low speed retentive timer and
high speed retentive timer is set with parameters.
(Low speed retentive timer : 1 to 1000ms, 1ms /unit , default 100ms)
(High speed retentive timer : 0.1 to 100ms, 0.1ms
/unit , default 10ms)
Counter [C] • Normal counter default 512 points (C0 to 511)
• Interrupt counter maximum 128 points
(default 0 point, set with parameters)
Data register [D] Default 11136 points (D0 to 11135)
Link register [W] Default 2048 points (W0 to 7FF)
Annunciator [F] Default 1024 points (F0 to 1023)
Edge relay [V] Default 1024 points (V0 to 1023)
Number of use points
is set with
parameters.
[R] None 32768 points (R0 to 32767)
Number of device points
File Register [ZR] None 32768 points (ZR0 to 32767)

4 - 1 4 - 1
MELSEC-Q
4 SEQUENCE PROGRAM CONFIGURATION & EXECUTION
CONDITIONS
4
4 SEQUENCE PROGRAM CONFIGURATION & EXECUTION CONDITIONS
Programs that can be executed by the Basic model QCPU are sequence programs
only.
This chapter describes the sequence program configuration and execution conditions.
4.1 Sequence Program
(1) Definition of sequence program
(a) A sequence program is created using sequence instructions, basic
instructions, and application instructions, etc. Sequence instruction
T0
X0
X1
X41
M0 K100
T0
Y30
BIN K4X10 D0
FROM H5 K0 D10 K1
Basic instruction
Application instruction
(b) There are 3 types of sequence program: main routine programs, sub-routine
programs, and interrupt programs.
For details regarding these programs, refer to the following sections of this
manual:
• Main routine programs : Section 4.1.1
• Sub-routine programs : Section 4.1.2
• Interrupt programs : Section 4.1.3
MAIN
Main routine
program
Sub-routine
program
FEND
Interrupt
program
RET
IRET
END
P0
I0
REMARK
For details regarding the sequence instructions, basic instructions, and application
instructions, refer to the " QCPU (Q Mode)/QnACPU Programming Manual
(Common Instructions)".