Motorola MVME123 User manual

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®MOTOFlOLA
MVME120/D2
MVME120, MVME121, MVME122, MVME123
VMEbus
Microprocessor Module
User's Manual
ICR
QUALITY • PEOPLE • PERFORMANCE
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(f!jMOTOROLA
MVMEI20, MVMEI21, MVMEI22, MVME123
VMEbus MICROPROCESSOR MODULE
USER'S MANUAL
MVME120jD2
JUNE 1985
The information in this document has been carefully checked and is believed to
be entirely reliable. However, no responsibility is assumed for inaccuracies.
Furthermore, Motorola reserves the right to make changes to any products
herein to
improve reliability, function, or design. Motorola does not assume
any liability arising out of the application or use of any product or circuit
described herein; neither does it convey any license under its patent rights
or the rights of others.
VERSAdos is a trademark of Motorola Inc.
WARNING
THIS EQUIPMENT GENERATES, USES, AND CAN RADIATE RADIO
FREQUENCY ENERGY AND IF NOT INSTALLED AND USED IN
ACCORDANCE WITH THE INSTRUCTIONS MANUAL, MAY CAUSE
INTERFERENCE TO RADIO COMMUNICATIONS. IT HAS BEEN TESTED
AND FOUND TO COMPLY WITH THE LIMITS FOR A CLASS A
COMPUTING DEVICE PURSUANT TO SUBPART J OF PART 15 OF FCC
RULES, WHICH ARE DESIGNED TO PROVIDE REASONABLE PROTECTION
AGAINST SUCH INTERFERENCE WHEN OPERATED IN A COMMERCIAL
ENVIRONMENT. OPERATION OF THIS EQUIPMENT IN A RESIDENTIAL
AREA IS LIKELY TO CAUSE INTERFERENCE IN WHICH CASE THE
USER, AT HIS OWN EXPENSE, WILL BE REQUIRED TO TAKE
WHATEVER MEASURES NECESSARY TO CORRECT THE INTERFERENCE.
Second Edition
Copyright 1985 by Motorola Inc.
First Edition September 1984
MICROSYSTEMS
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SAFETY SUMMARY
SAFETY DEPENDS ON YOU
The following general safety precautions must be observed during all phases of operation, service, and
repair of this equipment. Failure to comply with these precautions or with specific warnings elsewhere
in this
manual violates safety standards of design, manufacture, and intended use of the equipment.
Motorola Inc. assumes no liability for the customer's failure to comply with these requirements. The
safety precautions listed
below represent warnings of certain dangers of which we are aware. You, as
the user of the product, should follow these warnings and all other safety precautions necessary for
the safe operation
of the equipment in your operating environment.
GROUND THE INSTRUMENT.
To minimize shock hazard, the equipment chassis and enclosure must be connected to an electrical
ground. The equipment is supplied with a three-conductor ac power cable. The power cable must either
be plugged into an approved th ree-contact electrical outlet or used with a three-contact to two-contact
adapter, with the grounding wire (green) firmly connected to an electrical ground (safety ground) at the
power outlet. The power jack and mating plug of the power cable meet International Electrotechnical
Commission (IEC) safety standards.
DO NOT OPERATE IN AN EXPLOSIVE ATMOSPHERE.
Do not operate the equipment in the presence of flammable gases or fumes. Operation of any electrical
equipment in such an environment constitutes a definite safety hazard.
KEEP AWAY FROM LIVE CIRCUITS.
Operating personnel must not remove equipment covers. Only Factory Authorized Service Personnel or
other qualified maintenance personnel may remove equipment covers for internal subassembly or
component replacement or any internal adjustment. Do not replace components with power cable
connected. Under certai n conditions, dangerous voltages may exist even with the power cable removed.
To avoid injuries, always disconnect power and discharge circuits before touching them.
DO NOT SERVICE OR ADJUST ALONE.
Do not attempt internal service or adjustment unless another person, capable of rendering first aid and
resuscitation, is present.
USE CAUTION WHEN EXPOSING OR HANDLING THE CRT.
Breakage of the Cathode-Ray Tube (CRT) causes a high-velocity scattering of glass fragments (implo-
sion). To prevent CRT implosion, avoid rough handling or jarring of the equipment. Handling of the
CRT should be done only by qualified maintenance personnel using approved safety mask and gloves.
DO NOT SUBSTITUTE PARTS OR MODIFY EQUIPMENT.
Because of the danger of introducing additional hazards, do not install substitute parts or perform any
unauthorized modification of the equipment. Contact Motorola Microsystems Warranty and Repair for
service and repair to ensure that safety features are maintained.
DANGEROUS PROCEDURE WARNINGS.
Warnings, such as the example below, precede potentially dangerous procedures throughout this
manual. Instructions contained in the warnings must be followed. You should also employ all other
safety precautions which you deem necessary for the operation of the equipment in your operating
environment.
WARNING
Dangerous voltages, capable of causing death, are present in this equipment. Use extreme
caution when handling, testing, and adjusting.
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PREFACE
Unless otherwise specified, all address references are in hexadecimal
throughout
this manual.
An asterisk (*) following the signal name for signals which are level
significant denotes that the signal is true or valid when the signal is low.
An asterisk (*) following the signal name for signals which are edge
significant denotes that the actions initiated by that signal occur on a high
to
low transition.
MICROSYSTEMS
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® MOTOROL.A
TABLE OF CONTENTS
CHAPTER 1
GENERAL INFORMATION
1.1 INTRODUCTION ......................................... 1
1.2
FEATURES ............................................. 1
1.3
SPECIFICATIONS....................................... 3
1.4
GENERAL DESCRIPTION .... ,............................. 4
1.5
MVME120 FAMILY CONFIGURATIONS ................... ..... 4
1. 6 RELATED DOCUMENTATION ................................ 4
CHAPTER 2
2.1
2.2
2.3
2.3.1
2.3.2
2.3.3
2.3.4
2.3.5
2.3.6
2.3.7
2.3.8
2.3.9
2.3.10
2.3.11
2.3.12
2.3.13
2.3.13.1
2.3.13.2
2.4
2.4.1
2.4.2
CHAPTER 3
HARDWARE PREPARATION AND INSTALLATION INSTRUCTIONS
INTRODUCTION ......................................... 5
UNPACKING INSTRUCTIONS .... ...................... ..... 5
HARDWARE PREPARATION ................................. 5
ACFAIL*/SYSFAIL* Select Header (J2) ................ 7
VMEbus Request Level Select Headers (J3, J4) .. ..... 8
ABORT Switch Disable Select Header (J5) ....... ..... 9
RESET Switch Disable Select Header (J6) ....... ..... 9
VMEbus Interrupt Connection Select Header (J7) ..... 10
ROM/EPROM Device Configuration Select Header (J8) .. 10
Cache Configuration Select Headers (J9, J17) ....... 14
MSR Bit 1 Source Select Header (J20) ............... 15
MSR Bit 0 Source Select Header (J21) ............... 16
ROM Access Time Select Header (J22) ................ 17
Reset Vector Fetch Mode Select Header (J24) ........ 17
Local Time-out Select Header (J25) ................. 19
RAM Dual Port Address Select PAL (U28) ............. 19
.Factory Configured RAM Dual Port Base Address .... 19
Changi ng U28 ..................................... 21
INSTALLATION ......................................... 21
Module Installation ................................ 21
Terminal Connection ................................ 22
OPERATING INSTRUCTIONS
3.1 INTRODUCTION ......................................... 23
3.2 CONTROLS AND INDICATORS .................•............ 23
3.2.1 RESET Swi tch ....................................... 23
3.2.2 ABORT Swi tch ..................... " ... " ~ . . . . . . . . . .. . . . 23
3.2.3 MODE Swi tch ........................................ 23
3.2.4 FAIL Indicator ..................................... 23
3.2.5 HALT Indicator ..................................... 24
3.2.6 RUN Indicator ........ .............................. 24
3.3 MPU MODULE MEMORYMAP ................................ 25
3.3.1 MPU Module Memory Map as Viewed from the VMEbus .... 28
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CHAPTER 4
4.1
4.2
4.3
4.3.1
4.3.2
4.3.3
4.3.3.1
4.3.3.2
4.3.4
4.3.4.1
4.3.4.2
4.3.4.3
4.3.5
4.3.6
4.3.7
4.3.7.1
4.3.7.2
4.3.7.3
4.3.7;4
4.3.7.5
4.3.8
4.3.9
4.3.9.1
4.3.9.2
4.3.9.3
4.3.10
4.3.11
4.3.11.1
4.3.11.2
4.3.11.3
4.3.11.4
4.3.11.5
CHAPTER 5
5.1
5.2
5.2.1
5.2.2
5.3
APPENDIX A
APPENDIX B
INDEX
TABLE OF CONTENTS (cont'd)
FUNCTIONAL DESCRIPTION
INTRODUCTION .......................................... 29
GENERAL DESCRIPTION ................................... 29
BLOCK DIAGRAM DESCRIPTION ............................. 30
MPU ................................................. 30
MMU ................................................. 30
Cache ............................................... 31
Cache Organization................................ 31
Cache Operat ion ................................... 33
RAM .................•.......••.••........•..•...•... 37
Refresh ........................................... 38
Local Accesses .................................... 38
Accesses From The VMEbus .......................... 38
Multi-Port Controller ............................... 38
Bus Requester ....................................... 39
Interrupt Handl er ................................... 39
VMEbus Interrupts .~ ............................... 39
ABORT Switch Interrupts ........................... 39
MC68901 Interrupts ................................ 40
Interrupt Source and Vectors ...................... 40
Enabling Interrupts ............................... 41
VMEbus Interface .................................... 41
I/O and Control ..................................... 42
Module Status ...... ~ .............................. 43
Module Control Register ........................... 44
Timers ............................................ 45
ROM ................................................. 46
Source of Bus Error Except ions ...................... 46
VMEbus BERR ....................................... 46
Onboard Parity Error .............................. 47
Dual Port Lock on TAS Error ....................... 47
MMU Faul t ......................................... 47
Local Bus Time-out ......•......................... 47
SUPPORT INFORMATION
INTRODUCTION ................•......................... 51
INTERCONNECT SIGNALS .................................. 51
Connector PI Interconnect Signals ................... 51
Terminal Port Connector Jl Interconnect Signals ..... 56
PARTS LIST ............................................ 57
RS-232C INTERCONNECTIONS
PROGRAMMABLE ARRAY LOGIC
95
101
.......................................................
115
i i MICROSYSTEMS
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@MOTOROLA
FIGURE I-I.
2-I.
4-I.
5-I.
5-2.
TABLE I-I.
3-I.
4-I.
5-I.
5-2.
5-3.
TABLE OF CONTENTS (cont'd)
LIST OF ILLUSTRATIONS
Typical MPU Module.................................... 2
MPU Module Option Locations ............ ............... 6
MPU Module Block Diagram .............................. 49
MPU Module Parts Location ............................. 63
MPU Module Schematic Diagram .......................... 65
LIST OF TABLES
MPU Module Specifications .............................. 3
Interpretation of Front Panel Indicators ............... 24
Modul e Status .......................................... 43
Connector PI Interconnect Signals ...................... 51
Connector Jl Interconnect Signals ...................... 56
MPU Module Parts List .................................. 57
iii
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THIS PAGE INTENTIONALLY LEFT BLANK.
iv
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([!jMOTOROLA
GENERAL INFORMATION
CHAPTER 1
GENERAL INFORMATION
1.1 INTRODUCTION
This manual provides general information, preparation for use and installation
instructions, operating instructions, functional description, and support
information for the
MVMEI20, MVMEI21, MVMEI22, and MVME123 VMEbus
Microprocessor Modules (hereinafter referred to as MPU module). A typical MPU
module is shown in Figure 1-1.
1. 2 FEATURES
The features of the MPU module include:
MC68010 MPU
MC68451 MMU (optional)
4Kb logical instruction cache (optional)
Two, 28-pin ROM/EPROM sockets
Onboard dual-port RAM with byte parity
Interrupt handler
Status and control registers
Programmable timer
RS-232C serial debug port
Bus requester
A24, 016 VMEbus interface
Local RESET switch
Local software ABORT switch
Mode switch
FAIL indicator
HALT indicator
RUN indicator
1 MICROSYSTEMS
I
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I
2
GENERAL INFORMATION
r-
n:l
U
......
I
......
MICROSYSTEMS
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GENERAL INFORMATION
1.3 SPECIFICATIONS
The MPU module specifications are identified in Table 1-1.
TABLE 1-1. MPU Module Specifications
=============================================================================
CHARACTERISTICS
SPECIFICATIONS
=============================================================================
Microprocessor
Clock signal
Memory size
RAM
EPROM/ROM
Interrupt handler
User input/output signals
Temperature
Operating
Storage
Relative humidity
Physical characteristics
Width x height
Thickness
Power requirements
MC68010
12.5 MHz (or 10.0 MHz)
128Kb/512Kb
Two sockets for user supplied 4K x 8, 8K x
8,
16K x 8, 32K x 8, or 64K x 8 devices
All onboard plus seven VMEbus interrupts
RS-232C serial debug port (terminal only)
o degrees C to 50 degrees C (forced air is
required)
-40 degrees to 85 degrees C
0% to 90% (noncondensing)
7.40 in.
(188 mm) x 10.20 in. (261 mm)
o. 83 in. ( 21 mm)
+5 Vdc typical
120 4.2 A
121 4.0 A
122 3.2 A
123 4.3 A
-12 Vdc @ 12 rnA
+12 Vdc @ 17 rnA
current maximum current
4.65 A
4.45 A
3.55 A
4.65 A
(typical), 14 rnA (maximum)
(typical), 20 rnA (maximum)
=============================================================================
3 MICROSYSTEMS
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®MOTOROLA
GENERAL INFORMATION
1.4 GENERAL DESCRIPTION
The MPU, module is a high performance, VMEbus, microprocessor module that
offers a solution for high speed data processing, management, and control
applications.
The module contains an MC68010 MPU, MC68451 MMU, logical
instruction cache, a serial debug terminal port, programmable tick timer,
private ROM, and a large dynamic dual port RAM that may be loaded externally
via the VMEbus. The MPU module, when used with a system controller module
(such as the MVME050 system controller or the MVMEIIO CPU module), satisfies
system requirements ranging from simple, high speed single processor
applications to
complex multiprocessor system architectures.
1.5 MVME120 FAMILY CONFIGURATIONS
Four configurations are available for the MVME120 Family of Microprocessor
Modules. The configurations are listed below:
MVME120
MVME121
MVMEl22
MVMEl23
10 MHz MC68010, 128K dynamic RAM, cache, MMU
10 MHz MC68010, 512K dynamic RAM, cache, MMU
12.5 MHz MC68010, 128K dynamic RAM, no cache, no MMU
12.5 MHz MC68010, 512K dynamic RAM, cache, no MMU
The MC68451 MMU does not function at 12.5 MHz.
1.6 RELATED DOCUMENTATION
The following publications may provide additional helpful information. If not
shipped with
this product, they may be obtained from Motorola Literature
Distribution Center,
616 West 24th Street, Tempe, Arizona 85282; telephone
[phone].
==============================================================================
DOCUMENT TITLE
MOTOROLA
PUBLICATION NUMBER
=============================================================================
Data Book
MVMEbus Specification Manual
MC68901
MVMEBS
=============================================================================
4 MICROSYSTEMS
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HARDWARE PREPARATION
CHAPTER 2
HARDWARE PREPARATION AND INSTALLATION INSTRUCTIONS
2.1 INTRODUCTION
This chapter provides unpacking instructions, hardware preparation, and
installation instructions for the MPU module.
2.2 UNPACKING INSTRUCTIONS
If the shipping carton is damaged upon receipt,
request carrier's agent be present during
unpacking
and inspection of equipment.
Unpack equipment from shipping carton. Refer to packing list and verify that
all items are present. Save packing material for storing and reshipping of
equipment.
2.3 HARDWARE PREPARATION
For reliable operation, forced air cooling should be used. The cooling should
be enough to maintain the temperature at the back of the MC68010 case below 80
degrees centigrade.
To select the desired configuration and ensure proper operation of the MPU
module, certain modifications may be made before installation. These
modifications are made through jumper or wire-wrap arrangements on the
headers. Figure
2-1 illustrates the location of the headers and connectors on
the MPU module. The MPU module has been factory tested and is shipped with
factory-installed jumper configurations that are also shown in Figure 2-1.
The MPU module is operational with the factory-installed jumpers. It is
necessary to make changes in the jumper arrangements for the following
cond it ions:
a.
ACFAIL*/SYSFAIL* select (J2)
b. VMEbus request level select (J3,J4)
c.
ABORT switch disable select (J5)
d.
RESET switch disable select (J6)
5 MICROSYSTEMS
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P1
"0"
zO J4
Z
280 1
12
00
11
00
00
88
J3
5 1
2 001
Igg z) J25
10-00) J2
6 2
3 1
J7
"~" ~
~ 160015
0-0 0-0
0-0 0-0
0-0
0-0
20-01 ~z
00
2 0-01
3 1
J910 0-0)
J20 J21
~~ 00
8~~7
00
2 001
~3
LQJ1
J17
J22
FIGURE 2-1. MPU Module Option locations
..
@
!
0
a
~
~
J1
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@MOTOROLA
e.
VMEbus interrupt connection select (J7)
f. ROM/EPROM device configuration select
g.
Cache configuration select
(J9, Jl7)
h. SWI source select (J20)
i. SW2 source select (J21)
j. ROM access time select (J22)
k. Reset vector fetch mode select (J24)
1. Local time-out select (J25)
2.3.1
ACFAIL*/SYSFAIl* Select Header (J2)
(J8)
HARDWARE PREPARATION
Bit 7 of the Module Status Register (MSR) can be configured to monitor either
the Alternating Current Failure (ACFAIL*) signal on the VMEbus or to monitor
the
System Failure (SYSFAIL*) signal on the VMEbus. ACFAIL* is monitored when
the jumper is positioned between pins 1 and 2 on header J2. SYSFAIL* is
monitored when the jumper is positioned between pins 2 and 3.
J2 J2
+-----------+ +-----------+
I 0 0---0 I I
0---0 0 I
+-----------+ +-----------+
321 3 2 1
ACFAIL* SYSFAIL*
7 MICROSYSTEMS
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HARDWARE PREPARATION
2.3.2
VMEbus Request Level Select Headers (J3, J4)
I
The
MPU module
can be configured to request VMEbus mastership on anyone of
four levels.
The desired level is selected by jumper configuration on headers
J3 and J4 as shown below:
J4
J4 J4
J4
+-------+
+-------+ +-------+
+-------+
12 0 o
III
12
I 0 o
III
12
I 0 o III
12
I 0 o
III
I I I I I I I I I
10 0 o I 9
10
I 0 o I 9
10
I 0 o I 9
10
I 0 o I 9
I I I I I I I
8 0 o I 7 8 I 0 o I 7 8 I 0 o I 7 8 I 0 o I 7
I I I I I I I I I
6 0 o I 5 6 I 0 o I 5 6 I 0 o I 5 6 I 0 o I 5
I I I I I I I I I I I I I
4 0 o I 3 4 I 0 o I 3 4 I 0 o I 3 4 I 0 o I 3
I I I I I I I I I
2 0 o I 1 2 I 0 o I 1 2 I 0 o I 1 2 I 0 o I 1
+-------+
+-------+ +-------+
+-------+
J3
J3 J3
J3
+-------+
+-------+
+-------+
+-------+
12
I 0 o
III
12
I 0 o III
12
I 0 o
III
12
I 0 o
III
I I I I I I I I I I
10
I 0 o I 9
10
I 0 o I 9
10
I 0 o I 9
10
I 0 o I 9
I I I I I I I I
8 I 0 o I 7 8 I 0 o I 7 8 I 0 o I 7 8 I 0 o I 7
I I I I I I I I I I
6 I 0 o I 5 6 I 0 o I 5 6 I 0 o I 5 6 I 0 o I 5
I I I I I I I I I I I I I I
4 I 0 o I 3 4 I 0 o I 3 4 I 0 o I 3 4 I 0 o I 3
I I I I I I I I I I
2 I 0 o I 1 2 I 0 o I 1 2 I 0 o I 1 2 I 0 o I 1
+-------+
+-------+
+-------+
+-------+
LEVEL 0
LEVEL 1
LEVEL 2
LEVEL 3
8 MICROSYSTEMS
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HARDWARE PREPARATION
2.3.3 ABORT Switch Disable Select Header (JS)
The front panel software ABORT switch on the MPU module can be disabled. The 2
switch is disabled when the jumper is removed from header J5. The MPU module
is shipped with the switch enabled as shown below.
J5
+---+
2 I 0 I
I I I
1 I 0 I
+---+
ABORT
SWITCH
ENABLED
2.3.4 RESET Switch Disable Select Header (J6)
J5
+---+
2 101
I I
1 101
+---+
ABORT
SWITCH
DISABLED
The front panel RESET switch on the MPU module can be disabled. The switch is
disabled when the jumper is removed from header J6. As shown below, the MPU
module is shipped with the switch enabled.
J6
+---+
2 101
I I I
1 101
+---+
RESET
SWITCH
ENABLED
9
J6
+---+
2 101
I I
1 I 0 I
+---+
RESET
SWITCH
DISABLED
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HARDWARE PREPARATION
2.3.5 VMEbus Interrupt Connection Select Header (J7)
Each VMEbus Interrupt Request (IRQ*) signal can be connected as an interrupt
request to the MPU. Jumpers on header J7 determine which, if any, of the
VMEbus IRQ* signal lines are connected. J7 connects the IRQ* lines so that
they drive the corresponding interrupt request levels to the MPU (i.e., IRQl*
requests level 1 to the MPU, IRQ2* requests level 2 to the MPU, etc.).
J7 J7
+-------+ +-------+
14
0---0
I
13 IRQ7* 14
I 0 0
13
IRQ7*
I I
12
0---0
I
11 IRQ6* 12
I 0 0
11
IRQ6*
I I
10
0---0
I 9
IRQ5* 10
I 0 0 9
IRQ5*
I I
8
0---0
I 7
IRQ4* 8 I 0 0 7
IRQ4*
I I
6
0---0
I 5
IRQ3* 6 I 0 0 5
IRQ3*
I I
4
0---0
I 3
IRQ2* 4 I 0 0 3 IRQ2*
I I
2
0---0
I 1
IRQl* 2 I 0 0 1 IRQl*
+-------+ +-------+
CONNECTED DISCONNECTED
2.3.6 ROM/EPROM Device Configuration Select Header (J8)
There are several types of
ROM/EPROM devices that can be used in sockets XU44
and XU52. Header J8 must be configured to match the devices used. The
figures below show configurations of J8 for the most commonly used devices.
When inserting devices into XU44 and XU52, the device containing even data
must be inserted into XU44 and the device containing odd data must be inserted
into
XU52. Even though XU44 and XU52 are 28-pin sockets, 24-pin devices may
be used as shown below:
28 27 26 25 24 23 22 21 20 19 18 17 16 15
+--------+-----------------------------------------------+
I I I
I I I
I I I
+--------+-----------------------~-----------------------+
1 2 3 4 5 6 7 8 9 10 11 12 13 14
I I
I I PIN ONE OF 24-PIN DEVICE
I
I
PIN ONE OF 28-PIN DEVICE
10
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