Motorola MVME224A Series User manual

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MVME224A-l/ -2/-3/-4
(4~/8~/16~/32~)
Series of
DRAM Memory Modules
User's Manual
® MOTOROLA
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MVME224A-l (4Mb), MVME224A-2 (8Mb),
MVME224A-3 (16Mb), AND MVME224A-4 (32Mb)
SERI ES OF DRAM MEMORY MODULES
USER'S MANUAL
(MVME224A/Dl)
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The information in this document has been carefully checked and is
believed to be entirely reliable. However, no responsibility is
assumed for inaccuracies. Furthermore, Motorola reserves the right
to make changes to any products here into improve re 1i ab il i ty,
function, or design. Motorola does not assume any liability arising
out of the application or use of any product or circuit described
herein; neither does it convey any license under its patent rights
or the ri ghts of others.
/
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PREFACE
This manual provides general information, hardware preparation,
installation instructions, functional description, and support
i nformat i on for the MVME2 24A -1/ - 2/ -3/ -4 ser i es of DRAM memory
modules.
This manual is intended for anyone who wants to design OEM systems,
supply additional capability to an existing compatible system or in
a 1ab envi ronment for experimental purposes.
A basic knowledge of computers and digital logic is assumed.
To use this manual, you should be faimilar with the publications
listed in the Related Documentation paragraph in Chapter 1 of this
manual.
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WARNING
THIS EQUIPMENT GENERATES, USES, AND CAN RADIATE RADIO
FREQUENCY ENERGY AND IF NOT INSTALLED AND USED IN ACCORDA~CE
WITH THE INSTRUCTIONS MANUAL, MAY CAUSE INTERFERENCE TO RADIO
COMMUNICATIONS. IT HAS BEEN TESTED AND FOUND TO COMPLY WITH
THE LIMITS FOR A CLASS A COMPUTING DEVICE PURSUANT TO SUBPART
J OF PART 15 OF FCC RULES, WHICH ARE DESIGNED TO PROVIDE
REASONABLE PROTECTION AGAINST SUCH INTERFERENCE WHEN
OPERATED IN A COMMERCIAL INVIRONMENT. OPERATION OF THIS
EQUIPMENT IN A RESIDENTIAL AREA IS LIKELY TO CAUSE
INTERFERENCE IN WHICH CASE THE USER, AT HIS OWN EXPENSE, WILL
BE REQUIRED TO TAKE WHATEVER MEASURES NECESSARY TO CORRECT
THE INTERRFERENCE.
VERSAdos, VMEmodule, and VSBbus are trademarks of Motorola Inc.
First Edition
Copyri ght 1990 by Motoro1a Inc.
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SAFETY SUMMARY
SAFETY DEPENDS
ON YOU
The following generalsafetyprecautions must beobserved during all phases of operation, service, and
repair of this equipment. Failure to comply with these precautions or with specific warnings elsewhere
In this manual violates safety standards of design, manufacture, and Intended use of the equipment.
Motorola Inc. assumes no liability for the customer's failure to comply with .these requirements. The
safety precautions listed below represent warnings of certain dangers of which we are aware. You, as
the user of the product, should follow these warnings and all other safety precautions necessary for
the safe operation of the equipment in your operating environment.
GROUND THE INSTRUMENT.
To minimize shock hazard, the equipment chassis and enclosure must be connected to an electrical
ground. The equipment is supplied with a three-conductor ac powercable. The powercable must either
be plugged into an approved three-contact electrical outlet or used with a three-contact to two-contact
adapter, with the grounding wire (green) firmly connected to an electrical ground (safety ground) at the
power outlet. The power jack and mating plug of the power cable meet International Electrotechnical
Commission (IEC) safety standards.
DO NOT OPERATE IN AN EXPLOSIVE ATMOSPHERE.
Do not operate the equipment in the presence of flammable gases or fumes. Operation of any electrical
equipment in such an environment constitutes a definite safety hazard.
KEEP AWAY FROM LIVE CIRCUITS.
Operating personnel must not remove equipmentcovers. Only FactoryAuthorized Service Personnel or
other qualified maintenance personnel may remove equipment covers for internal subassembly or
component replacement or any internal adjustment. Do not replace components with power cable
connected. Under certainconditions,dangerousvoltages may existeven with the powercable removed.
To avoid injuries, always disconnect power and discharge circuits before touching them.
DO NOT SERVICE OR ADJUST ALONE.
Do not attempt internal service or adjustment unless another person, capable of rendering first aid and
resuscitation, is present.
USE CAUTION WHEN EXPOSING OR HANDLING THE CRT.
Breakage of the Cathode-Ray Tube (CRT) causes a high-velocity scattering of glass fragments (implo-
sion). To prevent CRT implosion, avoid rough handling or jarring of the equipment. Handling of the
CRT should be done only by qualified maintenance personnel using approved safety mask and gloves.
DO
NOT SUBSTITUTE PARTS OR MODIFY EQUIPMENT.
Because of the danger of introducing additional hazards, do not install substitute parts or perform any
unauthorized modification of the equipment. Contact Motorola Field Service Division for service and
repair to ensure that safety features are maintained.
DANGEROUS PROCEDURE WARNINGS.
Warnings, such as the example below, precede potentially dangerous procedures throughout this
manual. Instructions contained in the warnings must be followed. You should also employ all other
safety precautions which you deem necessary for the operation of the equipment in your operating
environment.
WARNING
Dangerousvoltages, capable of causing death, are present in this equipment. Use extreme
caution when handling, testing, and adjusting.
SPD 15163 R.1 (1/88)
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TABLE OF CONTENTS
Page
CHAPTER 1 - GENERAL INFORMATION
1.1 INTRODUCTION. . . .. ... .. .. .. . .. ... . . .. . .. . . .. . .. . . . 1-1
1.2 FEATURES......................................... 1-1
1.3 SPECIFICATIONS................................... 1-1
1.4 GENERAL DESCRIPTION .......... .... ................ 1-3
1.5 REFERENCE DOCUMENTATION .......................... 1-3
1.6 MANUAL TERMINOLOGy............................... 1-3
CHAPTER 2 - HARDWARE PREPARATION AND INSTALLATION
2.1 INTRODUCTION. . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . . . . 2-1
2.2 UNPACKING INSTRUCTIONS ........................... 2-1
2.3 HARDWARE PREPARATION............................. 2-1
2.3.1 Jumper Block Settings ......................... 2-3
2.3.2 Interleave/Non-Interleave Select (Jl,J5) ~..... 2-3
2.3.3 VMEbus Lock (J2) .............................. 2-4
2.3.4 Read Cycle Access (J3) ........................ 2-5
2.3.5 Address Size Select (J4) ...................... 2-6
2.3.6 VME/VSB Address Decode Switches ............... 2-6
2.4 INSTALLATION INSTRUCTIONS ........................ 2-10
CHAPTER 3 - FUNCTIONAL DESCRI PTION
3.1 INTRODUCTION. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-1
3.2 DRAM ARRAY ....................................... 3-1
3.3 DRAM TIMING, CONTROL, AND ARBITRATION ............ 3-1
3.4 VMEbus INTERFACE................................. 3-6
3.5 VSBbus INTERFACE................................. 3-7
3.6 CONTROL/STATUS REGISTER .......................... 3-7
3.7 PARITY. . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . . . . . . . . . . . . . 3-8
3.8 ADDRESS SELECT - NON-INTERLEAVE MODE ............. 3-8
3.9 CSR MAPPING - NON-INTERLEAVE MODE ................ 3-10
3.10 ADDRESS SELECT - INTERLEAVE MODE ................. 3-11
3.11 CSR MAPPING - INTERLEAVE MODE .................... 3-11
3.11.1 MVME224A-1 Mapping -Interleave ............... 3-12
3.11.2 MVME224A-2 Mapping - Interleave............... 3-13
3.11.3 MVME224A-3 Mapping - Interleave............... 3-14
3.11.4 MVME224A-4 Mapping -Interleave ............... 3-15
vii
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TABLE OF CONTENTS (cont.)
Page
CHAPTER 4 - SUPPORT INFORMATION
4.1 INTRODUCTION ..................................... 4-1
4.2 INTERCONNECTION SIGNALS .......................... 4-1
4.2.1 Connector PI .................................. 4-1
4.2.2 Connector P2 .................................. 4-5
4.3
PARTS LIST....................................... 4-12
4.4 SCHEMATIC DIAGRAMS ............................... 4- 23
LIST OF ILLUSTRATIONS
FIGURE 2-1. Jumper, Connector, And Switch Location Diagram .... 2-2
FIGURE 2-2. VMEbus Address Mapping Switch Examples ............ 2-7
FIGURE 2-3. VSBbus Address Mapping Switch Examples ............ 2-8
FIGURE 2-4. VME/VSB Address Mapping ........................... 2-9
FIGURE 3-1. Block Diagram ..................................... 3-2
FIGURE 3-2. VME Read Cycle Timing ............................. 3-3
FIGURE 3-3. VME Write Cycle Timing ............................ 3-4
FIGURE 3-4. VSB Read Cycle Timing ............................. 3-5
FIGURE 3-5. VSB Write Cycle Timing ............................ 3-6
FIGURE 4-1. MVME244A Parts Location Diagram ................... 4-19
FIGURE 4-2. MVME224A Schematic Diagram........................ 4-25
LIST OF TABLES
TABLE 1-1. MVME224A Specifications ......... ................... I-I
TABLE 2-1. MVME224A Factory Jumper Placements ................. 2-3
TABLE 2-2. VME/VSB Address Mapping ............................ 2-9
TABLE 3-1. VME/VSB Address Mapping -Non-Interleave ........... 3-9
TABLE 3-2. CSR Address Mapping -Non-Interleave ............... 3-10
TABLE 3-3. MVME224A-l Address Mapping -Interleave ............ 3-12
TABLE 3-4. MVME224A-2 Address Mapping -Interleave ............ 3-13
TABLE 3-5. MVME224A-3 Address Mapping -Interleave ............ 3-14
TABLE 3-6. MVME224A-4 Address Mapping -Interleave ............ 3-15
TABLE 4-1. Connector PI Interconnect Signals .................. 4-1
TABLE 4-2. Connector P2 Interconnect Signals .................. 4-5
TABLE 4-3. MVME224A Parts List ................................ 4-12
viii
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GENERAL INFORMATION
CHAPTER 1 - GENERAL INFORMATION
1.1 INTRODUCTION
This user's manual provides general i~rmation, preparation and
i n
stall at ion ins truct ion s, funct i ~;ri5.~:_~_~scri pt ion, and support
information for the ~'AMbJ~ MVME224A-2 (8Mb), MVME224A-3
(16Mb), and the MVME224A-4 (32Mb) DRAM memory modules with VME/VSB
interface. These modul es are referred to as the MVME224A throughout
the remainder of this manual.
1.2 FEATURES
The features of the MVME224A incl ude:
eMemory Capacity - 4Mb or 8Mb using I-megabit DRAMs in ZIP packages
(MVME224A -1 and MVME224A- 2 vers ion s) .
e Memory Capaci ty - 16Mb or 32Mb us i ng 4-megabi t DRAMs in ZIP
packages (MVME224A-3 and MVME224A- 4 vers ion s) .
eDual ported VMEbus interface with ,@/24-/32-bit address
selection and 16-/32-bit data. ~ Go I I
eMultiplexed VSBbus interface with 32-bit address/data.
e Longword (32-bit), Word (16-bit), and byte (8-bit) data transfers.
eMemory base address switch-selectable on any 1Mb boundary
throughout the VMEbus and VSBbus address space.
e Error Protection -- Parity is provided on a byte basis.
eCommand and Status Register -- Control over parity and error status
reporting.
eFast Read -- Selectable to start reads on PAS* on VSBbus for fast
acces s or DS* to allow a cache detect ion.
e Fast Write -- Both VMEbus and VSBbus provide early DTACK on a write
access.
e Two board i nterl eave.
e _~_l~~~~_~i_~Q.!l-y.s..~,b us.
1.3 SPECIFICATIONS
General specifications for the MVME224A are provided in Table 1-1.
1-1
I
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I
GENERAL INFORMATION
TABLE 1-1. MVME224A SPECIFICATIONS
Characteristic
Storage capacity:
MVME224A-1
MVME224A-2
MVME224A-3
MVME224A-4
Data transfer size
Error detect ion
Data Input/Output
Input address
Power
requirements:
MVME224A-1
MVME224A-2
MVME224A-3
MVME224A-4
Relative humidity
Temperature:
Operating
Storage
Physical size (PCB):
Hei ght x wi dth
Thickness
Part projections:
Component side
Solder side
1-2
4 Megabytes
8 Megabytes
16 Megabytes
32 Megabytes
Specification
8-, 16-, and 32-bi t
Odd byte pari ty
16-/32-bit VMEbus, 32-bit VSBbus
16-/24-/32-bit VMEbus, 32-bit VSBbus
+4.75 to 5.25 Vdc at 5.0 A maximum (3.9A typical)
+4.75 to 5.25 Vdc at 5.0 A maximum (3.9A typical)
+4.75 to 5.25 Vdc at 5.0 A maximum (3.9A typical)
+4.75 to 5.25 Vdc at 5.9 A maximum (4.5A typical)
5% to 95% (non-condensing)
odegree to 50 degrees C inlet air temperature
with forced air cool i ng.
-
40 degrees to 85 degrees C
6.30 inches (16.00 cm) x 9.19 inches (23.34 cm)
0.062 inch (0.157 cm)
0.50 inch (1. 27 cm) maximum
0.067 inch (0.17 cm) maximum
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GENERAL INFORMATION
1.4 GENERAL DESCRIPTION
The MVME224A module is a high performance dynamic memory module,
dual
ported to both the VMEbus and VSBbus. Both modul es can be
mapped to start on any 1Mb boundary and extend by the module (board)
size. The MVME224A uses an advanced arbitration method which buries
the arbitration time for the next cycle in the current cycle, thus
increasing throughput.
1.5 REFERENCE DOCUMENTAT I ON
The following publications may provide additional helpful
information. If not shipped with this product, they may be
purchased from Motorola's Literature Distribution Center, 616 West
24th Street, Tempe, Arizona 85282; telephone [phone].
MOTOROLA
DOCUMENT TITLE
PUBL I CAT ION NUMBER
VME Subsystem Bus (VSBbus) Spec i fi cat ion
(RevA.l)
MVMESB
An additional publication that may provide helpful information is
listed below.
ANSI/IEEE Std 1014-1987
Institute of Electrical and
Electronics Engineers, Inc.
345 East 47th Street
IEEE Standard for a Versatile
Backplane Bus: VMEbus
1.6 MANUAL TERMINOLOGY
New York, New York 10017
Throughout this manual, a convention has been maintained whereby
data and address parameters are preceded by a character which
speci
fie s the n urn e ric form at as f 011 0 ws:
$
%
&
doll ar
percent
ampersand
specifies a hexadecimal number
specifies a binary number
specifies a decimal number
Unless otherwise specified, all address references are in
hexadecimal throughout
thi s manual.
An asterisk (*) following the signal name for signals which are
level significant denotes that the signal is true or valid when the
signal is low.
1-3
•
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I
GENERAL INFORMATION
An asterisk (*) following the signal name for signals which are edge
significant denotes that the actions initiated by that signal occur
on high to low transition.
In this manual, assertion and negation are used to specify forcing a
signal to a particular state. In particular, assertion and assert
refer to a signal that is active or true; negation and negate
indicate a signal that is inactive or false. These terms are used
independently
of the voltage level (high or low) that they
represent.
1-4
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HARDWARE PREPARATION
CHAPTER 2 - HARDWARE PREPARATION AND INSTALLATION
2.1 INTRODUCTION
This chapter provides the unpacking, hardware preparation, and
installation instructions for the MVME224A memory modules. It also
descri bes the start-up procedures.
2.2 UNPACKING INSTRUCTIONS
NOTE
If shipping carton is damaged upon receipt,
request that the carrier's agent be present
during unpacking/inspection of equipment.
Carefully unpack the equipment from the shipping carton. Refer to
the packing list and verify that all items are present. Save the
shipping carton and packing materials for storing or reshipping of
the equi pment.
CAUTION
AVOID TOUCHING AREAS OF INTEGRATED CIRCUITS;
STATIC DISCHARGE CAN DAMAGE THESE CIRCUITS.
Inspect for any shipping damage. If no damage exists, then the
module can be prepared for operation according to the following
sections of this chapter.
2.3 HARDWARE PREPARATION
This section describes the hardware preparation of the MVME224A
memory module prior to installation. Observance of this description
wi 11 ensure the user that all components are properly confi gured for
operation.
Jumper blocks are used to select the various functions and options
of the MVME224A memory modul e. Before the MVME224A is i nsta 11 ed, the
user should verify the jumper block configurations and alter the
jumpers, as required, for the user's particular system operation.
2-1
I
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N
I
N
VMEbus VSBbus
FIGURE 2-1. JUMPER, CONNECTOR, AND SWITCH LOCATION DIAGRAM
III
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HARDWARE PREPARATION
The MVME224A has been factory tested and is shipped with factory- I
installed jumper configurations that are illustrated in Figure 2..,l.
The MVME224A is operational with these factory-installed jumpers.
Table 2-1 lists the jumper blocks by designation, function, and
factory confi gurat ion. A more deta i 1ed descript i on of these jumper
blocks is provided in the following sections.
Also, three DIP-type switches (Sl, S2, and S3) are located on the
MVME224A. For detailed information regarding the use of these three
swi tches, refer to the sect i on II VME/VSB Address Decode Swi tches ".
2.3.1 Jumper Block Settings
The' f 011 0 wing tab 1 eli st san d des c rib est heMV ME 224A j um per b10 cks .
TABLE 2-1.
MVME224A FACTORY JUMPER PLACEMENTS
Jumper Function Factory Configuration
J1 Interleave/Non-Interleave
J1 (1-2) (3-4)
Se 1 ect (VME)
J2
VMEbus Lock No Jumper(s) Installed.
J3
Read Cycl e Access No Jumper(s) Installed.
J4 Address Size
Select No Jumper(s) Installed.
J5 Interleave/Non-Interleave
J5(1-2)(3-4)
Select (VSB)
2.3.2 Interleave/Non-Interleave Select (Jl,J5)
Jumper blocks J1 and J5 determine whether the MVME224A module is
operating independently, or in the two-board interleave mode. With
jumper caps installed across J1 pins (1-2), (3-4) and J5 pins (1-2),
(3-4),
the MVME224A is configured in the non-interleave mode. The
MVME224A's addressing is independent of any other boards in the
system, and there are no restri ct ions on its mappi ng.
With
jumper caps installed across J1 pins (1-3), (2-4), and J5 pins
(1-3), (2-4), the MVME224A is configured in the interleave mode.
The
MVME224A can, in some high performance systems, enhance
performance. The MVME224A must be installed in pairs and there are
addressing restrictions (refer to the section, "Address Select -
Interleave Mode" for more details). Block transfer on the VSBbus is
not available in the interleave mode.
2-3
,
)
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I
HARDWARE PREPARATION
In all cases, VME and VSB must be set the same, i. e., both must be set
to non - i nterl eave, or, both must be set to i nterl eave.
Jumper Block J1 and J5
Interleave/Non-Interleave Select
No Interleave Selected
(Factory Setting)
J1
+-----+
/
1
0--0
2
3
0--0
4
1
0--0
2
3
0--0
4
+------+
J5
Jumper Block
J1 and J5
Interleave/Non-Interleave Select
Interleave Selected
1
3
1
3
J1
+-----+
/ 0 0
I I
0 0
0 0
I I
0 0
+------+
J5
2
4
2
4
2.3.3 VMEbus Lock (J2)
In
systems that support the VMELOCK signal opt ion (s uch as the
MVME130, MVME131, MVME135, or MVME141), install ing a jumper pin
across jumper J2 pins 1-2 will allow control of locking the VMEbus.
2-4
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HARDWARE PREPARATION
Normally, the VSBbus is locked out until Address Strobe (AS*) on the
VMEbus returns to high, as there is no way to detect a read-modify-
write cycle.
If this jumper is installed, only those cycles that drive VMELOCK*
low are locked and the MVME224A is allowed to start a VSBbus cycle
earlier. If the VME cycles they follow are not locked, it will not
have
to wait for the VMEbus AS* signal to return high. The VMELOCK
signal is driven by the bus master on the reserved bus pin P2-B3.
Jumper Block J2
VMEbus Lock
No Jumper Installed
(Factory Setting)
J2
+--+
/
1 0
2 0
+---+
2.3.4 Read Cycle Access (J3)
Jumper block J3 serves two functions. First, it determines whether
a read
cycle will start from PAS* or DS* on the VSBbus. In some
systems doing caching, the master will drive addresses and PAS*
during the time it is decoding a potential local cache hit. If a
cache
hit is found, it simply removes the strobes without driving
DS* or completing the cycle.
Install ing a jumper pin across jumper J3 pins 1-2, starts read
cycles on DS* to avoid starting false cycles. Systems not employing
these address-only cache cycles should start reads on PAS* (i.e.,
with the jumper not installed).
Secondly, jumper block J3 also determines whether the WAIT* signal
will be driven. In a system with one or more slaves who decode and
drive ASACK0* or ASACK1* in less than 50 nanoseconds, jumper J3
should be installed. Installing jumper J3 causes the MVME224A to
drive the WAIT* signal and forces the master to hold addresses
stable until decoding is done by the MVME224A. This slows system
performance
slightly, so it should be avoided unless necessary.
In a system where all slaves are MVME224As, or no slaves are capable
of decoding addresses and driving ASACK0* or ASACK1* in less than 50
n ano seconds from PAS*, do not ins ta 11 j umpe'r J3.
2-5
I
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I
HARDWARE PREPARATION
Jumper Block J3
Read Cycle Access
No Jumper Installed
(Factory Setting)
J3
+--+
/ 0
2 0
+---+
2.3.5 Address Size Select (J4)
Jumper
block J4 determi nes the address size sel ect ion. Wi th no
jumper pin installed, 24- or 32-bit addressing is allowed. With a
jumper
pin installed across jumper J2 pins 1-2, 24-bit address
modifiers will not be decoded and the module will not respond to 24-
bi t
addresses. '
Jumper Block J4
Address Size
Select
No Jumper Installed
(Factory Setting)
J4
+--+
/
1 0
2 0
+---+
2.3.6 VME/VSB Address Decode Swi tches
DIP switches Sl, S2, and S3 are used in selecting the starting
address for the VMEbus and the VSBbus mapp i ng. Addressi ng is
independent 1y se 1 ectab 1e on 1Mb boundari es.
The VME portion of the switches is also used in selecting the
start i ng address for the CSR mappi ng. The CSR is mapped dependent on
the mappi ng of the address i ng to the RAMs on the VMEbus. The
following figures illustrate how the switch positions can be set for
any requ ired add res s.
2-6
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