N.A.T. NAT-MCH Use and care manual

NAT-MCH HUB-Module XAUI –Technical Reference Manual
NAT-MCH
TCA Telecom MCH Module
Technical Reference Manual V 1.2
Hub Module XAUI HW Revision 1.0

NAT-MCH HUB-Module XAUI –Technical Reference Manual
Version 1.2 © N.A.T. GmbH 2
The NAT-MCH Hub Module XAUI has been designed by:
N.A.T. GmbH
Konrad-Zuse-Platz 9
D-53227 Bonn-Oberkassel
Phone: +49 / 228 / 965 864 - 0
Fax: +49 / 228 / 965 864 - 10
Internet: http://www.nateurope.com

NAT-MCH HUB-Module XAUI –Technical Reference Manual
Version 1.2 © N.A.T. GmbH 3
Disclaimer
The following documentation, compiled by N.A.T. GmbH (henceforth called N.A.T.),
represents the current status of the product’s development. The documentation is
updated on a regular basis. Any changes which might ensue, including those necessitated
by updated specifications, are considered in the latest version of this documentation.
N.A.T. is under no obligation to notify any person, organization, or institution of such
changes or to make these changes public in any other way.
We must caution you, that this publication could include technical inaccuracies or
typographical errors.
N.A.T. offers no warranty, either expressed or implied, for the contents of this
documentation or for the product described therein, including but not limited to the
warranties of merchantability or the fitness of the product for any specific purpose.
In no event will N.A.T. be liable for any loss of data or for errors in data utilization or
processing resulting from the use of this product or the documentation. In particular,
N.A.T. will not be responsible for any direct or indirect damages (including lost profits,
lost savings, delays or interruptions in the flow of business activities, including but not
limited to, special, incidental, consequential, or other similar damages) arising out of the
use of or inability to use this product or the associated documentation, even if N.A.T. or
any authorized N.A.T. representative has been advised of the possibility of such
damages.
The use of registered names, trademarks, etc. in this publication does not imply, even in
the absence of a specific statement, that such names are exempt from the relevant
protective laws and regulations (patent laws, trade mark laws, etc.) and therefore free
for general use. In no case does N.A.T. guarantee that the information given in this
documentation is free of such third-party rights.
Neither this documentation nor any part thereof may be copied, translated, or reduced to
any electronic medium or machine form without the prior written consent from N.A.T.
GmbH.
This product (and the associated documentation) is governed by the N.A.T. General
Conditions and Terms of Delivery and Payment.
Note:
The release of the Hardware Manual is related to a certain HW board revision
given in the document title. For HW revisions earlier than the one given in the
document title please contact N.A.T. for the corresponding older Hardware
Manual release.

NAT-MCH HUB-Module XAUI –Technical Reference Manual
Version 1.2 © N.A.T. GmbH 4
Table of Contents
DISCLAIMER ....................................................................................................... 3
TABLE OF CONTENTS .......................................................................................... 4
LIST OF TABLES .................................................................................................. 5
LIST OF FIGURES................................................................................................ 5
CONVENTIONS.................................................................................................... 6
1INTRODUCTION ........................................................................................... 7
2OVERVIEW ................................................................................................... 9
2.1 MAJOR FEATURES......................................................................................... 9
2.2 TECHNICAL FEATURES ................................................................................... 9
2.3 BLOCK DIAGRAM ........................................................................................10
2.4 LOCATION DIAGRAM ....................................................................................11
3FUNCTIONAL BLOCKS ................................................................................ 12
3.1 XAUI SWITCH ...........................................................................................12
3.2 FPGA .....................................................................................................12
3.3 MICROCONTROLLER .....................................................................................13
3.4 INTERFACES ..............................................................................................13
3.5 UPLINK OPTION..........................................................................................13
4HARDWARE ................................................................................................ 14
4.1 CONNECTORS ............................................................................................14
4.1.1 Connector Overview..........................................................................14
4.1.2 CON1: HUB-Module XAUI Backplane Connector ....................................15
4.1.3 CON2: HUB-Module x48 Extender Connector........................................17
4.1.4 CON3: CLK-Module Connector ............................................................19
4.1.5 CON4: Uplink-Module Connector.........................................................20
4.1.6 JP1: FPGA Programming Interface ......................................................21
5PROGRAMMING NOTES .............................................................................. 22
5.1 BOARD IDENTIFIER REGISTER .........................................................................22
5.2 PCB REVISION REGISTER ..............................................................................22
5.3 FIRMWARE VERSION ....................................................................................23
5.4 HUB MODULE XAUI TYPE ..............................................................................23
5.5 FPGA REVISION REGISTER ............................................................................23
5.6 SWITCH CONTROL REGISTER ..........................................................................24
5.7 RESERVED ................................................................................................24
5.8 SPI MULTIPLEXER CONTROL ...........................................................................25
6BOARD SPECIFICATION ............................................................................. 26
7INSTALLATION .......................................................................................... 27
7.1 SAFETY NOTE ............................................................................................27
7.2 INSTALLATION PREREQUISITES AND REQUIREMENTS ...............................................27
7.2.1 Requirements ..................................................................................27

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Version 1.2 © N.A.T. GmbH 5
7.2.2 Power supply ...................................................................................27
7.2.3 Automatic Power Up..........................................................................27
7.3 STATEMENT ON ENVIRONMENTAL PROTECTION ......................................................28
7.3.1 Compliance to RoHS Directive ............................................................28
7.3.2 Compliance to WEEE Directive............................................................28
7.3.3 Compliance to CE Directive ................................................................29
7.3.4 Product Safety .................................................................................29
7.3.5 Compliance to REACH .......................................................................29
8KNOWN BUGS / RESTRICTIONS................................................................. 30
APPENDIX A: REFERENCE DOCUMENTATION .................................................... 31
APPENDIX B: DOCUMENT’S HISTORY ............................................................... 32
List of Tables
Table 1: List of used Abbreviations ...................................................................... 6
Table 2: AMC Slot to Switch Port assignment .......................................................12
Table 3: CON1: HUB-Module XAUI Backplane Connector –Pin Assignment .............15
Table 4: CON2: HUB-Module x48 Extender Backplane Connector –Pin Assignment..17
Table 5: CON3: CLK-Module Connector –Pin Assignment ......................................19
Table 6: CON4: Uplink-Module Connector –Pin Assignment...................................20
Table 7: JP1: FPGA Programming Interface –Pin Assignment ................................21
Table 8: Board Identifier Register.......................................................................22
Table 9: PCB_REV Register ................................................................................22
Table 10: FW_VERSION Register..........................................................................23
Table 11: XAUI_TYP Register ...............................................................................23
Table 12: FPGA Revision Register.........................................................................23
Table 13: SW_CTL Register .................................................................................24
Table 14: SW_CTL - Register Bits.........................................................................24
Table 15: RSVD Register .....................................................................................24
Table 16: SPI_MUX_CTL Register .........................................................................25
Table 17: SPI_MUX_CTL - Register Bits.................................................................25
Table 18: NAT-MCH HUB-Module XAUI –Features ..................................................26
List of Figures
Figure 1: Arrangement of different NAT-MCH Modules ............................................. 7
Figure 2: NAT-MCH HUB-Module XAUI –Block Diagram..........................................10
Figure 3: NAT-MCH HUB-Module XAUI –Location diagram (top) ..............................11
Figure 4: NAT-MCH HUB-Module XAUI –Location diagram (bottom) ........................11
Figure 5: NAT-MCH HUB-Module XAUI –Connectors (top) ......................................14
Figure 6: NAT-MCH HUB-Module XAUI –Connectors (bottom).................................14

NAT-MCH HUB-Module XAUI –Technical Reference Manual
Version 1.2 © N.A.T. GmbH 6
Conventions
If not otherwise specified, addresses and memory maps are written in hexadecimal
notation, identified by 0x.
Table 1 gives a list of the abbreviations used in this document:
Table 1: List of used Abbreviations
Abbreviation
Description
AMC
Advanced Mezzanine Card
b
bit, binary
B
Byte
ColdFire
MCF5470
CPU
Central Processing Unit
CU
Cooling Unit
DMA
Direct Memory Access
E1
2.048 Mbit G.703 Interface
FLASH
Programmable ROM
FRU
Field Replaceable Unit
J1
1,544 Mbit G.703 Interface (Japan)
K
kilo (factor 400 in hex, factor 1024 in decimal)
LIU
Line Interface Unit
M
mega (factor 10,0000 in hex, factor 1,048,576 in decimal)
MCH
µTCA Carrier Hub
MHz
1,000,000 Herz
µTCA
Micro Telecommunications Computing Architecture
PCIe
PCI Express
PCI
Peripheral Component Interconnect
PM
Power Manager
RAM
Random Access Memory
ROM
Read Only Memory
SDRAM
Synchronous Dynamic RAM
SRIO
Serial Rapid IO
SSC
Spread Spectrum Clock
T1
1,544 Mbit G.703 Interface (USA)
XAUI
10 Gigabit Attachment Unit Interface

NAT-MCH HUB-Module XAUI –Technical Reference Manual
Version 1.2 © N.A.T. GmbH 7
1Introduction
The NAT-MCH consists of a BASE-Module, which can be expanded with additional
PCBs. The BASE-Module satisfies the basic requirements of the MicroTCA Specification
for a MicroTCA Carrier Hub. The main capabilities of the BASE-Module are:
management of up to 12 AMCs, two cooling units (CUs) and up to four power
modules (PMs)
Gigabit Ethernet Hub Function for Fabric A (up to 12 AMCs) and for the
Update Fabric A to a second (redundant) NAT-MCH
To meet also the optional requirements of the MicroTCA specification, a CLK-Module and
different HUB-Modules are available. With the CLK-Module the following functions can
be enabled:
generation and distribution of synchronized clock signals for up to 12 AMCs
Through the extension of the NAT-MCH with a HUB-Module, hub functions for fabric D
to G can be enabled. With the different versions the customers have the opportunity to
choose a HUB-Module that fits best to their applications. The versions differ in:
max. number of supported AMCs (up to 6 / up to 12)
supported protocols:
oPCI Express
oSerial Rapid IO
o10Gigabit Ethernet (XAUI)
The features of the individual modules are described in more detail in the corresponding
Technical Reference Manuals.
A general arrangement of the different modules of a NAT-MCH is shown in the following
figure.
Figure 1: Arrangement of different NAT-MCH Modules
LED Module
Basic Module CLK Module
Hub Module
This Technical Reference Manual describes the Hub-Module XAUI. In addition to the
CLK-Module it can be mounted on the NAT-MCH BASE-Module. The HUB-Module
XAUI is in a 6 Slot (“x24”) and in a 12 slot (“x48”) option available. With the HUB-
Module XAUI the 3rd tongue of the NAT-MCH connector to the MicroTCA backplane is
always installed. With the x48 option, additional the 4th tongue is installed. The NAT-
MCH HUB-Module XAUI implements the following major features:
support of Ethernet switching in configurable speeds (1/2.5/10 Gbit/s) for fabrics
D to G of up to 6 AMCs (HUB-Module XAUI x24)

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Version 1.2 © N.A.T. GmbH 8
support of Ethernet switching in configurable speeds (1/2.5/10 Gbit/s) for fabrics
D to G of up to 12 AMCs (HUB-Module XAUI x48)
support of a 10 Gbit Ethernet update connection to second MCH
support of 10 Gbit Ethernet switching for two faceplate ports (additional module
needed)
The main component of the HUB-Module XAUI is a 20 port 10 Gbit Ethernet switch.
This switch connects up to 12 AMCs (x48 version), a second MCH and optional two ports
at the face plate.

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Version 1.2 © N.A.T. GmbH 9
2Overview
2.1 Major Features
Ethernet switching in configurable speeds: 1 Gbit/s, 2.5 Gbit/s or 10 Gbit/s for up
to 6 AMCs (HUB-Module XAUI x24) / 12 AMCs (HUB-Module XAUI x48)
Altera Cyclone II FPGA
Atmel ATmega16
Backplane update fabric to second MCH
2x 10 Gbit Ethernet uplink ports on faceplate via copper or optical medium
(optional)
2.2 Technical Features
Interface features
Link Aggregation (802.3ad)
Multi-point link-Ag extensions
PAUSE flow control (802.3x)
Bridge features
16K entry MAC address table
Spanning Tree (802.1D, s, w)
VLAN, priority (802.1Q, P)
4K VLAN table
Link Aggregation (802.3ad)
Duplex Flow Control (802.3x)
All IEEE protocol traps
User-defined monitoring and filtering rules
RMON, and Fulcrum statistics
Security
Mac address security
Port access control (802.1x)
Chip performance
240 Gbps bandwidth
Low-latency cut-through switching: 200 ns @ 10G, 650 ns @ 1G.
Store and Forward mode
2x internal switch fabric over speed
Full speed multicast
Board Features
configuration interface via on board microcontroller / FPGA
2 onboard temperature sensors

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Version 1.2 © N.A.T. GmbH 10
2.3 Block Diagram
The following figure shows a block diagram of the NAT-MCH HUB-Module XAUI and
optional available extension modules.
Figure 2: NAT-MCH HUB-Module XAUI –Block Diagram
backplane connector (Harting Plug)
SPI/
I²C
NAT-MCH
HUB-Module
XAUI
fabric D to G
to AMC 1-6
XAUI
Micro-
controller
Connector to
Basic-PCB
XAUI
SWITCH
Parallel
CPU Interface
(32bit)
backplane connector (Harting Plug)
I²C
NAT-MCH
HUB-Module
x48_ext
Connector between
3rd and 4th PCB
to AMC 7-12
XAUI
fabric D to G
Temp.-
sensor
FPGA
SPI
Parallel Interface
(8bit)
connector to face plate
module
2x XAUI
CX4
connector
NAT-MCH
CX4 Extender
connector to face plate
module
SFP+ cage
Dual XAUI to SFI
PHY
2x XAUI
SFP+ cage
SFI
SFI
CX4
connector
on face plate
on face plate
NAT-MCH
SFP+ Extender
* The HUB-PCB x48_ext is only assembled in the x48 version.
* The CX4 and the SFP+ Extender are only optional. Please note: only one face plate
module can be chosen either the CX4 or the SFP+ extender.

NAT-MCH HUB-Module XAUI –Technical Reference Manual
Version 1.2 © N.A.T. GmbH 11
2.4 Location Diagram
The following figure shows the position of important components of the NAT-MCH HUB-
Module XAUI.
Figure 3: NAT-MCH HUB-Module XAUI –Location diagram (top)
Figure 4: NAT-MCH HUB-Module XAUI –Location diagram (bottom)

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Version 1.2 © N.A.T. GmbH 12
3Functional Blocks
The NAT-MCH HUB-Module XAUI is divided into a number of functional blocks, which
are described in the following paragraphs.
3.1 XAUI Switch
The NAT-MCH HUB-Module XAUI is equipped with a Fulcrum Microchip FM2220 switch,
which provides high performance, low latency and robust Ethernet packet switching. The
FM2220 offers per port configurable speed of 1GbE (one lane), 2.5GbE (one lane), and
10GbE (four lanes/ XAUI). It supports 15 ports in order to connect 12 AMCs, a second
MCH and two optional face plate interfaces.
The FM2220 can be configured by an EEPROM, or by accessing the FM2220 register
interface via a parallel CPU interface. The CPU on the NAT-MCH BASE-Module has
access to that interface via the SPI bus. A standard configuration is done by the EEPROM
after a reset. The CPU interface has to be used if changes have to be done at the running
system.
The following table shows the AMC slot to switch port assignment.
Table 2: AMC Slot to Switch Port assignment
# AMC Slot Fabric D-G
#Port FM2220
AMC1
11
AMC2
13
AMC3
19
AMC4
20
AMC5
14
AMC6
12
AMC7
1
AMC8
21
AMC9
23
AMC10
24
AMC11
22
AMC12
2
2nd MCH
7
front interface 1
Tbd
front interface 2
Tbd
3.2 FPGA
An Altera Cyclone II FPGA is used as “glue logic” to translate between the SPI interface
on the NAT-MCH BASE-Module and the parallel CPU interface of the FM2220 switch.

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Version 1.2 © N.A.T. GmbH 13
3.3 Microcontroller
An 8-bit Atmel ATmega16 microcontroller resides on the NAT-MCH HUB-Module XAUI,
which can be updated by the CPU on the BASE-Module via a SPI interface. Normal
communication between the CPU and the microcontroller is done by IPMI messages over
the I²C interface.
The reset signals of the switches can be controlled through programming registers in the
microcontroller.
Two temperature sensors are connected to a HUB-Module XAUI internal I²C bus. The
microcontroller makes these sensors accessible to the CPU on the BASE-Module via
IPMI.
3.4 Interfaces
The NAT-MCH HUB-Module XAUI implements interfaces to connect fabrics D to G of up
to 12 AMCs and a second MCH.
With the extension of a face plate module additional two 10GbE interfaces are accessible
at the face plate. The physical medium depends on the chosen face plate module.
Options are:
CX4 Extender: 10GBase-CX4 (XAUI)
SFP+ Extender: this extender provides only two SFP+ cages. The physical
medium depends on the chosen SFP+ Transceiver, but it is normally any optical
medium.
3.5 Uplink Option
With the uplink option it is possible to connect to the XAUI fabric up to two face plate
connectors. This is an assembly option and therefore need to be chosen when ordered.
The speed is set to 10 GbE by default.

NAT-MCH HUB-Module XAUI –Technical Reference Manual
Version 1.2 © N.A.T. GmbH 14
4Hardware
4.1 Connectors
4.1.1 Connector Overview
Figure 5: NAT-MCH HUB-Module XAUI –Connectors (top)
Figure 6: NAT-MCH HUB-Module XAUI –Connectors (bottom)
Please refer to the following tables to look up the pin assignment of the NAT-MCH HUB-
Module XAUI.

NAT-MCH HUB-Module XAUI –Technical Reference Manual
Version 1.2 © N.A.T. GmbH 15
4.1.2 CON1: HUB-Module XAUI Backplane Connector
Table 3: CON1: HUB-Module XAUI Backplane Connector
–Pin Assignment
Pin #
MCH-Signal
MCH-Signal
Pin #
1
GND
GND
170
2
RSVD
RSVD
169
3
RSVD
RSVD
168
4
GND
GND
167
5
RSVD
RSVD
166
6
RSVD
RSVD
165
7
GND
GND
164
8
TxFUD+
RxFUD+
163
9
TxFUD-
RxFUD-
162
10
GND
GND
161
11
TxFUE+
RxFUE+
160
12
TxFUE-
RxFUE-
159
13
GND
GND
158
14
TxFD1+
RxFD1+
157
15
TxFD1-
RxFD1-
156
16
GND
GND
155
17
TxFE1+
RxFE1+
154
18
TxFE1-
RxFE1-
153
19
GND
GND
152
20
TxFF1+
RxFF1+
151
21
TxFF1-
RxFF1-
150
22
GND
GND
149
23
TxFG1+
RxFG1+
148
24
TxFG1-
RxFG1-
147
25
GND
GND
146
26
TxFD2+
RxFD2+
145
27
TxFD2-
RxFD2-
144
28
GND
GND
143
29
TxFE2+
RxFE2+
142
30
TxFE2-
RxFE2-
141
31
GND
GND
140
32
TxFF2+
RxFF2+
139
33
TxFF2-
RxFF2-
138
34
GND
GND
137
35
TxFG2+
RxFG2+
136
36
TxFG2-
RxFG2-
135
37
GND
GND
134
38
TxFD3+
RxFD3+
133
39
TxFD3-
RxFD3-
132
40
GND
GND
131
41
TxFE3+
RxFE3+
130
42
TxFE3-
RxFE3-
129
43
GND
GND
128
44
TxFF3+
RxFF3+
127
45
TxFF3-
RxFF3-
126

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Version 1.2 © N.A.T. GmbH 16
Pin #
MCH-Signal
MCH-Signal
Pin #
46
GND
GND
125
47
TxFG3+
RxFG3+
124
48
TxFG3+
RxFG3-
123
49
GND
GND
122
50
TxFD4+
RxFD4+
121
51
TxFD4-
RxFD4-
120
52
GND
GND
119
53
TxFE4+
RxFE4+
118
54
TxFE4-
RxFE4-
117
55
GND
GND
116
56
TxFF4+
RxFF4+
115
57
TxFF4-
RxFF4-
114
58
GND
GND
113
59
TxFG4+
RxFG4+
112
60
TxFG4-
RxFG4-
111
61
GND
GND
110
62
TxFD5+
RxFD5+
109
63
TxFD5-
RxFD5-
108
64
GND
GND
107
65
TxFE5+
RxFE5+
106
66
TxFE5-
RxFE5-
105
67
GND
GND
104
68
TxFF5+
RxFF5+
103
69
TxFF5-
RxFF5-
102
70
GND
GND
101
71
TxFG5+
RxFG5+
100
72
TxFG5-
RxFG5-
99
73
GND
GND
98
74
TxFD6+
RxFD6+
97
75
TxFD6-
RxFD6-
96
76
GND
GND
95
77
TxFE6+
RxFE6+
94
78
TxFE6-
RxFE6-
93
79
GND
GND
92
80
TxFF6+
RxFF6+
91
81
TxFF6+
RxFF6-
90
82
GND
GND
89
83
TxFG6+
RxFG6+
88
84
TxFG6-
RxFG6-
87
85
GND
GND
86

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4.1.3 CON2: HUB-Module x48 Extender Connector
Table 4: CON2: HUB-Module x48 Extender Backplane Connector
–Pin Assignment
Pin #
MCH-Signal
MCH-Signal
Pin #
1
GND
GND
170
2
RSVD
RSVD
169
3
RSVD
RSVD
168
4
GND
GND
167
5
RSVD
RSVD
166
6
RSVD
RSVD
165
7
GND
GND
164
8
TxFUF+
RxFUD+
163
9
TxFUF-
RxFUD-
162
10
GND
GND
161
11
TxFUG+
RxFUE+
160
12
TxFUG-
RxFUE-
159
13
GND
GND
158
14
TxFD7+
RxFD7+
157
15
TxFD7-
RxFD7-
156
16
GND
GND
155
17
TxFE7+
RxFE7+
154
18
TxFE7-
RxFE7-
153
19
GND
GND
152
20
TxFF7+
RxFF7+
151
21
TxFF7-
RxFF7-
150
22
GND
GND
149
23
TxFG7+
RxFG7+
148
24
TxFG7-
RxFG7-
147
25
GND
GND
146
26
TxFD8+
RxFD8+
145
27
TxFD8-
RxFD8-
144
28
GND
GND
143
29
TxFE8+
RxFE8+
142
30
TxFE8-
RxFE8-
141
31
GND
GND
140
32
TxFF8+
RxFF8+
139
33
TxFF8-
RxFF8-
138
34
GND
GND
137
35
TxFG8+
RxFG8+
136
36
TxFG8-
RxFG8-
135
37
GND
GND
134
38
TxFD9+
RxFD9+
133
39
TxFD9-
RxFD9-
132
40
GND
GND
131
41
TxFE9+
RxFE9+
130
42
TxFE9-
RxFE9-
129
43
GND
GND
128
44
TxFF9+
RxFF9+
127
45
TxFF9-
RxFF9-
126

NAT-MCH HUB-Module XAUI –Technical Reference Manual
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Pin #
MCH-Signal
MCH-Signal
Pin #
46
GND
GND
125
47
TxFG9+
RxFG9+
124
48
TxFG9+
RxFG9-
123
49
GND
GND
122
50
TxFD10+
RxFD10+
121
51
TxFD10-
RxFD10-
120
52
GND
GND
119
53
TxFE10+
RxFE10+
118
54
TxFE10-
RxFE10-
117
55
GND
GND
116
56
TxFF10+
RxFF10+
115
57
TxFF10-
RxFF10-
114
58
GND
GND
113
59
TxFG10+
RxFG10+
112
60
TxFG10-
RxFG10-
111
61
GND
GND
110
62
TxFD11+
RxFD5+
109
63
TxFD11-
RxFD5-
108
64
GND
GND
107
65
TxFE11+
RxFE5+
106
66
TxFE11-
RxFE5-
105
67
GND
GND
104
68
TxFF11+
RxFF11+
103
69
TxFF11-
RxFF11-
102
70
GND
GND
101
71
TxFG11+
RxFG11+
100
72
TxFG11-
RxFG11-
99
73
GND
GND
98
74
TxFD12+
RxFD12+
97
75
TxFD12-
RxFD12-
96
76
GND
GND
95
77
TxFE12+
RxFE12+
94
78
TxFE12-
RxFE12-
93
79
GND
GND
92
80
TxFF12+
RxFF12+
91
81
TxFF12+
RxFF12-
90
82
GND
GND
89
83
TxFG12+
RxFG12+
88
84
TxFG12-
RxFG12-
87
85
GND
GND
86

NAT-MCH HUB-Module XAUI –Technical Reference Manual
Version 1.2 © N.A.T. GmbH 19
4.1.4 CON3: CLK-Module Connector
Table 5: CON3: CLK-Module Connector –Pin Assignment
Pin #
Signal
Signal
Pin #
1
+12V
+12V
2
3
+12V
+12V
4
5
N.C.
+3.3V_MP
6
7
N.C.
SPICLK
8
9
GND
expansion3
10
11
MOSI
MISO
12
13
GND
/SPISEL_HUBPCB
14
15
SCL
N.C.
16
17
SDA
nRESET_HUB_PCB
18
19
GND
GND
20
This connector connects to the CLK-Module. On the CLK-Module the signals of
this connector are routed through to a connector that connects to the BASE-
Module.

NAT-MCH HUB-Module XAUI –Technical Reference Manual
Version 1.2 © N.A.T. GmbH 20
4.1.5 CON4: Uplink-Module Connector
Table 6: CON4: Uplink-Module Connector –Pin Assignment
Pin No#
Signal
Signal
Pin #
1
GND
GND
2
3
+1.2V
+1.2V
4
5
+1.2V
+1.2V
6
7
GND
GND
8
9
FP_CON_5
FP_CON_1
10
11
FP_CON_6
FP_CON_2
12
13
GND
GND
14
15
FP_CON_7
FP_CON_3
16
17
FP_CON_8
FP_CON_4
18
19
GND
GND
20
21
FP_CON9
FP_CON11
22
23
FP_CON10
FP_CON12
24
25
GND
GND
26
27
UP_LINK1_TD_N
UP_LINK1_RA_P
28
29
UP_LINK1_TD_P
UP_LINK1_RA_N
30
31
GND
GND
32
33
UP_LINK1_TC_N
UP_LINK1_RB_P
34
35
UP_LINK1_TC_P
UP_LINK1_RB_N
36
37
GND
GND
38
39
UP_LINK1_TB_N
UP_LINK1_RC_P
40
41
UP_LINK1_TB_P
UP_LINK1_RC_N
42
43
GND
GND
44
45
UP_LINK1_TA_N
UP_LINK1_RD_P
46
47
UP_LINK1_TA_P
UP_LINK1_RD_N
48
49
GND
GND
50
51
UP_LINK2_TD_N
UP_LINK2_RA_P
52
53
UP_LINK2_TD_P
UP_LINK2_RA_N
54
55
GND
GND
56
57
UP_LINK2_TC_N
UP_LINK2_RB_P
58
59
UP_LINK2_TC_P
UP_LINK2_RB_N
60
61
GND
GND
62
63
UP_LINK2_TB_N
UP_LINK2_RC_P
64
65
UP_LINK2_TB_P
UP_LINK2_RC_N
66
67
GND
GND
68
69
UP_LINK2_TA_N
UP_LINK2_RD_P
70
71
UP_LINK2_TA_P
UP_LINK2_RD_N
72
73
GND
GND
74
75
+3.3V
+3.3V
76
77
+3.3V
+3.3V
78
79
GND
GND
80