NEC uPD75P308 User manual

NEC Corporation 1989
Document No. IC-2472B
(O. D. No. IC-7208C)
Date Published November 1993 P
Printed in Japan
DATA SHEET
MOS INTEGRATED CIRCUIT
µ PD75P308
The mark ★ shows major revised points.
4-BIT SINGLE-CHIP MICROCOMPUTER
DESCRIPTION
The µ PD75P308 is a model of the µ PD75308 equipped with a one-time PROM or EPROM instead of an
internal mask ROM.
Two types are available as the
µ PD75P308. The one-time PROM type is ideal for production of a small
quantity of many different types of application systems as data can only be written once to the one-time
PROM of this type. Programs can be written and rewritten to the built-in EPROM type making it ideal
for system evaluation.
Detailed functions are described in the followig user's manual. Be sure to read it for designing.
µ PD75308 User's Manual: IEM-5016
The function common to the one-time PROM and EPROM types of product is referred to as PROM throughout this document.
The information in this document is subject to change without notice.
FEATURES
• µ PD75308 compatible
•Memory capacity
• Program memory (PROM): 8064 x 8 bits
• Data memory (RAM): 512 x 4 bits
•Can be connected to a pull-up resistor through software: Ports 0-3, 6, 7
•Open-drain input/output: Ports 4 and 5
•Single power source: 5V ±5%
ORDERING INFORMATION
Part Number Package Internal ROM
µ PD75P308GF-3B9 80-pin plastic QFP (14 x 20 mm) One-time PROM
µ PD75P308K 80-pin ceramic WQFN (LCC w/window) EPROM
QUALITY GRADE
Part Number Package Quality Grade
µ PD75P308GF-001-3B9 80-pin plastic QFP (14 x 20 mm) Standard
µ PD75P308K 80-pin Ceramic WQFN (LCC w/window) Standard
★
Please refer to "Quality Grade on NEC Semiconductor Devices" (Document number IEI-1209) published by NEC
Corporation to know the specification of quality grade on the devices and its recommended applications.

µ PD75P308
2
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
S12
S13
S14
S15
S16
S17
S18
S19
S20
S21
S22
S23
S24/BP0
S25/BP1
S26/BP2
S27/BP3
S28/BP4
S29/BP5
S30/BP6
S31/BP7
COM0
COM1
COM2
COM3
80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65
S11 S10 S9 S8 S7 S6 S5 S4 S3 S2 S1 S0 RESET P73/KR7 P72/KR6 P71/KR5
P70/KR4
P63/KR3
P62/KR2
P61/KR1
P60/KR0
X2
X1
V
XT2
XT1
V
P33 (MD3)
P32 (MD2)
P31/SYNC (MD1)
P30/LCDCL (MD0)
P23/BUS
P22/PCL
P21
P20/PTO0
P13/TI0
P12/INT2
P11/INT1
P10/INT0
P03/SI/SBI
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
PP
DD
25 26 27 28 29 30 31 32 33 34 35
BIAS
P40 P41 P42 P43 P50 P51 P52 P53
V V V
LCO
LC1 LC2
V
PD75P308GF-3B9
PD75P308K
µ
µ
SS
P00/INT4
P01/SCK
P02/SO/SB0
36 37 38 39 40
PIN CONFIGURATION

µ
PD75P308
3
BLOCK DIAGRAM
P00-P03
P10-P13
P20-P23
P30-P33
/MD0-MD3
P40-P43
P50-P53
P60-P63
P70-P73
4
4
4
4
4
4
4
4
PORT0
PORT1
PORT2
PORT3
PORT4
PORT5
PORT6
PORT7
S0-S23
S24/BP0
-S31/BP7
COM0-COM3
V -V
LCO LC2
BIAS
LCDCL/P30
SYNC/P30
24
8
4
3
LCD
CONTROLLER
/DRIVER
fLCD
RESET
SP(8)
BANK
GENERAL REG.
DATA
MEMORY
(RAM)
512 x 4 BITS
CY
ALU
VSS
VDD VPP
DECODE
AND
CONTROL
PROGRAM
MEMORY
(PROM)
8064 x 8 BITS
PROGRAM
COUNTER(13)
STAND BY
CONTROL
SYSTEM CLOCK
GENERATOR
CLOCK
DIVIDER
CLOCK
OUTPUT
CONTROL SUB MAIN
f /2
XN
X2
X1XT2
XT1
PCL/P22
CPU
CLOCK
INTERRUPT
CONTROL
BIT SEQ.
BUFFER(16)
SERIAL
INTERFACE
WATCH
TIMER
TIMER/EVENT
COUNTER
#0
BASIC
INTERVAL
TIMER
TI0/P13
PTO0/P20
BUZ/P23
SI/SBI/P03
SO/SB0/P02
SCK/P01
INTBT
INTT0
INTW
INTCSI
INT0/P10
INT1/P11
INT2/P12
INT4/P00
KR0/P60-
KR3/P63,
KR4/P70-
KR7/P73
8
f
LCD

µ PD75P308
4
CONTENTS
1. PIN FUNCTIONS ................................................................................................................................. 5
1.1 PORT PINS ................................................................................................................................................. 5
1.2 NON PORT PINS ....................................................................................................................................... 6
1.3 PIN INPUT/OUTPUT CIRCUITS ................................................................................................................ 7
1.4 NOTES ON USING P00/INT4 AND RESET PINS ..................................................................................... 9
2. DIFFERENCES BETWEEN µ PD75P308 AND µ PD75308.................................................................. 10
3. WRITING AND VERIFYING PROM (PROGRAM MEMORY) ........................................................... 11
3.1 OPERATION MODES FOR WRITING/VERIFYING PROGRAM MEMORY ............................................ 11
3.2 PROGRAM MEMORY WRITE PROCEDURE .......................................................................................... 12
3.3 PROGRAM MEMORY READ PROCEDURE ............................................................................................ 13
3.4 ERASURE (
µ PD75P308K ONLY) ............................................................................................................. 14
4. ELECTRICAL SPECIFICATIONS........................................................................................................ 15
5. PACKAGE DRAWINGS ......................................................................................................................28
6. RECOMMENDED SOLDERING CONDITIONS................................................................................. 30
APPENDIX A. DEVELOPMENT TOOLS ................................................................................................. 31
APPENDIX B. RELATED DOCUMENTS ................................................................................................ 32
★
★

µ PD75P308
5
E-B
P00 Input INT4
P01 Input/Output SCK
P02 Input/Output SO/SB0
P03 Input/Output SI/SBI
P10 INT0
P11 INT1
P12 INT2
P13 TI0
P20 PTO0
P21 —
P22 PCL
P23 BUZ
P30*2
P31*2
P32*2MD2
P33*2MD3
P40-43*2Input/Output —
P50-P53*2Input/Output —
P60 KR0
P61 KR1
P62 KR2
P63 KR3
P70 KR4
P71 KR5
P72 KR6
P73 KR7
BP0 S24
BP1 S25
BP2 S26
BP3 S27
BP4 S28
BP5 S29
BP6 S30
BP7 S31
1. PIN FUNCTIONS
1.1 PORT PINS
4-bit input port (PORT0)
Pull-up resistors can be specified in 3-bit
units for the P01 to P03 pins by software. Input
Input/
Output
Circuit
TYPE*1
Pin Name Input/Output Function 8-Bit I/O When Reset
Also Served
As
F -A
F -B
B
M -C
Input
X
InputX
4-bit input/output port (PORT2)
Internal pull-up resistors can be
specified in 4-bit units by software. Input
X
E-B
Input
X
MD0LCDCL
SYNC MD1
M-A
M-A
●●
High impedance
High impedance
4-bit input/output port (PORT7)
Internal pull-up resistors can be
specified in 4-bit units by software.
●●
Input
Input
1-bit output port (BIT PORT)
Shared with a segment output pin. G-C
*3
X
F -A
F -A
Input/Output
Input/Output
Output
Output
Input/Output
Input/Output
With noise elimination function
4-bit input port (PORT1)
Internal pull-up resistors can be
specified in 4-bit units by software.
★
Programmable 4-bit input/output port
(PORT3)
This port can be specified for input/output
in bit units.
Internal pull-up resistors can be
specified in 4-bit units by software.
N-ch open-drain 4-bit input/output port
(PORT4)
Data input/output pin for writing and
verifying of program memory (PROM)
(lower 4 bits)
N-ch open-drain 4-bit input/output port
(PORT5)
Data input/output pin for writing and
verifying of program memory (PROM)
(upper 4 bits)
Programmable 4-bit input/output port
(PORT6)
This port can be specified for input/output
in bit units.
Internal pull-up resistors can be specified
in 4-bit units by software.
*1: Circles indicate schmitt trigger inputs.
2: Can directly drive LED.
3: For BP0-7, VLC1 indicated below are selected as the input source.
However, the output level is changed depending on BP0-7 and the VLC1 external circuits.
B -C

µ PD75P308
6
Timer/event counter external event pulse input
Timer/event counter output
Clock output
Fixed frequency output (for buzzer or for trimming
the system clock)
Serial clock input/output
Serial data output
Serial bus input/output
Serial data input
Serial bus input/output
Edge detection vector interrupt input (either rising
or falling edge detection is effective)
Edge detection vector interrupt input (detection
edge can be selected)
Edge detection testable input (rising edge detection)
Testable input/output(parallel falling edge detection)
Testable input/output(parallel falling edge detection)
Segment signal output
Segment signal output
Common signal output
LCD drive power
External dividing resistor disconnect output
Externally expanded driver clock output
Externally expanded driver sync clock output
To connect the crystal/ceramic oscillator to the main
system clock generator.
When inputting the external clock, input the external
clock to pin X1, and the reverse phase of the
external clock to pin X2.
To connect the crystal oscillator to the subsystem
clock generator.
When the external clock is used, in XT1 inputs the
external clock. In this case, pin XT2 must be left
open.
Pin XT1 can be used as a 1-bit input (test) pin.
System reset input (low level active)
To select mode when writing/verifying of program
memory (PROM)
Program voltage application when writing and
verifying of program memory (PROM)
Connect to VDD during the normal operation
Apply +12.5V when writing/verifying EPROM
Positive power supply
GND
—
Input
—
1.2 NON PORT PINS
TI0 Input P13
PTO0 Output P20
PCL Input/Output P22
SCK Input/Output P01
INT0 P10
INT1 P11
INT2 Input P12
KR0-KR3 Input/Output P60-P63
KR4-KR7 Input/Output P70-P73
S0-S23 Output —
S24-S31 Output BP0-7
COM0-
COM3
VLC0-VLC2 ——
BIAS — —
LCDCL*2 Input/Output P30
SYNC*2 Input/Output P31
RESET Input —
MD0-MD3 Input/Output P30-P33
VDD ——
VSS ——
Input/
Output
Circuit
TYPE*1
Pin Name Input/Output Function When Reset
—
Input
Input
Input
—
Input
Input
*3
*3
*3
—
High-impedance
Input
Input
E-B
E-B
BUZ Input/Output P23 Input E-B
F -A
SO/SB0 Input/Output P02 Input F -B
SI/SB1 Input/Output P03 Input M -C
INT4 Input P00 — B
Input B -C
B -C
F -A
F -A
G-A
G-C
G-B
Output —
—
—
E-B
E-B
X1, X2 Input — — —
——
XT1 Input —
XT2 — —
—
E-B
VPP —— —
——
——
*1: Circles indicate schmitt trigger inputs.
2: These pins are provided for future system expansion. At present, these pins are used only as pins P30 and P31.
3: For these display output, VLCX indicated below are selected as the input source.
S0 to S31: VLC1, COM0 to COM2: VLC2, COM3: VLC0
However, display output level varies depending on the particular display output and VLCX external circuit.
B
B -C
Also Served
As
★

µ PD75P308
7
1.3 PIN INPUT/OUTPUT CIRCUITS
The following shows a simplified input/output circuit diagram for each pin of the
µ PD75P308.
TYPE A (for TYPE E–B) TYPE D (for TYPE E–B, F-A)
TYPE B TYPE E–B
IN
VDD
P–ch
N–ch
Input buffer of CMOS standard
data
output
disable
OUT
P–ch
N–ch
Push–pull output that can be set in a output
high–impedance state (both P–ch and N–ch are off)
IN
Schmitt trigger input with hysteresis characteristics
data
output
disable
Type D
Type A
P.U.R.
enable
VDD
P.U.R.
P–ch
IN/OUT
P.U.R. : Pull–Up Resistor
P.U.R.
enable
VDD
P.U.R.
P–ch
TYPE B–C TYPE E–E
IN
P.U.R. : Pull–Up Resistor
P.U.R. : Pull–Up Resistor
Schmitt trigger input with hysteresis characteristics
data
output
disable
Type A
P.U.R.
enable
VDD
P.U.R.
P–ch
IN/OUT
Type B
Type D

µ PD75P308
8
P-ch
TYPE F–A
TYPE G–C
TYPE G–A
TYPE G–B
VDD
VLC0
VLC0
VLC1
VLC2
SEG
data/Bit Port data
P-ch
N-ch
OUT
N-ch
VLC1
VLC2
P-ch
P-ch
N-ch
OUT
N-ch
VLC0
VLC1
VLC2
P-ch
N-ch
SEG
data
COM
data
OUT
P-ch N-ch
N-ch P-ch
data
output
disable
Type D
Type B
P.U.R.
enable
VDD
P–ch
IN/OUT
P.U.R. : Pull–Up Resistor
TYPE F–B
P.U.R. : Pull–Up Resistor
data
output
disable
P.U.R.
enable
VDD
P.U.R.
P–ch
N-ch
P-ch
output
disable
(P)
output
disable
(N)
VDD
IN/OUT
IN/OUT
N-ch
data
output
disable
TYPE M–A
Middle voltage input buffer

µ PD75P308
9
TYPE M-C
data
output
disable
P.U.R.
enable
V
DD
P.U.R.
IN/OUT
P–ch
N-ch
P.U.R. : Pull–Up Resistor
1.4 NOTES ON USING P00/INT4 AND RESET PINS
In addition to the functions shown in sections 1.1 and 1.2, the P00/INT4 and RESET pins also have a function
to set a test mode (for IC testing) in which the internal operations of the
µ PD75P308 are tested.
When a voltage higher than VDD is applied to either of these pins, the test mode is set. This means that, even
during ordinary operation, the
µ PD75P308 may be set in the test mode if a noise exceeding VDD is applied.
For example, if the wiring length of the P00/INT4 or RESET pin is too long, noise superimposed on the wiring
line of the pin may cause the above problem.
Therefore, keep the wiring length of these pins as short as possible to suppress the noise; otherwise, take noise
preventive measures as shown below by using external components.
• Connect diode with low VFbetween VDD
and P00/INT4, RESET pin
• Connect capacitor between VDD
and P00/INT4, RESET pin
VDD VDD
VDDVDD
P00/INT4, RESET
Diode with
low VF
P00/INT4, RESET

µ PD75P308
10
Item µ PD75P308K µ PD75P308GF µ PD75308GF
• EPROM • PROM (one-time model) • Mask ROM
• 0000H-1F7FH • 0000H-1F7FH • 0000H-1F7FH
• 8064 x 8 bits • 8064 x 8 bits • 8064 x 8 bits
Pull-up Resistor Ports 4, 5
Dividing Resistor for LCD
Driving Power Supply
Pins 50-53 P30/MD0-P33/MD3 P30-P33
Pin 57 VPP NC
Current dissipations and operating temperature ranges differ between µ PD75P308 and
µ PD75308. For detail, refer to the specification documents of each mode.
Operating Voltage Range 5V±5% 2.7-6.0V
80-pin ceramic WQFN
(LCC w/window)
Noise immunity and noise radiation differ because circuit scale and mask layout are
different.
2. DIFFERENCES BETWEEN µ PD75P308 AND µ PD75308
The µ PD75P308 is a model of the µ PD75308 and is equipped with a PROM instead of a mask ROM.
Programs can be rewritten to the PROM of the
µ PD75P308. Table 2-1 shows the differences between the
µ PD75P308 and µ PD75308. You should fully consider these differences when you debug or produce your
application system on an experimental basis by using the PROM model, and then proceed to mass-produce
the system by using the mask ROM model.
For the details of the CPU and the internal hardware, refer to
µ PD75308 User's Manual (IEM-5016).
Table 2-1 Differences between µ PD75P308 and µ PD75308
Program Memory
★
★
Note: The noise immunity and noise radiation differ between the PROM and mask ROM models. To replace
the PROM model with the mask ROM model in the course of experimental production to mass
production, evaluate your system by using the CS mode (not ES model) of the mask ROM model.
Pin Connection
Not provided Mask option
Not provided Mask option
Electrical Specifications
Package
Others
80-pin plastic QFP (14 x 20 mm)
★