Nuvoton ARM Cortex NuMicro M451 Series Product manual

M451
May. 4, 2018 Page 1of 1006 Rev.2.08
M451 SERIES TECHNICAL REFERENCE MANUAL
ARM®Cortex®-M
32-bit Microcontroller
NuMicro®Family
M451 Series
Technical Reference Manual
The information described in this document is the exclusive intellectual property of
Nuvoton Technology Corporation and shall not be reproduced without permission from Nuvoton.
Nuvoton is providing this document only for reference purposes of NuMicro microcontroller based
system design. Nuvoton assumes no responsibility for errors or omissions.
All data and specifications are subject to change without notice.
For additional information or questions, please contact: Nuvoton Technology Corporation.
www.nuvoton.com

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TABLE OF CONTENTS
1GENERAL DESCRIPTION..........................................................................................19
2FEATURES .................................................................................................................21
NuMicro®M451 Features.................................................................. 212.1
3Abbreviations.............................................................................................................27
4PARTS INFORMATION LIST AND PIN CONFIGURATION.......................................29
NuMicro®M451 Selection Guide......................................................... 294.1
4.1.1 NuMicro®M451 Naming Rule.....................................................................29
4.1.2 NuMicro®M451 Base Series Selection Guide ................................................. 30
4.1.3 NuMicro®M451M Series (M051 Pin Compatible) Selection Guide.........................31
4.1.4 NuMicro®M452 USB Series Selection Guide..................................................32
4.1.5 NuMicro®M453 CAN Series (CAN+USB) Selection Guide..................................33
Pin Configuration............................................................................ 344.2
4.2.1 NuMicro®M451 Base Series LQFP48 Pin Diagram ..........................................34
4.2.2 NuMicro®M451 Base Series LQFP64 Pin Diagram ..........................................35
4.2.3 NuMicro®M451 Base Series LQFP100 Pin Diagram.........................................36
4.2.4 NuMicro®M451M Series (M051 Pin Compatible) LQFP48 Pin Diagram ..................37
4.2.5 NuMicro®M451M Series (M058S Pin Compatible) LQFP64 Pin Diagram ................38
4.2.6 NuMicro®M452 USB Series LQFP48 Pin Diagram ...........................................39
4.2.7 NuMicro®M452 USB Series LQFP64 Pin Diagram ...........................................41
4.2.8 NuMicro®M452 USB Series LQFP100 Pin Diagram..........................................43
4.2.9 NuMicro®M453 CAN Series (CAN+USB) LQFP48 Pin Diagram ........................... 44
4.2.10 NuMicro®M453 CAN Series (CAN+USB) LQFP64 Pin Diagram ........................46
4.2.11 NuMicro®M453 CAN Series (CAN+USB) LQFP100 Pin Diagram....................... 48
Pin Description .............................................................................. 504.3
4.3.1 M451 Base Series LQFP48 Pin Description.................................................... 50
4.3.2 M451 Base Series LQFP64 Pin Description.................................................... 58
4.3.3 M451 Base Series LQFP100 Pin Description..................................................68
4.3.4 M451M Series (M051 Pin Compatible) LQFP48 Pin Description ...........................81
4.3.5 M451M Series (M058S Pin Compatible) LQFP64 Pin Description ......................... 89
4.3.6 M452 USB Series LQFP48 Pin Description ....................................................98
4.3.7 M452 USB Series LQFP64 Pin Description .................................................. 105
4.3.8 M452 USB Series LQFP100 Pin Description................................................. 114
4.3.9 M453 CAN Series(CAN+USB) LQFP48 Pin Description................................... 127
4.3.10 M453 CAN Series(CAN+USB) LQFP64 Pin Description ................................ 135

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4.3.11 M453 CAN Series(CAN+USB) LQFP100 Pin Description............................... 144
4.3.12 GPIO Multi-function Pin Summary .......................................................... 157
5BLOCK DIAGRAM....................................................................................................167
NuMicro®M451 Block Diagram..........................................................1675.1
6FUNCTIONAL DESCRIPTION..................................................................................169
ARM®Cortex®-M4 Core...................................................................1696.1
System Manager...........................................................................1726.2
6.2.1 Overview ........................................................................................... 172
6.2.2 System Reset...................................................................................... 172
6.2.3 Power Modes and Wake-up Sources.......................................................... 179
6.2.4 System Power Distribution ...................................................................... 181
6.2.5 System Memory Map............................................................................. 183
6.2.6 SRAM Memory Organization ................................................................... 186
6.2.7 Register Map ...................................................................................... 190
6.2.8 Register Description.............................................................................. 192
6.2.9 System Timer (SysTick) ......................................................................... 231
6.2.10 Nested Vectored Interrupt Controller (NVIC) .............................................. 235
6.2.11 System Control Register...................................................................... 258
Clock Controller............................................................................2676.3
6.3.1 Overview ........................................................................................... 267
6.3.2 Clock Generator................................................................................... 269
6.3.3 System Clock and SysTick Clock .............................................................. 270
6.3.4 Peripherals Clock ................................................................................. 271
6.3.5Power-down Mode Clock........................................................................ 272
6.3.6 Clock Output....................................................................................... 272
6.3.7 Register Map ...................................................................................... 274
6.3.8 Register Description.............................................................................. 275
Flash Memeory Controller (FMC) .......................................................2996.4
6.4.1 Overview ........................................................................................... 299
6.4.2 Features............................................................................................ 299
6.4.3 Block Diagram..................................................................................... 300
6.4.4 Functional Description ........................................................................... 303
6.4.5 Register Map ...................................................................................... 325
6.4.6 Register Description.............................................................................. 326
External Bus Interface (EBI) .............................................................3436.5

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6.5.1 Overview ........................................................................................... 343
6.5.2 Features............................................................................................ 343
6.5.3 Block Diagram..................................................................................... 344
6.5.4 Basic Configuration............................................................................... 344
6.5.5 Functional Description ........................................................................... 344
6.5.6 Register Map ...................................................................................... 351
6.5.7 Register Description.............................................................................. 352
General Purpose I/O (GPIO).............................................................3566.6
6.6.1 Overview ........................................................................................... 356
6.6.2 Features............................................................................................ 356
6.6.3 Block Diagram..................................................................................... 357
6.6.4 Basic Configuration............................................................................... 357
6.6.5 Functional Description ........................................................................... 358
6.6.6 Register Map ...................................................................................... 360
6.6.7 Register Description.............................................................................. 363
PDMA Controller (PDMA) ................................................................3786.7
6.7.1 Overview ........................................................................................... 378
6.7.2 Features............................................................................................ 378
6.7.3 Block Diagram..................................................................................... 378
6.7.4 Basic Configuration............................................................................... 379
6.7.5 Functional Description ........................................................................... 379
6.7.6 Register Map ...................................................................................... 385
6.7.7 Register Description.............................................................................. 387
Timer Controller (TMR) ...................................................................4166.8
6.8.1 Overview ........................................................................................... 416
6.8.2 Features............................................................................................ 416
6.8.3 Block Diagram..................................................................................... 417
6.8.4 Basic Configuration............................................................................... 418
6.8.5 Functional Description ........................................................................... 418
6.8.6 Register Map ...................................................................................... 423
6.8.7 Register Description.............................................................................. 425
PWM Generator and Capture Timer (PWM) ..........................................4356.9
6.9.1 Overview ........................................................................................... 435
6.9.2 Features............................................................................................ 435
6.9.3 Block Diagram..................................................................................... 437
6.9.4 Basic Configuration............................................................................... 440

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6.9.5 Functional Description ........................................................................... 440
6.9.6 Register Map ...................................................................................... 470
6.9.7 Register Description.............................................................................. 476
Watchdog Timer (WDT)...................................................................5406.10
6.10.1 Overview ........................................................................................ 540
6.10.2 Features ......................................................................................... 540
6.10.3 Block Diagram.................................................................................. 540
6.10.4 Clock Control ................................................................................... 540
6.10.5 Basic Configuration............................................................................ 541
6.10.6 Functional Description......................................................................... 541
6.10.7 Register Map.................................................................................... 543
6.10.8 Register Description........................................................................... 544
Window Watchdog Timer (WWDT) .....................................................5476.11
6.11.1 Overview ........................................................................................ 547
6.11.2 Features ......................................................................................... 547
6.11.3 Block Diagram.................................................................................. 547
6.11.4 Clock Control ................................................................................... 548
6.11.5 Basic Configuration............................................................................ 548
6.11.6 Functional Description......................................................................... 548
6.11.7 Register Map.................................................................................... 551
6.11.8 Register Description........................................................................... 552
Real Time Clock (RTC) ...................................................................5576.12
6.12.1 Overview ........................................................................................ 557
6.12.2 Features ......................................................................................... 557
6.12.3 Block Diagram.................................................................................. 558
6.12.4 Basic Configuration............................................................................ 558
6.12.5 Functional Description......................................................................... 558
6.12.6 Register Map.................................................................................... 565
6.12.7 Register Description........................................................................... 567
UART Interface Controller (UART)......................................................5906.13
6.13.1 Overview ........................................................................................ 590
6.13.2 Features ......................................................................................... 590
6.13.3 Block Diagram.................................................................................. 591
6.13.4 Basic Configuration............................................................................ 594
6.13.5 Functional Description......................................................................... 594
6.13.6 Register Map.................................................................................... 617

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6.13.7 Register Description........................................................................... 619
Smart Card Host Interface (SC).........................................................6466.14
6.14.1 Overview ........................................................................................ 646
6.14.2 Features ......................................................................................... 646
6.14.3 Block Diagram.................................................................................. 646
6.14.4 Basic Configuration............................................................................ 648
6.14.5 Functional description......................................................................... 648
6.14.6 Register Map.................................................................................... 657
6.14.7 Register Description........................................................................... 658
I2C Serial Interface Controller (I2C) .....................................................6846.15
6.15.1 Overview ........................................................................................ 684
6.15.2 Features ......................................................................................... 684
6.15.3 Basic Configuration............................................................................ 684
6.15.4 Block Diagram.................................................................................. 685
6.15.5 Functional Description......................................................................... 685
6.15.6 Register Map.................................................................................... 719
6.15.7 Register Description........................................................................... 720
Serial Peripheral Interface (SPI).........................................................7406.16
6.16.1 Overview ........................................................................................ 740
6.16.2 Features ......................................................................................... 740
6.16.3 Block Diagram.................................................................................. 741
6.16.4 Basic Configuration............................................................................ 742
6.16.5 Functional Description......................................................................... 743
6.16.6 Timing Diagram ................................................................................ 761
6.16.7 Programming Examples ...................................................................... 763
6.16.8 Register Map.................................................................................... 765
6.16.9 Register Description........................................................................... 766
USB Device Controller (USBD)..........................................................7856.17
6.17.1 Overview ........................................................................................ 785
6.17.2 Features ......................................................................................... 785
6.17.3 Block Diagram.................................................................................. 786
6.17.4 Basic Configuration............................................................................ 786
6.17.5 Functional Description......................................................................... 786
6.17.6 Register Map.................................................................................... 790
6.17.7 Register Description........................................................................... 792
USB 1.1 Host Controller (USBH)........................................................8086.18

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6.18.1 Overview ........................................................................................ 808
6.18.2 Features ......................................................................................... 808
6.18.3 Block Diagram.................................................................................. 809
6.18.4 Basic Configuration............................................................................ 810
6.18.5 Functional Description......................................................................... 810
6.18.6 Register Map.................................................................................... 812
6.18.7 Register Description........................................................................... 814
USB On-The-Go (OTG)...................................................................8456.19
6.19.1 Overview ........................................................................................ 845
6.19.2 Features ......................................................................................... 845
6.19.3 Block Diagram.................................................................................. 846
6.19.4 Basic Configuration............................................................................ 846
6.19.5 Functional Description......................................................................... 846
6.19.6 Register Map.................................................................................... 849
6.19.7 Register Description........................................................................... 850
Controller Area Network (CAN)..........................................................8586.20
6.20.1 Overview ........................................................................................ 858
6.20.2 Features ......................................................................................... 858
6.20.3 Basic Configuration............................................................................ 858
6.20.4 Block Diagram.................................................................................. 858
6.20.5 Functional Description......................................................................... 859
6.20.6 Test Mode....................................................................................... 861
6.20.7 CAN Communications......................................................................... 863
6.20.8 Register Map.................................................................................... 881
6.20.9 Register Description........................................................................... 887
CRC Controller (CRC) ....................................................................922
6.21
6.21.1 Overview ........................................................................................ 922
6.21.2 Features ......................................................................................... 922
6.21.3 Block Diagram.................................................................................. 922
6.21.4 Basic Configuration............................................................................ 923
6.21.5 Functional Description......................................................................... 923
6.21.6 Register Map.................................................................................... 924
6.21.7 Register Description........................................................................... 925
Enhanced 12-bit Analog-to-Digital Converter (EADC)...............................9306.22
6.22.1 Overview ........................................................................................ 930
6.22.2 Features ......................................................................................... 930

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6.22.3 Block Diagram.................................................................................. 931
6.22.4 Basic Configuration............................................................................ 931
6.22.5 Operation Procedure .......................................................................... 932
6.22.6 Register Map.................................................................................... 943
6.22.7 Register Description........................................................................... 946
Digital to Analog Converter (DAC) ......................................................9736.23
6.23.1 Overview ........................................................................................ 973
6.23.2 Features ......................................................................................... 973
6.23.3 Block Diagram.................................................................................. 973
6.23.4 Basic Configuration............................................................................ 974
6.23.5 Functional Description......................................................................... 974
6.23.6 Register Map.................................................................................... 978
6.23.7 Register Description........................................................................... 979
Analog Comparator Controller (ACMP) ................................................9866.24
6.24.1 Overview ........................................................................................ 986
6.24.2 Features ......................................................................................... 986
6.24.3 Block Diagram.................................................................................. 987
6.24.4 Basic Configuration............................................................................ 988
6.24.5 Functional Description......................................................................... 988
6.24.6 Register Map.................................................................................... 990
6.24.7 Register Description........................................................................... 991
7APPLICATION CIRCUIT...........................................................................................998
8ELECTRICAL CHARACTERISTICS.........................................................................999
9PACKAGE DIMENSIONS.......................................................................................1000
LQFP 100L (14x14x1.4 mm footprint 2.0 mm)...................................... 10009.1
LQFP 64L (10x10x1.4 mm footprint 2.0 mm) ....................................... 10019.2
LQFP 64L (7x7x1.4 mm footprint 2.0 mm)........................................... 10029.3
LQFP 48L (7x7x1.4mm footprint 2.0mm) ............................................ 10039.4
10 REVISION HISTORY...............................................................................................1004

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List of Figures
Figure 4.1-1 NuMicro®M451 Selection Code................................................................................ 29
Figure 4.2-1 NuMicro®M451 Base Series LQFP 48-pin Diagram................................................. 34
Figure 4.2-2 NuMicro®M451 Base Series LQFP 64-pin Diagram................................................. 35
Figure 4.2-3 NuMicro®M451 Base Series LQFP 100-pin Diagram............................................... 36
Figure 4.2-4 NuMicro®M451M Base Series (Pin Compatible with M051) LQFP 48-pin Diagram 37
Figure 4.2-5 NuMicro®M451M Base Series (Pin Compatible with M058S) LQFP 64-pin Diagram
................................................................................................................................................ 38
Figure 4.2-6 NuMicro®M451 USB Series LQFP 48-pin Diagram (M452LG/M452LE Device Only)
................................................................................................................................................ 39
Figure 4.2-7 NuMicro®M451 USB Series LQFP 48-pin Diagram (M452LD/M452LC Device Only)
................................................................................................................................................ 40
Figure 4.2-8 NuMicro®M451 USB Series LQFP 64-pin Diagram (M452RG/M452RE Device Only)
................................................................................................................................................ 41
Figure 4.2-9 NuMicro®M451 USB Series LQFP 64-pin Diagram (M452RD Device Only) ........... 42
Figure 4.2-10 NuMicro®M451 USB Series LQFP 100-pin Diagram (M452VG/M452VE Device
Only)........................................................................................................................................ 43
Figure 4.2-11 NuMicro®M451 CAN Series (CAN+USB) LQFP 48-pin Diagram (M453LG/M453LE
Device Only)............................................................................................................................ 44
Figure 4.2-12 NuMicro®M451 CAN Series (CAN+USB) LQFP 48-pin Diagram (M453LD/M453LC
Device Only)............................................................................................................................ 45
Figure 4.2-13 NuMicro®M451 CAN Series (CAN+USB) LQFP 64-pin Diagram (M453RG/M453RE
Device Only)............................................................................................................................ 46
Figure 4.2-14 NuMicro®M451 CAN Series (CAN+USB) LQFP 64-pin Diagram (M453RD Device
Only)........................................................................................................................................ 47
Figure 4.2-15 NuMicro®M451 CAN Series (CAN+USB) LQFP 100-pin Diagram
(M453VG/M453VE Device Only)............................................................................................ 48
Figure 4.2-16 NuMicro®M451 CAN Series (CAN+USB) LQFP 100-pin Diagram (M453VD Device
Only)........................................................................................................................................ 49
Figure 5.1-1 NuMicro®M45xG/M45xE Block Diagram ................................................................ 167
Figure 5.1-2 NuMicro®M45xD/M45xC Block Diagram ................................................................ 168
Figure 6.1-1 Cortex®-M4 Block Diagram...................................................................................... 169
Figure 6.2-1 System Reset Sources............................................................................................ 173
Figure 6.2-2 nRESET Reset Waveform....................................................................................... 176
Figure 6.2-3 Power-on Reset (POR) Waveform .......................................................................... 176
Figure 6.2-4 Low Voltage Reset (LVR) Waveform....................................................................... 177
Figure 6.2-5 Brown-out Detector (BOD) Waveform..................................................................... 178
Figure 6.2-6 Power Mode State Machine .................................................................................... 179
Figure 6.2-7 NuMicro®M451 Power Distribution Diagram........................................................... 182
Figure 6.2-8 SRAM Block Diagram.............................................................................................. 186
Figure 6.2-9 SRAM Memory Organization (M45xG/M45xE) ....................................................... 187

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Figure 6.2-10 SRAM Memory Organization (M45xD/M45xC) ..................................................... 188
Figure 6.3-1 Clock Generator Global View Diagram.................................................................... 268
Figure 6.3-2 Clock Generator Block Diagram.............................................................................. 269
Figure 6.3-3 System Clock Block Diagram .................................................................................. 270
Figure 6.3-4 HXT Stop Protect Procedure................................................................................... 271
Figure 6.3-5 SysTick Clock Control Block Diagram..................................................................... 271
Figure 6.3-6 Clock Source of Clock Output ................................................................................. 272
Figure 6.3-7 Clock Output Block Diagram ................................................................................... 273
Figure 6.4-1 Flash Memory Controller Block Diagram................................................................. 300
Figure 6.4-2 Data Flash Shared with APROM............................................................................. 303
Figure 6.4-3 Flash Memory Map.................................................................................................. 308
Figure 6.4-4 System Memory Map with IAP Mode ...................................................................... 309
Figure 6.4-5 LDROM with IAP Mode............................................................................................ 310
Figure 6.4-6 APROM with IAP Mode ........................................................................................... 310
Figure 6.4-7 System Memory Map without IAP mode ................................................................. 311
Figure 6.4-8 Boot Source Selection............................................................................................. 312
Figure 6.4-9 ISP Procedure Example .......................................................................................... 315
Figure 6.4-10 ISP 32-bit Programming Procedure....................................................................... 317
Figure 6.4-11 ISP 64-bit Programming Procedure....................................................................... 317
Figure 6.4-12 Multi-word Programming Time .............................................................................. 318
Figure 6.4-13 Firmware in SRAM for Multi-word Programming................................................... 319
Figure 6.4-14 Multi-word Programming Flow............................................................................... 320
Figure 6.4-15 Fast Flash Programming Verification Flow............................................................ 321
Figure 6.4-16 Verification Flow .................................................................................................... 322
Figure 6.4-17 Checksum for KB Calculation................................................................................ 322
Figure 6.4-18 Checksum Calculation Flow .................................................................................. 324
Figure 6.5-1 EBI Block Diagram................................................................................................... 344
Figure 6.5-2 Connection of 16-bit EBI Data Width with 16-bit Device......................................... 345
Figure 6.5-3 Connection of 8-bit EBI Data Width with 8-bit Device............................................. 346
Figure 6.5-4 Timing Control Waveform for 16-bit Data Width...................................................... 348
Figure 6.5-5 Timing Control Waveform for 8-bit Data Width........................................................ 349
Figure 6.5-6 Timing Control Waveform for Insert Idle Cycle........................................................ 350
Figure 6.6-1 GPIO Controller Block Diagram............................................................................... 357
Figure 6.6-2 Push-Pull Output...................................................................................................... 358
Figure 6.6-3 Open-Drain Output .................................................................................................. 358
Figure 6.6-4 Quasi-Bidirectional I/O Mode................................................................................... 359
Figure 6.7-1 PDMA Controller Block Diagram ............................................................................. 378