Nuvoton NuMicro ML51 Series Product manual

ML51/ML54/ML56
Sep. 01, 2020 Page 1of 719 Rev 2.00
ML51/ML54/ML56 SERIES TECHNICAL REFERENCE MANUAL
ML51/ML54/ML56 Series
Technical Reference
Manual
1T 8051
8-bit Microcontroller
NuMicro®Family
ML51/ML54/ML56 Series
Technical Reference Manual
The information described in this document is the exclusive intellectual property of
Nuvoton Technology Corporation and shall not be reproduced without permission from Nuvoton.
Nuvoton is providing this document only for reference purposes of NuMicro® microcontroller based
system design. Nuvoton assumes no responsibility for errors or omissions.
All data and specifications are subject to change without notice.
For additional information or questions, please contact: Nuvoton Technology Corporation.
www.nuvoton.com

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ML51/ML54/ML56 SERIES TECHNICAL REFERENCE MANUAL
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Technical Reference
Manual
TABLE OF CONTENTS
1GENERAL DESCRIPTION ............................................................................11
2FEATURES....................................................................................................12
3PART INFORMATION ...................................................................................17
3.1 ML51/ML54/ML56 Series Package Type................................................................. 17
3.2 ML51/ML54/ML56 Series Selection Guide.............................................................. 18
3.2.1 ML51 Series ....................................................................................................................18
3.2.2 ML54 Series ....................................................................................................................21
3.2.3 ML56 Series ....................................................................................................................22
3.3 ML51/ML54/ML56 Series Selection Code............................................................... 23
4PIN CONFIGURATION ..................................................................................24
4.1 Pin Configuration......................................................................................................... 24
4.1.1 ML51/ML54/ML56 Series Pin Diagram .......................................................................24
4.1.2 ML51/ML54/ML56 Series Multi Function Pin Diagram .............................................32
4.2 Pin Description............................................................................................................. 72
4.2.1 ML51/ML54/ML56 Series Pin Mapping.......................................................................72
4.2.2 ML51/ML54/ML56 Series Pin Functional Description...............................................74
5BLOCK DIAGRAM.........................................................................................79
5.1 ML51/ML54/ML56 Series Full Function Block ........................................................ 79
6FUNCTIONAL DESCRIPTION.......................................................................80
6.1 Memory Organization.................................................................................................. 80
6.1.1 Program Memory............................................................................................................80
6.1.2 Security Protection Memory (SPROM) .......................................................................82
6.1.3 96-Bit Unique Code (UID) .............................................................................................83
6.1.4 Data Flash .......................................................................................................................83
6.1.5 Data Memory...................................................................................................................84
6.1.6 Config Bytes....................................................................................................................86
6.1.7 Special Function Register (SFR)..................................................................................91
6.2 System Manager ....................................................................................................... 292
6.2.1 Clock System ................................................................................................................292
6.2.2 Power Management.....................................................................................................301
6.2.3 Power Monitering and Reset ......................................................................................304
6.2.4 Interrupt System ...........................................................................................................321
6.3 Flash Memory Control .............................................................................................. 341
6.3.1 In-application-programming (IAP)..............................................................................341
6.3.2 In-Circuit-Programming (ICP) .....................................................................................357
6.3.3 On-Chip-Debugger (ICE).............................................................................................358
6.4 GPIO Port Structure and Operation........................................................................ 361

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6.4.1 GPIO Mode ...................................................................................................................361
6.4.2 External Interrupt Pins .................................................................................................380
6.4.3 Pin Interrupt (PIT).........................................................................................................382
6.5 Timer............................................................................................................................ 389
6.5.1 Overview........................................................................................................................389
6.5.2 Timer/Counter 0 and 1.................................................................................................389
6.5.3 Timer 2 and Input Capture ..........................................................................................401
6.5.4 Timer 3 ...........................................................................................................................410
6.6 Watchdog Timer (WDT)............................................................................................ 414
6.6.1 Time-Out Reset Timer..................................................................................................414
6.6.2 General Purpose Timer ...............................................................................................415
6.6.3 Register Description.....................................................................................................416
6.6.4 Typical Structure of WDT Service Routine ...............................................................419
6.7 Self Wake-up Timer (WKT) ...................................................................................... 421
6.7.1 Overview........................................................................................................................421
6.7.2 Block Diagram...............................................................................................................421
6.7.3 Control Register............................................................................................................422
6.8 Pulse Width Modulated (PWM)............................................................................... 428
6.8.1 Overview........................................................................................................................428
6.8.2 Features.........................................................................................................................428
6.8.3 Block Diagram...............................................................................................................429
6.8.4 Functional Description .................................................................................................431
6.8.5 PWM Interrupt...............................................................................................................456
6.8.6 Register Description.....................................................................................................459
6.9 Serial Port (UART0 & UART1) ................................................................................ 475
6.9.1 Overview........................................................................................................................475
6.9.2 Features.........................................................................................................................475
6.9.3 Functional Description .................................................................................................476
6.9.4 Register Description.....................................................................................................486
6.10 Smart Card Interface (SC) ................................................................................. 503
6.10.1Overview........................................................................................................................503
6.10.2Features.........................................................................................................................503
6.10.3Block Diagram...............................................................................................................503
6.10.4Operating Modes ..........................................................................................................504
6.10.5Smart Card Data Transfer...........................................................................................506
6.10.6Register Description.....................................................................................................509
6.11 Serial Peripheral Interface (SPI) ....................................................................... 522
6.11.1 Overview........................................................................................................................522
6.11.2 Features.........................................................................................................................522
6.11.3 Block Diagram...............................................................................................................523
6.11.4 Functional Description .................................................................................................524

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6.11.5 Register Description.....................................................................................................530
6.12 Inter-Integrated Circuit (I2C)............................................................................... 536
6.12.1Overview........................................................................................................................536
6.12.2Features.........................................................................................................................536
6.12.3Functional Description .................................................................................................536
6.12.4I2C Time-Out..................................................................................................................547
6.12.5I2C Interrupt ...................................................................................................................550
6.12.6Register Description.....................................................................................................550
6.12.7Typical Structure of I2C Interrupt Service Routine ...................................................557
6.13 12-bit Analog-to-digital Converter (ADC) ......................................................... 561
6.13.1Overview........................................................................................................................561
6.13.2Block Diagram...............................................................................................................562
6.13.3Functional Description .................................................................................................563
6.13.4Register Description.....................................................................................................566
6.14 Voltage Reference (VREF)................................................................................... 583
6.15 Analog Comparator Controller (ACMP)............................................................ 585
6.15.1Overview........................................................................................................................585
6.15.2Feature...........................................................................................................................585
6.15.3Block Diagram...............................................................................................................586
6.15.4Functional Description .................................................................................................587
6.15.5Register Description.....................................................................................................589
6.16 PDMA Controller (PDMA)................................................................................... 595
6.16.1Overview........................................................................................................................595
6.16.2Feature...........................................................................................................................595
6.16.3Block Diagram...............................................................................................................595
6.16.4Functional Description .................................................................................................596
6.16.5Register Description.....................................................................................................599
6.17 LCD Driver............................................................................................................ 610
6.17.1Overview........................................................................................................................610
6.17.2Features.........................................................................................................................610
6.17.3Block Diagram...............................................................................................................611
6.17.4Functional Description .................................................................................................612
6.17.5Register Description.....................................................................................................618
6.17.6LCD Program Flow.......................................................................................................633
6.18 Real Time Clock (RTC)....................................................................................... 634
6.18.1Overview........................................................................................................................634
6.18.2Features.........................................................................................................................634
6.18.3Block Diagram...............................................................................................................635
6.18.4Functional Description .................................................................................................636
6.18.5Register Description.....................................................................................................640

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6.19 Touch Key (TK) .................................................................................................... 667
6.19.1Overview........................................................................................................................667
6.19.2Features.........................................................................................................................667
6.19.3Basic Configuration ......................................................................................................667
6.19.4Block Diagram...............................................................................................................668
6.19.5Functional Description .................................................................................................669
6.19.6Register Description.....................................................................................................674
6.20 Instruction Set ...................................................................................................... 696
6.20.1Instruction Set And Addressing Modes .....................................................................696
6.20.2Read-Modify-Write Instructions..................................................................................698
6.20.3Instruction Set ...............................................................................................................698
7APPLICATION CIRCUIT..............................................................................702
7.1 Power Supply Scheme ............................................................................................. 702
7.2 Peripheral Application Scheme ............................................................................... 703
8ELECTRICAL CHARACTERISTICS............................................................704
9PACKAGE DIMENSIONS............................................................................705
9.1 LQFP 64L-pin (7.0 x 7.0 x 1.4 mm) ........................................................................ 705
9.2 LQFP 48-pin (7.0 x 7.0 x 1.4 mm)........................................................................... 706
9.3 LQFP 44-pin (10 x 10 x 1.4mm ............................................................................... 707
9.4 QFN 33-pin (4.0 x 4.0 x 0.8 mm) ............................................................................ 708
9.5 LQFP 32-pin (7.0 x 7.0 x 1.4 mm)........................................................................... 709
9.6 TSSOP 28-pin (4.4 x 9.7 x 1.0 mm) ....................................................................... 710
9.7 SOP 28-pin (300mil).................................................................................................. 711
9.8 TSSOP 20-pin (4.4 x 6.5 x 0.9 mm)...................................................................... 712
9.9 SOP 20-pin (300 mil) ................................................................................................ 713
9.10 QFN 20-pin ( 3.0 x 3.0 x 0.8 mm ) .................................................................... 714
9.11 TSSOP 14-pin (4.4 x 5.0 x 0.9 mm).................................................................. 715
9.12 MSOP 10-pin (3.0 x 3.0 x 0.85 mm)................................................................. 716
10ABBREVIATIONS........................................................................................717
10.1 Abbreviations........................................................................................................ 717
11REVISION HISTORY ...................................................................................718

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List of Figures
Figure 4.1-1 ML51SD1AE Pin Assignment....................................................................................24
Figure 4.1-2 ML54SD1AE / ML56SD1AE Pin Assignment............................................................25
Figure 4.1-3 ML51LD1AE Pin Assignment.................................................................................... 26
Figure 4.1-4 ML54LD1AE / ML56LD1AE Pin Assignment.............................................................26
Figure 4.1-5 ML54MD1AE / ML56MD1AE Pin Assignment...........................................................27
Figure 4.1-6 ML51TD1AE / ML51TC0AE / ML51TB9AE Pin Assignment.....................................27
Figure 4.1-7 ML51PC0AE / ML51PB9AE Pin Assignment............................................................ 28
Figure 4.1-8 ML51EC0AE / ML51EB9AE Pin Assignment............................................................ 28
Figure 4.1-9 ML51UC0AE / ML51UB9AE Pin Assignment............................................................ 29
Figure 4.1-10 ML51FB9AE Pin Assignment..................................................................................29
Figure 4.1-11 ML51OB9AE Pin Assignment..................................................................................30
Figure 4.1-12 ML51XB9AE Pin Assignment..................................................................................30
Figure 4.1-13 ML51DB9AE Pin Assignment.................................................................................. 31
Figure 4.1-14 ML51BB9AE Pin Assignment..................................................................................31
Figure 4.1-15 ML51SD1AE Multi-Function Pin assignment .......................................................... 32
Figure 4.1-16 ML54SD1AE Multi-Function Pin assignment .......................................................... 35
Figure 4.1-17 ML56SD1AE Multi-Function Pin assignment .......................................................... 38
Figure 4.1-18 ML51LD1AE Multi-Function Pin assignment........................................................... 41
Figure 4.1-19 ML54LD1AE Multi-Function Pin assignment........................................................... 44
Figure 4.1-20 ML56LD1AE Multi-Function Pin assignment........................................................... 47
Figure 4.1-21 ML54MD1AE Multi-Function Pin assignment.......................................................... 50
Figure 4.1-22 ML56MD1AE Multi-Function Pin assignment..........................................................53
Figure 4.1-23 ML51TD1AE Multi-Function Pin assignment...........................................................56
Figure 4.1-24 ML51TC0AE / ML51TB9AE Multi-Function Pin Assignment.................................. 58
Figure 4.1-25 ML51PC0AE / ML51PB9AE Multi-Function Pin Assignment.................................. 60
Figure 4.1-26 ML51EC0AE / ML51EB9AE Multi-Function Pin Assignment .................................62
Figure 4.1-27 ML51UC0AE / ML51UB9AE Multi Function Pin Assignment..................................64
Figure 4.1-28 ML51FB9AE Multi Function Pin Assignment...........................................................66
Figure 4.1-29 ML51OB9AE Multi Function Pin Assignment..........................................................67
Figure 4.1-30 ML51XB9AE Multi Function Pin Assignment .......................................................... 68
Figure 4.1-31 ML51DB9AE Multi Function Pin Assignment..........................................................70
Figure 4.1-32 ML51BB9AE Pin Assignment..................................................................................71
Figure 5.1-1 Functional Block Diagram.........................................................................................79
Figure 6.1-1 ML51/ML54/ML56 Series Program Memory Map .................................................... 81
Figure 6.1-2 SPROM Memory Mapping And SPROM Security Mode...........................................82
Figure 6.1-3 Data Memory Map....................................................................................................84

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Figure 6.1-4 Internal 256 Bytes RAM Addressing......................................................................... 85
Figure 6.1-5 CONFIG0 Any Reset Reloading...............................................................................87
Figure 6.1-6 CONFIG2 Power-On Reset Reloading...................................................................... 89
Figure 6.2-1 Clock System Block Diagram ..................................................................................292
Figure 6.2-2 Brown-out Detection Block Diagram.......................................................................306
Figure 6.2-3 Boot Selecting Diagram.......................................................................................... 318
Figure 6.3-1 IAP Modes and Command Codes........................................................................... 350
Figure 6.3-2. CRC-8 Block Diagram ............................................................................................ 351
Figure 6.4-1 Quasi-Bidirectional Mode Structure........................................................................362
Figure 6.4-2 Push-Pull Mode Structure.......................................................................................362
Figure 6.4-3 Input-Only Mode Structure ..................................................................................... 363
Figure 6.4-4 Open-Drain Mode Structure ...................................................................................363
Figure 6.4-5 Pin Interface Block Diagram...................................................................................382
Figure 6.5-1 Timer/Counters 0 and 1 in Mode 0.........................................................................390
Figure 6.5-2 Timer/Counters 0 and 1 in Mode 1.........................................................................390
Figure 6.5-3 Timer/Counters 0 and 1 in Mode 2.........................................................................391
Figure 6.5-4 Timer/Counter 0 in Mode 3.....................................................................................391
Figure 6.5-5 Timer 2 Block Diagram............................................................................................ 401
Figure 6.5-6 Timer 2 Auto-Reload Mode and Input Capture Module Functional Block Diagram402
Figure 6.5-7 Timer 2 Compare Mode and Input Capture Module Functional Block Diagram ....403
Figure 6.5-8 Timer 3 Block Diagram...........................................................................................410
Figure 6.6-1 WDT as A Time-Out Reset Timer........................................................................... 415
Figure 6.6-2 Watchdog Timer Block Diagram.............................................................................415
Figure 6.7-1 Self Wake-Up Timer Block Diagram....................................................................... 421
Figure 6.8-1 PWM0 Block Diagram ............................................................................................429
Figure 6.8-2 PWM1/ PWM2 / PWM3 Block Diagram.................................................................. 430
Figure 6.8-3 PWM0 and Fault Brake Output Control Block Diagram .........................................432
Figure 6.8-4 PWM1/2/3 Control Block Diagram........................................................................... 433
Figure 6.8-5 PWM Edge-aligned Type Waveform......................................................................444
Figure 6.8-6 PWM Center-aligned Type Waveform.................................................................... 445
Figure 6.8-7 PWM Complementary Mode with Dead-time Insertion ..........................................447
Figure 6.8-8 Fault Brake Function Block Diagram......................................................................453
Figure 6.8-9 PWM Interrupt Type ............................................................................................... 458
Figure 6.9-1 Serial Port Mode 0 Timing Diagram ....................................................................... 476
Figure 6.9-2 Serial Port Mode 1 Timing Diagram ....................................................................... 477
Figure 6.9-3 Serial Port Mode 2 and 3 Timing Diagram .............................................................478
Figure 6.10-1 SC Controller Block Diagram.................................................................................503

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Figure 6.10-2 SC Interface Connection ....................................................................................... 504
Figure 6.10-3 SC Data Character ............................................................................................... 506
Figure 6.10-4 Initial Character TS.............................................................................................. 507
Figure 6.10-5 SC Error Signal..................................................................................................... 507
Figure 6.10-6 Transmit Direction Block Guard Time Operation..................................................508
Figure 6.10-7 Receive Direction Block Guard Time Operation....................................................508
Figure 6.10-8 Extra Guard Time Operation .................................................................................508
Figure 6.11-1 SPI Block Diagram................................................................................................. 523
Figure 6.11-2 SPI Multi-Master, Multi-Slave Interconnection .....................................................524
Figure 6.11-3 SPI Single-Master / Single-Slave Interconnection................................................ 525
Figure 6.11-4 SPI Clock Formats................................................................................................ 526
Figure 6.11-5 SPI Clock and Data Format with CPHA = 0 ......................................................... 527
Figure 6.11-6 SPI Clock and Data Format with CPHA = 1 ......................................................... 527
Figure 6.11-7 SPI Overrun Waveform ........................................................................................ 529
Figure 6.11-8 SPI Interrupt Request...........................................................................................529
Figure 6.12-1 I2C Bus Interconnection........................................................................................ 536
Figure 6.12-2 I2C Bus Protocol ...................................................................................................537
Figure 6.12-3 START, Repeated START, and STOP Conditions .............................................. 537
Figure 6.12-4 Master Transmits Data to Slave by 7-bit ..............................................................538
Figure 6.12-5 Master Reads Data from Slave by 7-bit ............................................................... 538
Figure 6.12-6 Data Format of One I2C Transfer .........................................................................539
Figure 6.12-7 Acknowledge Bit................................................................................................... 539
Figure 6.12-8 Arbitration Procedure of Two Masters..................................................................540
Figure 6.12-9 Control I2C Bus according to the Current I2C Status............................................541
Figure 6.12-10 Flow and Status of Master Transmitter Mode .................................................... 542
Figure 6.12-11 Flow and Status of Master Receiver Mode ........................................................ 543
Figure 6.12-12 Flow and Status of Slave Receiver Mode ..........................................................545
Figure 6.12-13 Flow and Status of General Call Mode...............................................................546
Figure 6.12-14 Status Display In I2STAT Register...................................................................... 547
Figure 6.12-15 I2C Time-Out Counter.........................................................................................548
Figure 6.13-1 12-bit ADC Block Diagram.....................................................................................562
Figure 6.13-2 External Triggering ADC Circuit ...........................................................................564
Figure 6.13-3 ADC Result Comparator....................................................................................... 564
Figure 6.13-4 ADC Continues mode with DMA .......................................................................... 565
Figure 6.14-1 VREF Block Diagram ..............................................................................................583
Figure 6.14-2 Pre-load Timing ....................................................................................................583
Figure 6.15-1 Analog Comparator Block Diagram......................................................................586

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Figure 6.15-2 Comparator Hysteresis Function..........................................................................587
Figure 6.15-3 Comparator Reference Voltage Block Diagram ...................................................588
Figure 6.15-4 Analog Comparator Interrupt Sources..................................................................588
Figure 6.16-1 PDMA Interface Diagram......................................................................................595
Figure 6.16-2 PDMA Controller Block Diagram.......................................................................... 596
Figure 6.16-3 CRC-8 Block Diagram ........................................................................................... 598
Figure 6.17-1 LCD Block Diagram............................................................................................... 611
Figure 6.17-2. LCD Register Map Example................................................................................. 613
Figure 6.17-3 One Frame of LCD Energized............................................................................... 613
Figure 6.17-4. Example of Type A and Type B 8 COM and SEG Driving Signals of 1/3 Bias ....614
Figure 6.17-5. Example of Type A and Type B 8 COM and SEG Driving Signals of 1/4 Bias ....615
Figure 6.18-1 RTC Block Diagram............................................................................................... 635
Figure 6.19-1Touch Key block diagram....................................................................................... 668
Figure 6.19-2 Touch Key Sensing Method ..................................................................................670
Figure 6.19-3 Finger Touch Detection Method............................................................................ 671
Figure 6.19-4 Touch Key Controller Interrupt Modes For Threshold Control. .............................673
Figure 9.1-1 LQFP 64L Package Dimension............................................................................... 705
Figure 9.2-1 LQFP-48 Package Dimension................................................................................706
Figure 9.3-1 LFP44 Package Dimension.................................................................................... 707
Figure 9.4-1 QFN-33 Package Dimension.................................................................................. 708
Figure 9.5-1 LQFP-32 Package Dimension................................................................................. 709
Figure 9.6-1 TSSOP-28 Package Dimension.............................................................................. 710
Figure 9.7-1 SOP-28 Package Dimension.................................................................................. 711
Figure 9.8-1 TSSOP-20 Package Dimension .............................................................................. 712
Figure 9.9-1 SOP-20 Package Dimension...................................................................................713
Figure 9.10-1 QFN-20 Package Dimension.................................................................................714
Figure 9.11-1 TSSOP-14 Package Dimension............................................................................715
Figure 9.12-1 MSOP-10 Package Dimension..............................................................................716

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List of Tables
Table 6.1-1Special Function Register (SFR) Memory Map...........................................................99
Table 6.1-2 SFR Definitions And Reset Values.......................................................................... 111
Table 6.2-1 Power Mode Table...................................................................................................301
Table 6.2-2 Entry setting of Power-down mode..........................................................................301
Table 6.2-3 BOF Reset Value...................................................................................................... 306
Table 6.2-4 Interrupt Vectors .......................................................................................................321
Table 6.2-5 Interrupt Priority Level Setting ..................................................................................328
Table 6.2-6 Characteristics of Each Interrupt Source................................................................. 330
Table 6.4-1 Configuration for Different I/O Modes....................................................................... 361
Table 6.4-2 External Interrupt Pin Multi-Function Pin List .......................................................... 380
Table 6.6-1 Watchdog Timer-out Interval Under Different Pre-scalars........................................ 414
Table 6.9-1 Serial Port 0 Mode / baud rate Description...............................................................479
Table 6.9-2 Serial Port 1 Mode / baud rate Description............................................................... 480
Table 6.10-1 SC Activation and Cold Reset Sequence.............................................................505
Table 6.10-2 SC Warm Reset Sequence.....................................................................................505
Table 6.10-3 SC Deactivation Sequence.....................................................................................506
Table 6.11-1 Slave Select Pin Configurations .............................................................................528
Table 6.17-1 VLCD Source Selection Table................................................................................616
Table 6.17-2 LCD Driving Mode Regiter Setting.......................................................................... 616
Table 6.18-1 RTC Read/Write Enable .........................................................................................637
Table 6.18-212/24 hour Time Scale Selection.............................................................................638
Table 6.18-3 Registers Value after Powered On......................................................................... 639
Table 6.19-1 All Touch Key Pins Select Source List.................................................................... 667
Table 6.20-1 Instruction Set And Addressing Modes .................................................................. 696
Table 6.20-2 Instructions Affect Flag Settings ............................................................................697
Table 6.20-3 Instruction Set........................................................................................................ 701
Table 10.1-1 List of Abbreviations................................................................................................ 717