
Section number Title Page
1.4.16 Serial peripheral interface (SPI).....................................................................................................................188
1.4.17 Watchdog timer (WDOG)..............................................................................................................................188
Chapter 2
Memory Map
2.1 Overview.......................................................................................................................................................................189
2.2 System memory map.....................................................................................................................................................189
2.3 CCSR address map....................................................................................................................................................... 191
Chapter 3
Signal Descriptions
3.1 Signals Introduction......................................................................................................................................................195
3.2 Signals Overview..........................................................................................................................................................195
3.3 Configuration signals sampled at reset......................................................................................................................... 209
3.4 Signal multiplexing details........................................................................................................................................... 209
3.4.1 Ethernet controller 1, SAI, USB 2.0, and GPIO2 signal multiplexing.......................................................... 210
3.4.2 Ethernet management interface 1 and GPIO2 signal multiplexing................................................................212
3.4.3 eSDHC1 and GPIO1 signal multiplexing...................................................................................................... 212
3.4.4 eSDHC2, GPIO1, FTM, SAI, and SPI signal multiplexing...........................................................................214
3.4.5 GPIO1 and FTM signal multiplexing............................................................................................................ 215
3.4.6 I2C1, GPIO1, and FTM signal multiplexing................................................................................................. 215
3.4.7 QuadSPI, I2C, and GPIO1 signal multiplexing............................................................................................. 216
3.4.8 UART1 and GPIO signal multiplexing..........................................................................................................217
3.4.9 UART2, GPIO, and SAI signal multiplexing................................................................................................ 217
3.4.10 USB, ASLEEP, and GPIO1 signal multiplexing........................................................................................... 218
3.4.11 TA_TMP_DETECT_B and GPIO2 signal multiplexing...............................................................................218
3.5 Output Signal States During Reset............................................................................................................................... 219
Chapter 4
Reset, Clocking, and Initialization
4.1 Reset, clocking, and initialization overview.................................................................................................................221
4.2 External Signal Descriptions.........................................................................................................................................221
4.2.1 System control signals................................................................................................................................... 222
QorIQ LS1012A Reference Manual, Rev. 1, 01/2018
4 NXP Semiconductors