NXP Semiconductors QSG ADC1x13D+ECP3 DB User manual

QSG ADC1x13D+ECP3 DB
Quick Start Guide ADC1x13D + ECP3 demo board
Rev. 1.2 — January 2011 Quick Start Guide
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Keywords ADC1413D, ECP3 FPGA
Abstract NXP has designed a USB powered demo board, to demonstrate the
interoperability of Lattice ECP3 FPGAs with NXP ADC over the
JESD204A serial interface.
This document describes the basic steps to operate this board driven by
a Personal Computer.
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QSG ADC1x13D+ECP3 DB
Quick Start Guide ADC1x13D + ECP3 demo board
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Quick Start Guide
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Contact information
For additional information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [e-mail]
Revision history
Rev Date Description
1.2 20110111 Update with new software release
1.1 20100616 Minor modifications (on SW especially)
1.0 20100419 Draft version
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Quick Start Guide ADC1x13D + ECP3 demo board
<DOC_ID> All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Quick Start Guide
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1. Introduction
1.1 Demoboard overview:
Fig 1. DemoBoard top view
NXP has designed a USB powered demo board to demonstrate the interoperability of
Lattice ECP3 FPGAs with NXP ADC over the JESD204A serial interface.
A single USB cable will allow to supply the board and to communicate with the FPGA &
the ADC thanks to dedicated software running on a PC. It is then possible to load the
data from the ADC through the FPGA and have an overview of the ADC features and
performance, in the frequency range of [0; 30]MHz.
By default an on-board oscillator is used to generate the sampling frequency, but it is
optionally possible to use an external clock to have more flexibility and a better jitter
performance. See Chapter 0 “5.Using an external clock reference”.
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Quick Start Guide ADC1x13D + ECP3 demo board
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1.2 Typical demonstration set-up
Fig 2. Picture of a typical demo set-up
The list of equipment needed is as follows:
A PC
A USB cable
A low jitter sine wave generator
A band-pass filter in case the sine wave is not pure enough
2 SMA-SMA cables if a filter is used, 1 cable if no filter
The NXP demo board
In addition, dedicated software is necessary to drive the FPGA & the ADC from the PC.
This software has been developed thanks to LabView, which means that at least the
LabView Runtime needs to be installed on the Laptop PC or the LabView environment
itself (v8.5).
These software tools are delivered by NXP either on a CD-ROM or through an internet-
based remote server.
!! Warning!! Please read carefully the following instructions before you start
plugging the demo board to the PC. It is especially necessary that you have the
CD-ROM ready to install the USB driver when you first plug the demo board to the
PC.
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Quick Start Guide ADC1x13D + ECP3 demo board
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2. Installing the software tools
2.1 LabView 8.6.1 Run-time environment:
Use the NXP CD-ROM to access the “LVRTE861STD.exe” file: open the folder named
“LabView_Runtime_v8.6” and double click on the .exe file in order to install the LabView
Runtime program.
2.2 USB drivers:
2.2.1 Step 1:
Connect the device to a USB port on your PC. Windows ‘Found New Hardware Wizard’
will be launched. Select ‘No, not this time’ from the options available and then click
‘Next’ to proceed with the installation.
Fig 3. New Hardware Wizard starting page
2.2.2 Step 2:
Select ‘Install from a list or specific location (Advanced)’ as shown below and then
click ‘Next’.
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Quick Start Guide ADC1x13D + ECP3 demo board
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Fig 4. New Hardware Wizard: configure
2.2.3 Step 3:
Select ‘Search for the best driver in these locations’ and enter the file path of the
folder : \USB Driver \driver_d2xx’ in the combo-box or browse to it by clicking the
browse button.
Once the file path has been entered in the box, click ‘next’ to proceed.
Fig 5. New Hardware Wizard: select driver location
D:
\
USB_Driver
\
d
river_d2xx
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Quick Start Guide ADC1x13D + ECP3 demo board
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2.2.4 Step 4:
Windows should then display a message indicating that the installation was successful.
Click ‘Finish’ to complete the installation for the first port of the device.
Fig 6. New Hardware Wizard: completion
2.3 NXP ADC: Run application
Using again the CD-ROM delivered by NXP, open now the folder
“NXP_ADC_ECP3_v1.0”, then run “NXP_ADC_ECP3_v1.0.exe”.
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Quick Start Guide ADC1x13D + ECP3 demo board
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3. Demo set-up connection
3.1 Connection diagram:
You are now ready to complete the demo set up connection. Please follow the
connections diagram as defined below:
Fig 7. Demo set-up connection diagram
Looking at the demo board, the LED status should be as follow:
Fig 8. LEDs status at power-up
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QSG ADC1x13D+ECP3 DB
Quick Start Guide ADC1x13D + ECP3 demo board
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Quick Start Guide
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4. ADC application user guide
4.1 Front panel:
First, launch the NXP_ADC_ECP3_v1.0.exe file from a file explorer (see §2.3).
You now get the following front panel:
Fig 9. ADC_Run front panel
Looking at the demo board, the LED status should now indicate that the JESD204A link
is alive and aligned:
Fig 10. LEDs status: JESD04A link aligned
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QSG ADC1x13D+ECP3 DB
Quick Start Guide ADC1x13D + ECP3 demo board
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Quick Start Guide
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If you did not achieve this LED status, please start again from chapter 3, after you
unplugged/plugged the USB cable.
If you successfully reached this LED status, from now on it will remain the same,
whatever the data acquisition/analysis you perform.
4.2 Data acquisition/analysis:
Assuming that the demo board receives an input signal, you are now ready to acquire
data and analyze them to experience the ADC performance.
We kindly remind you that the first focus of this demo board is to demonstrate the
interoperability between the Lattice FPGA & the NXP ADC1x13D high speed converter. It
has not been optimized to demonstrate the full range of capabilities of the ADC. It is in
particular limited to the 1rst Nyquist band, so for input frequencies between 0Hz and half
the sampling frequency (F
S
).
On this demo board, the sampling frequency is by default defined by an on-board
oscillator, which generates F
S
= 60Mhz. So you can input a sine wave between 0Hz and
30MHz. Although the ADC1x13D080 datasheet mentions 65Mhz as the minimum
frequency, we have decided to use a 60Mhz oscillator since the Abracon ASE oscillator
has a very good jitter compared to other oscillators but it is unfortunately not easily
available for an output frequency higher than 60Mhz. It is then possible to demonstrate
good SNR performance (in the range of 72dB) over the [0;30]MHz band.
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