NXP Semiconductors TWR-56F8400 User manual

Freescale Semiconductor Inc.
Microcontroller Solutions Group
TWR-56F8400
User Manual
Rev. O.01

TWR-56F8400 User’s Manual Page 2 of 35
Contents
Overview..........................................................................................................................................................4
1.1 Block Diagram......................................................................................................................................................................5
1.2 Reference Documents.......................................................................................................................................................5
2 Hardware Features...................................................................................................................................6
2.1 Tower MCU Module ...........................................................................................................................................................6
2.2 System Power.......................................................................................................................................................................6
2.2.1 P5V_USB .................................................................................................................................................................................................6
2.2.2 P3_3V .......................................................................................................................................................................................................6
2.2.3 P3_3V/5V ...............................................................................................................................................................................................7
2.2.4 Default Power Configuration ........................................................................................................................................................7
2.3 MC56F84789 DSC...............................................................................................................................................................7
2.3.1 Clock Sources for the MC56F84789 DSC .................................................................................................................................7
2.3.2 Serial I/O Source Select Headers.................................................................................................................................................8
2.3.3 LEDs Controlled by the MC56F84789 DSC .............................................................................................................................9
2.3.4 Motor Control Connector............................................................................................................................................................. 10
2.3.5 Auxiliary Connectors ..................................................................................................................................................................... 11
2.3.6 Tower Elevator Connectors........................................................................................................................................................ 14
2.3.7 Thermistors as Analog Inputs ................................................................................................................................................... 14
2.3.8 CAN Transceiver .............................................................................................................................................................................. 14
2.3.9 IRQ or Input Pushbuttons............................................................................................................................................................ 15
2.3.10 RESET ................................................................................................................................................................................................ 15
2.3.11 JTAG Header and OSBDM/OSJTAG Disconnect Header............................................................................................... 15
2.4 OSBDM/OSJTAG ............................................................................................................................................................... 16
2.4.1 Debug Interface................................................................................................................................................................................ 16
2.4.2 USB Serial Bridge Interface......................................................................................................................................................... 16
2.4.3 Clocking the OSBDM/OSJTAG MCU (MC9S08JM60)........................................................................................................ 16
2.4.4 OSBDM/OSJTAG/UART Function Select Header............................................................................................................... 16
2.4.5 Bootloader Enable .......................................................................................................................................................................... 17
2.4.6 BDM Header....................................................................................................................................................................................... 17
2.4.7 OSBDM/OSJTAG Status LEDs..................................................................................................................................................... 17
2.4.8 OSBDM/OSJTAG Voltage Translation..................................................................................................................................... 17
3 Jumper Table ........................................................................................................................................... 18
Appendix A – Tower Elevator Connector Pin Functions .............................................................. 20
Appendix B – TWR-56F8400 Board Schematic ............................................................................... 23
Appendix C – TWR-56F8400 Board BOM .......................................................................................... 24
Appendix D – TWR-56F8400 Board Jack Layout Top View............................................................1

TWR-56F8400 User’s Manual Page 3 of 35
Revision History
Revision Date Changes
O 12 Dec 2009 Input from Jay Hartvigsen
O.01 4 Jan 2010 Update from Jay Hartvigsen
O.02 21 Jan 2010
Reordered list of features in overview to match the table of
contents order. Correction to Table 2. Added LED Label
column in table 3. Added requested comment on CAN TXD
and RXD nets – that they also go to the elevator connector.
Improved description of USB Serial Bridge Interface and
moved the circuit description of this interface from section
2.3.2 to section 2.4.2. Added Tower Elevator Connector
table. Added an appendix to put the schematic in. Added
BOM.
O.03 29 Jan 2010 Updated document list in section 1.2 by Petr Stekl
0.00 25 February
2012
JLW Ported from MC56F8257 to the 32-bit MC56F84789
Note: OSBDM implies “also OSJTAG” below.
Due to the tight layout, added appendix for layout of
headers used for jumpers to aid in their identification.
0.01 27 February
2012
JLW responded to customer feedback as well as Ankar
feedback.
0.02 6 March 2012 JLW corrections to composite signal names
0.03 6 March 2012
JLW removed schematic. Editor to embed schematic as
object. Corrected TOWER signal names per latest. Included
new functionality of S08 firmware for CDC serial port.
Released to publications.
0.04 7 March 2012 JLW added back schematic as rev B

TWR-56F8400 User’s Manual Page 4 of 35
Overview
The MC56F8400 Tower 32-bit MCU Module (TWR-56F8400) is an evaluation, demonstration and
development board. The TWR-56F8400 can operate stand-alone or as the main control board in a
Tower system with peripheral modules. It can also be used as the main control board with an
APMOTOR56F8000E motor control board.
The following list summarizes the features of the TWR-56F8400:
•32 bit Digital Signal Controller module featuring MC56F84789
•Tower compatible
•Selectable Power sources:
oUSB on 56F8400 card
oBarrel connector on 56F8400 card
oMotor control board plug direct to 56F8400 card, no Tower connection, plug Motor
control to nine volts
oTower elevator board (USB or Barrel on Primary side)
•Filtered power for VDDA and VSSA on the 32-bit MC56F84789DSC
•MC56F84789 DSC (Digital Signal Controller) in an 100 LQFP package
•Optional 8 MHz crystal circuit for the MC56F84789 DSC
•9 LEDs controlled by the MC56F84789 DSC
•Motor Control Board connector for the APMOTOR56F8000E motor control board
•Auxiliary Signal connector
•Four Thermistors for single ended or differential analog inputs to the MC56F84789 DSC
•CAN transceiver, header, and termination
•Two push buttons for user input or interrupts to the MC56F84789 DSC
•Reset push button for the MC56F84789 DSC
•JTAG header for the MC56F84789 DSC with header to disconnect from OSBDM/OSJTAG
•Headers to connect SCI signals to either USB bridge with CDC(one channel) or elevator board
(two channels) or connect one to each
•Expansion via Primary Elevator connector
•MC9S08JM60 (‘JM60) MCU with a 4 MHz crystal provides:
oOpen Source Debug (OSBDM/OSJTAG) circuit
oUSB to SCI bridge with CDC and other techniques supported by third parties
oSimultaneious OSBDM/OSJTAG and USB to SCI bridge functions with no header required
to select
oBootloader enable header allows easy upgrade to latest S08 firmware pushed down by
CodeWarrior
oBDM header for the MC9S08JM60 MCU
oStatus and Target Power indicator LEDs
oControl of semiconductor switch to enable power to board from USB

TWR-56F8400 User’s Manual Page 5 of 35
oVoltage translators between 5V MC9S08JM60 MCU chip and 3.3V MC56F84789 DSC
chip
1.1 Block Diagram
A block diagram for the TWR-56F8400 is shown in Figure 1 below.
Figure 1. TWR-56F8400 Block Diagram
1.2 Reference Documents
The documents listed below should be referenced for more information on the Freescale Tower
system and the TWR-56F8400. Refer to http://www.freesale.com/tower for the latest revision of all
Tower documentation.
•Freescale Tower Electromechanical Specification
•TWR-56F8400 Quick Start Guide
•TWR-56F8400 Lab Tutorials
•MC56F84XXX Reference Manual
•MC56F84XXX Data Sheet
•MC56F84XXX Chip Errata [if exists]
•AN3561, USB Bootloader for the MC9S08JM60
•Serial Bootloader for MC56F84XXX User Guide
•APMOTOR56F8000e Motor Control Demonstration System User Manual
Motor Control&
Aux Connectors
Tower Elevator Expansion Connectors
(SPI, I2C, ADC, FEC, TPM, SCI, KB, etc.)
5.0V
3.3V
Freescale Device
External Connectors
Interface Circuits
Power
OSBDM (MC9S08JM60 MCU
Debug, Power, SCI Headers)
5.0V
USB
Mini-AB
Voltage
Translators
BDM
Header
•LEDs & Buffers (9)
•IRQ PB & HDRs (2)
•RESET PB
•Thermistors & HDRs (4)
•Analog Filters
•Microphone (optional)
•CAN XCVR & HDR
Barrel Power Connector
Power Selection HDRs
Voltage Regulator
5V-
9V 3.3V
MC56F84789
Digital Signal Controller
JTAG
Header
Boot load HDR

TWR-56F8400 User’s Manual Page 6 of 35
2Hardware Features
This section provides more details about the features and functionality of the TWR-56F8400.
A drawing of the TWR-56F8400 showing the jack locations is shown in Appendix D. Features are
discussed below.
2.1 Tower MCU Module
The TWR-56F8400 board is an MCU Module designed for standalone use (or with a Freescale Tower
system) and complies with the electrical and mechanical specification as described in Freescale Tower
Electromechanical Specification. Connection to the Tower system is through two expansion card-edge
connectors that interface to the Elevator boards in a Tower system: the Primary and Secondary
Elevator connectors. The Primary Elevator connector, comprised of sides A and B, is utilized by the
TWR-56F8400, while the Secondary Elevator connector only makes connections to ground (GND). On
sheet 8 of the schematic the J500A and J500B symbols have names assigned to the card edge fingers
that correspond with the normal Tower pin assignments.
2.2 System Power
The TWR-56F8400 board has three power rails. They are P5V_USB, P3_3V and P3_3V/5V. They are
sourced and used as follows:
2.2.1 P5V_USB
The P5V_USB power rail is derived from the Mini-B USB connector at J18 and the inductor at L2. It is
used to power the on board OSBDM/OSJTAG/Serial Bridge circuit. This consists of the OSBDM/OSJTAG
MCU at U6, several pull-up resistors at R13, R14, R15, R527, and R528, the USB power switch at U501,
and the STATUS and TPWR LEDs at D12 and D13. If there is no USB cable connected to J18 there is no
power on this rail and these circuits are all powered down.
2.2.2 P3_3V
The P3_3V power rail is derived from a) the P3_3V_MOTOR power net from the motor control board
connector at J501, b) the P3_3V_ELEV power net from the tower connector at J500, or c) the on board
3.3V regulator at U1. The selection of which source is made with a shunt from J7-2 to another pin of J7
or to J6. Table 6 shows the operation of the different shunt positions. The selection of power into the
regulator is made with a shunt from J11-2 to another pin of J11 or to J10 which selects from a) the
P5V_TRG_USB power net out of the USB switch at U501, b) the P5V_ELEV power net from the elevator
connection at J500 pins A1 and B1, or c) the PWR_IN power net from the 2mm barrel jack at J3 through
resettable fuse F1. Table 6 shows the operation of the different shunt positions. The barrel jack input is
protected from reverse voltage inputs by diode D11. The input to the barrel jack may be from a 5V to
9V source and needs to be center positive.

TWR-56F8400 User’s Manual Page 7 of 35
The P3_3V power rail provides power to the majority of the circuits on the board including the
MC56F84789 (including the analog power pins through L500 and L501), inverters at U500 and U502, a
buffer at U505, the on board LEDs at D1-D9, the thermistor divider circuits at RT1-RT4, and the pull-up
resistors at R2, R3, R11, R565, R570, and R562.
2.2.3 P3_3V/5V
The P3_3V/5V power rail is derived from the diode OR (using D500 and D501) of a) the P5V_ELEV
power net from the elevator connection (J500 pins A1 and B1), b) the P5V output of the USB power
switch at U501, or c) the P3_3V power rail from J7. When there is a USB cable connected or when the
tower elevator boards are connected this power rail will be a Schottky diode drop (about 0.3V) below
the 5V power nets. When there is no 5V source this power rail will be a Schottky diode drop below the
P3.3V power rail. This allows the inputs of the ICs powered by this rail to stay in a high impedance state
instead of loading down the inputs through the input protection diodes as would happen if there were
no power supplied to the buffers.
2.2.4 Default Power Configuration
The TWR-56F8400 board default power configuration uses the OSBDM/OSJTAG USB port for all power.
As soon as the OSBDM/OSJTAG firmware has started it negotiates with the Host PC USB port for full
USB power. Once approved it enables the 5V USB power switch (U501) which provides 5V to the
P3_3V/5V power rail and to the 3.3V regulator (U1) through headers J10 and J11. Likewise, the on
board voltage regulator provides 3.3V to the P3_3V power rail through headers J6 and J7. The 3.3V
regulator is able to provide up to 700 mA subject to the power dissipation and temperature limits of
the device.
2.3 MC56F84789 DSC
The primary circuits on the board are related to the MC56F84789 DSC. This part is supplied in a surface
mounted 100pin LQFP package at U2. Although the board was laid out to allow a ZIF socket at U3 in
parallel to the chip at U2 the TWR-56F8400 is only available for purchase with the surface mounted
chip.
2.3.1 Clock Sources for the MC56F84789 DSC
Three options are provided for clocking the MC56F84789 device:
1. Oscillator internal to the MC56F84789 chip – approximately 8 MHz.
2. 8 MHz crystal
3. External clock input from Primary Tower Connector or the AUX Connector.
The internal oscillator is used to clock the MC56F84789 immediately following reset. This is the default
operation. In this mode the zero ohm resistors at R4 and R10 allow the GPIOC0 and GPIOC1 pins of the
MC56F84789 to be used as inputs or outputs.

TWR-56F8400 User’s Manual Page 8 of 35
To use an external crystal with the MC56F84789, zero ohm resistors R4 and R10 must be removed and
placed in the R5 and R7 positions. The desired crystal, load capacitors, and parallel resistor (if needed)
must be soldered to the board at Y1, C5, C6, and R6. (These components are not provided with the
TWR-56F8400 kit.) Following reset, reconfigure the GPIOC0 and GPIOC1 pins to the XTAL and EXTAL
functions to allow the use of an external crystal.
To use an external clock for the MC56F84789 make sure the zero ohm resistors are installed at R4 and
R10 and removed from R5 and R7. Provide a clock signal on either the Primary Tower Connector J500A
- pin B24 (the pin designated as CLOCKIN0) or on the AUX connector J502 - pin 8. Following reset,
configure the GPIOC0 pin to the CLKIN input function. In this mode the zero ohm resistor at R10 allows
the GPIOC1 pin of the MC56F84789 (pin 10) to be used as an input or output.
2.3.2 Serial I/O Source Select Headers
The TWR-56F8400 board allows the UART functions of the MC56F84789 DSC to be connected to a
serial interface at the primary Tower Connector J500A or through a USB bridge to the Host PC using the
OSBDM/OSJTAG MCU (U6). The selection of the RXD connections is done with the header at J8 as
shown in Table 1.The selection of the TXD connections is done with the header at J9 as shown in Table
2.
Table 1. J8 – RXD Source Select Header
J8 – RXD Source Select Header
Pin # Connected Signal Description
1 ELEV_RXD0 at J500A pin A41 Shunt pins 1 and 2 together to connect the DSC
RXDO pin to the primary Tower Connector RXD0
pin. (This is a default position.)
2
GPIOF8/RXD0/TB1 from the 56F84789
DSC – pin 6 (RXD0 function)
3 RXD_SEL from the USB bridge
function on the OSBDM/OSJTAG
MCU.
Shunt pins 2 and 3 together to connect the DSC
RXD0 pin to the USB serial bridge function.
Shunt pin 3 and 4 together to connect the DSC
RXD1 pin to the USB serial bridge function.
4 GPIOF5/RXD1/XB_OUT5 from the
56F84789 DSC – pin 42 (RXD1
function)
5 ELEV_RXD1 at J500 pin A43 Shunt pins 4 and 5 together to connect the DSC
RXD1 pin to the primary Tower Connector RXD1
pin. (This is a default position.)

TWR-56F8400 User’s Manual Page 9 of 35
Table 2. J9 – TXD Source Select Header
J9 – TXD Source Select Header
Pin # Connected Signal Description
1 ELEV_TXD0 at J500A pin A42 Shunt pins 1 and 2 together to connect the DSC
TXDO pin to the primary Tower Connector TXD0
pin. (This is a default position.)
2 GPIOC2/TXD0/TB0/XB_IN2/CLKO
from the 56F84789 DSC – pin 5 (TXD0
function)
3 TXD_SEL to the USB bridge function
on the OSBDM/OSJTAG MCU.
Shunt pins 2 and 3 together to connect the DSC
TXD0 pin to the USB serial bridge function.
Shunt pin 3 and 4 together to connect the DSC
TXD1 pin to the USB serial bridge function.
4 GPIOF4/TXD1/XB_OUT4 from the
56F84789 DSC – pin 41 (TXD1
function)
5 ELEV_TXD1 at J500 pin A44 Shunt pins 4 and 5 together to connect the DSC
TXD1 pin to the primary Tower Connector TXD1
pin. (This is a default position.)
As can be seen in the tables the 56F84789 DSC serial signals may be connected to either the Tower
serial signals or to the USB bridge chip; however, only one channel may be connected to the USB
bridge chip. If the associated 56F84789 DSC serial pins are not being used for the serial functions the
shunts should be removed from those pins. For more information on the USB Serial Bridge function see
section 2.4.2 USB Serial Bridge Interface.
2.3.3 LEDs Controlled by the MC56F84789 DSC
There are nine LEDs with buffers connected to the MC56F84789 DSC. Inverting buffers (U500A-F and
U502D-F) isolate the LEDs from the DSC pins by providing high impedance inputs. The LEDs are
powered by the P3_3V rail and draw about 5mA each. Table 3 shows the DSC pin names associated
with each LED.
Table 3. LEDs Controlled by the MC56F84789 DSC
LEDs Controlled by the MC56F84789 DSC
MC56F84789 DSC
Pin Name
MC56F84789
Pin Number
LED
Reference
LED
Label
LED
Color
GPIOE0/PWMA_0B 68 D1 E0 Green
GPIOE1/PWMA_0A 69 D2 E1 Yellow
GPIOE2/PWMA_1B 74 D3 E2 Green
GPIOE3/PWMA_1A 75 D4 E3 Yellow

TWR-56F8400 User’s Manual Page 10 of 35
GPIOE4/PWMA_2B/XB_IN2 82 D5 E4 Green
GPIOE5/PWMA_2A/XB_IN3 83 D6 E5 Yellow
GPIOE6/PWMA_3B/XB_IN4/PW
MB_2B
84 D7 E6 Green
GPIOE7/PWMA_3A/XB_IN5/PW
MB_2A
85 D8 E7 Yellow
GPIOF6/TB2/PWMA_3X/PWMB_
3X/XB_IN2
94 D9 F6 Amber
2.3.4 Motor Control Connector
The TWR-56F8400 board may be connected to a motor control board such as the APMOTOR56F8000E.
The motor control connector (J501) is on the bottom of the board to provide a convenient connection
to the motor control board.
Some of the MC56F84789 DSC pins are connected to the motor control connector. Those pins
associated with analog inputs have 100 ohm resistors in series to provide some ESD protection for the
analog inputs of the DSC. Those pins providing analog signals from the motor control board have 2200
pf caps with the resistors to provide a low pass filter. The connector pin out is shown in Table 4.
Table 4. Motor Control Connector Pin Out
Motor Control Connector J501 Pin Out
Pin
#
MC56F84789 DSC Signal Pin
#
MC56F84789 DSC Signal
1 P3_3V_MOTOR 2 GPIOB7/ANB7&ANC15&CMPB_IN2
(With 100 ohms in series)
3 GND 4 RESETB/ GPIOD4
(With 0 ohms in series – remove to
isolate)
5 GPIOF4/TXD1/XB_OUT8 6 GPIOA3/ANA3&VREFLA&CMPA_IN2
(With 100 ohms in series)
7 GPIOF3/SDA1/XB_OUT7 8 GND
9 GPIOE1/PWMA_0A 10 GPIOA0/ANA0&CMPA_IN3/CMPC_O
(With 100 ohm, 2200 pf low pass filter)
11 GPIOE0/PWMA_0B 12 GPIOA1/ANA1&CMPA_IN0
(With 100 ohm, 2200 pf low pass filter)
13 GPIOC3/TA0/CMPA_O/RXD0/CLKIN1 14 GPIOA2/ANA2&VREFHA&CMPA_IN1
(With 100 ohm, 2200 pf low pass filter)
15 GPIOC13/TA3/XB_IN6/EWM_OUT_B 16 GND

TWR-56F8400 User’s Manual Page 11 of 35
Motor Control Connector J501 Pin Out
Pin
#
MC56F84789 DSC Signal Pin
#
MC56F84789 DSC Signal
17 GPIOC4/TA1/CMPB_O/XB_IN8/EWM_OUT_B 18 GPIOB0/ANB0&CMPB_IN3
(With 100 ohm, 2200 pf low pass filter)
19 GPIOC6/TA2/XB_IN3/CMP_REF 20 GPIOB1/ANB1&CMPB_IN0
(With 100 ohm, 2200 pf low pass filter)
21 GPIOC15/SCL0/XB_OUT5 22 GPIOB2/ANB2&VREFHB&CMPC_IN3
(With 100 ohm, 2200 pf low pass filter)
23 GPIOC14/SDA0/XB_OUT4 24 GND
25 TDI /GPIOD0 26 GPIOE7/PWMA_3A/XB_IN5/PWMB_2A
27 TDO/ GPIOD1 28 GPIOE6/PWMA_3B/XB_IN4/PWMB_2B
29 TCK/GPIOD2 30 GPIOE3/PWMA_1A
31 TMS /GPIOD3 32 GPIOE2/PWMA_1B
33 GPIOB3/ANB3&VREFLB&CMPC_IN0
(With 100 ohms in series)
34 GPIOE5/PWMA_2A/XB_IN3
35 GPIOB4/ANB4&ANC12&CMPC_IN1
(With 100 ohms in series)
36 GPIOE4/PWMA_2B/XB_IN2
37 GPIOB5/ANB5&ANC13&CMPC_IN2
(With 100 ohms in series)
38 GPIOA4/ANA4&ANC8&CMPD_IN0
(With 100 ohms in series)
39 GPIOB6/ANB6&ANC14&CMPB_IN1
(With 100 ohms in series)
40 GPIOA5/ANA5&ANC9
(With 100 ohms in series)
2.3.5 Auxiliary Connectors
In addition to the motor control connector the TWR-56F8400 board also provides two auxiliary
connectors (J502 and J503) on the bottom of the board. These connectors provide access to the
MC56F84789 DSC signals that are not covered by the motor control connector. Those pins associated
with analog inputs have 100 ohm resistors in series to provide some ESD protection for the analog
inputs of the DSC. The connector pin out is shown in Table 5.
Table 5. Auxiliary Connector J502 Pin Out
Auxiliary Connectors J502 and J503 Pin Out
Pin
#
MC56F84789 DSC Signal Pin
#
MC56F84789 DSC Signal
J50
2-1
GPIOF0/XB_IN6/TB2/SCK1 J50
2-2
GPIOA6/ANA6&ANC10
(With 100 ohms in series)
J50
2-3
GPIOF1/CLKO1/XB_IN7/CMPD_O J50
2-4
GPIOA7/ANA7&ANC11
(With 100 ohms in series)

TWR-56F8400 User’s Manual Page 12 of 35
Auxiliary Connectors J502 and J503 Pin Out
Pin
#
MC56F84789 DSC Signal Pin
#
MC56F84789 DSC Signal
J50
2-5
GPIOF2/SCL1/XB_OUT6 J50
2-6
GND
J50
2-7
GPIOF5/RXD1/XB_OUT9 J50
2-8
GPIOC0/EXTAL/CLKIN0
J50
2-9
GPIOF6/TB2/PWMA_3X/PWMB_3X/XB_I
N2
J50
2-
10
GPIOC1/XTAL
J50
2-
11
GPIOF7/TB3/CMPC_O/SS1_B/XB_IN3 J50
2-
12
GPIOC2/TXD0/TB0/XB_IN2/CLKO0
J50
2-
13
GPIOF8/RXD0/TB1/CMPD_O J50
2-
14
GPIOC5/DACO/XB_IN7
J50
2-
15
GPIOC11/CANTX/SCL1/TXD1 J50
2-
16
GPIOC7/SS0_B/TXD0
J50
2-
17
GPIOC12/CANRX/SDA1/RXD1 J50
2-
18
GPIOC8/MISO0/RXD0/XB_IN9
J50
2-
19
GND J50
2-
20
GPIOC9/SCK0/XB_IN4
J50
2-
21
No Connection J50
2-
22
GPIOC10/MOSI0/XB_IN5/MISO0
J50
2-
23
No Connection J50
2-
24
No Connection
J50
2-
25
No Connection J50
2-
26
No Connection
J50
3-1
GPIOA8/ANC16&CMPD_IN1 J50
3-2
GPIOF12/MISO1/PWMB_FAULT2
J50
3-3
GPIOA9/ANC17&CMPD_IN2 J50
3-4
GPIOF13/MOSI1/PWMB_FAULT1
J50
3-5
GPIOA10/ANC18&CMPD_IN3 J50
3-6
GPIOF14/SCK1/PWMB_FAULT0

TWR-56F8400 User’s Manual Page 13 of 35
Auxiliary Connectors J502 and J503 Pin Out
Pin
#
MC56F84789 DSC Signal Pin
#
MC56F84789 DSC Signal
J50
3-7
GPIOA11/ANC19&VREFHC J50
3-8
GPIOF15/RXD0/XB_IN10
J50
3-9
GPIOB8/ANC20&VREFLC J50
3-
10
GPIOG0/PWMB_1B/XB_OUT6
J50
3-
11
GPIOB9/ANC21/XB_IN9/MISO2 J50
3-
12
GPIOG1/PWMB_1A/XB_OUT7
J50
3-
13
GPIOB10/ANC22/XB_IN8/MOSI2 J50
3-
14
GPIOG2/PWMB_0B/XB_OUT4
J50
3-
15
GPIOB11/ANC23/XB_IN7/SCK2 J50
3-
16
GPIOG3/PWMB_0A/XB_OUT5
J50
3-
17
GPIOD5/RXD2/XB_IN5/XB_OUT9 J50
3-
18
GPIOG4/PWMB_3B/PWMA_FAULT2
J50
3-
19
GPIOD6/TXD2/XB_IN4/XB_OUT8 J50
3-
20
GPIOG5/PWMB_3A/PWMA_FAULT3
J50
3-
21
GPIOD7/XB_OUT11/XB_IN7/MISO1 J50
3-
22
GPIOG6/PWMA_FAULT4/PWMB_FAULT4/TB2
/XB_OUT8
J50
3-
23
GPIOE8/PWMB_2B/PWMA_FAULT0 J50
3-
24
GPIOG7/PWMA_FAULT5/PWMB_FAULT5/XB_
OUT9
J50
3-
25
GPIOE9/PWMB_2A/PWMA_FAULT1 J50
3-
26
GPIOG8/PWMB_0X/PWMA_0X/TA2/XB_OUT1
0
J50
3-
27
GPIOF9/
RXD2/PWMA_FAULT7/PWMB_FAULT7/X
B_OUT11
J50
3-
28
GPIOG9/PWMB_1X/PWMA_1X/TA3/XB_OUT1
1
J50
3-
29
GPIOF10/TXD2
/PWMA_FAULT6/PWMB_FAULT6/XB_OU
T10
J50
3-
30
GPIOG10/PWMB_2X/PWMA_2X/XB_IN8/SS_B
2
J50
3-
31
GPIOF11/TXD0/XB_IN11 J50
3-
32
GPIOG11/TB3/CLKO0/MOSI1

TWR-56F8400 User’s Manual Page 14 of 35
2.3.6 Tower Elevator Connectors
The TWR-56F8400 board features two expansion card-edge connectors that interface to Elevator
boards in a Tower System: the Primary and Secondary Elevator connectors. The Primary Elevator
connector, comprised of sides A and B, is utilized by the TWR-56F8400 board, while the Secondary
Elevator connector only makes connections to ground (GND). Table 7 in Appendix A – Tower Elevator
Connector Pin Functions lists the pin functions for the Primary Elevator Connector.
2.3.7 Thermistors as Analog Inputs
The TWR-56F8400 board provides four thermistors (RT1-4) near the corners of the board that can be
used as single ended or differential analog inputs to the MC56F84789 DSC as can be seen on sheet 6 of
the schematic. In addition to each thermistor there is a resistor between the thermistor and P3_3V and
another resistor between the thermistor and ground. The thermistors are all 10K ohm parts but the
associated divider chain uses different resistors. This makes the voltage across the thermistor larger or
smaller and provides the ability to try the different gain settings on the analog channels. All four
thermistor circuits are designed to provide useable differential inputs over the temperature range of
90˚C to -20˚C. RT2 and RT4 both give a differential voltage of ~1.65V at 25˚C. RT1 gives a differential
voltage of 0.10V and RT3 gives a differential voltage of 0.28V at 25 ˚C.
In addition to the thermistor voltage divider chain each thermistor has a 0.1 uF capacitor in parallel.
Each thermistor circuit also has a header that allows the thermistor to be disconnected from the
analog inputs to the DSC. If a user wishes to apply an external analog value these headers may be
removed and the external analog signal attached to the DSC side of the headers. Finally, each analog
input to the DSC has a 100 ohm series resistor and a 2200 pF capacitor as a low pass filter. This helps
protect the DSC from electrostatic discharges and lowers the impedance of the analog signal so that it
can be sampled with less noise.
2.3.8 CAN Transceiver
The TWR-56F8400 board has a CAN transceiver circuit that may be connected to the CAN pins of the
DSC. The CAN transceiver (U503) can be connected to the GPIOC11/CANTX/SCL1/TXD1 and
GPIOC12/CANRX/SDA1/RXD1 pins of the DSC through the header at J16. Installing a shunt from pin 1 to
pin 2 connects the TXD nets and installing a shunt from pin 3 to pin 4 connects the RXD nets. Note that
the GPIOC11/CANTX/SCL1/TXD1 and GPIOC12/CANRX/SDA1/RXD1 nets also go to the primary elevator
edge connector (J500A) pins B41 and B42 and to the Auxiliary connector (J502) pins 15 and 17. When
using these nets for CAN communications care must be taken that these nets are not driven from these
other connectors.
The transceiver is capable of running from 3.3V and is powered by the P3_3V/5V power rail. The
transceiver output is connected to header J13 with CANH connected to pin 4 and CANL connected to

TWR-56F8400 User’s Manual Page 15 of 35
pin 3. A 120 ohm parallel termination resistor,R560, may be connected between these nets by
installing a shunt on header J15.
2.3.9 IRQ or Input Pushbuttons
The TWR-56F8400 board has two pushbuttons (SW1 and SW2) that can be used to provide inputs or
interrupts to the DSC. Each has a 10K ohm pull up resistor to P3_3V and a 0.1 uF capacitor to ground to
minimize bounce on the output.
Pushbutton SW1 is connected to header J4 where the switch output can be connected to either DSC
pin GPIOC2/TXD0/TB0/XB_IN2/CLKO0 (default) or GPIOF6/TB2/PWMA_3X/PWMB_3X/XB_IN2
depending on the position of the shunt on the header (pin 1 to pin 2 is the default). Similarly,
pushbutton SW2 is connected to header J5 where the switch output can be connected to either DSC
pin GPIOF8/RXD0/TB1/CMPD_O (default) or GPIOF7/TB3/CMPC_O/SS1_B/XB_IN3 depending on the
position of the shunt on the header (pin 1 to pin 2 is the default).
If the pushbutton switches are not being used as an interrupt, or other purpose, it is best to remove
the shunt to the DSC so that the 0.1 uF capacitor is not loading down the DSC pins.
2.3.10 RESET
The GPIOD4/RESET_B pin of the DSC is connected to the motor control connector and the tower
connector but also to a pushbutton (SW3) and through buffers to the OSBDM/OSJTAG chip. It is pulled
to P3_3V by a 10K ohm resistor. It may be pulled low by the pushbutton or by Q1 in response to a high
output from the OSBDM/OSJTAG chip (pin 1) on the TRESET_OUT net. The state of the
GPIOD4/RESET_B signal is provided to the OSBDM/OSJTAG chip through a voltage translator (U504B).
This buffer is powered by the P3_3V/5V power rail so that its input will remain high impedance when
there is no USB cable connected. The buffered RESET signal is provided to pin 33 of the
OSBDM/OSJTAG chip and is used by the OSBDM/OSJTAG program in that chip.
2.3.11 JTAG Header and OSBDM/OSJTAG Disconnect Header
The TWR-56F8400 board includes an OSBDM/OSJTAG circuit as a debug interface to the MC56F84789
DSC for normal purposes. If the user desires to use a different debugger connection, header J14
provides a connection point for an external JTAG aware debugger. If an external debugger is connected
to the JTAG header the shunts at J21 (pins 1 to 2, 3 to 4, 5 to 6, and 7 to 8) which connect the
OSBDM/OSJTAG circuit to the JTAG signals should be removed, allowing the external debugger to
control the JTAG port, rather than the ‘JM60.
The TWR-56F8400 board provides a 2.2K ohm pull up resistor to 3.3V on the TMS line. If an external
JTAG aware debugger also has a pull up on this line, the external debugger may not be able to pull the
TMS line low. If this happens, remove one of the pull up resistors on the TMS line.

TWR-56F8400 User’s Manual Page 16 of 35
2.4 OSBDM/OSJTAG
2.4.1 Debug Interface
An on-board MC9S08JM60 based Open Source BDM (OSBDM/OSJTAG) circuit provides a debug
interface to the MC56F84789. A standard USB A male to Mini-B male cable (supplied) can be used for
debugging via the USB connector, J18.
2.4.2 USB Serial Bridge Interface
The on-board MC9S08JM60 can also be used as a USB to Serial bridge interface for the UART signals
from the MC56F84789 DSC. This bridge circuit is described in detail in section 2.3.2 Serial I/O Source
Select Headers.
The RXD_SEL signal goes to the MC56F84789 DSC. The USB bridge chip is powered by 5V so its output
is a 5V output. The buffer (U505) is able to accept the 5V signal from the USB bridge chip (T_TXD1) and
converts it to the 3.3V signal (RXD_SEL) for the DSC. The buffer output is enabled by an inverted RTS
signal (TXD_RXD_EN_B) from the USB bridge chip. If there is no USB connection to the TWR board the
RTS signal is not driven and the 3.3V powered inverter (U502C) input is biased low disabling the output
of the buffer.
In a similar way TXD_SEL is a 3.3V signal from the MC56F84789 DSC. The USB bridge chip is expecting a
5V input on T_RXD1. The buffer between these two signals (U504C) is powered by P3_3V/5V. It will
accept the 3.3V input from the DSC and convert it to the 5V signal needed by the USB bridge chip. The
buffer output is enabled by the same inverted RTS signal (TXD_RXD_EN_B) discussed above. If there is
no USB connection to the TWR board, the RTS signal is not driven and the 5V powered buffer disabled
so nothing is driving the powered down USB bridge chip.
The serial interface signals from the MC56F84789 DSC may be routed to the MC9S08JM60 serial
interface via header and Berg straps. Using the USB serial bridge the MC9S08JM60 will convert the
serial interface data into USB packets and send them to the host PC where they may be handled by a
PC application normally conversant with a serial port.
2.4.3 Clocking the OSBDM/OSJTAG MCU (MC9S08JM60)
The MC9S08JM60 MCU uses an on board 4 MHz external crystal circuit (Y2, R16, C7, and C9) for its
clock. There are no user options for clocking the MC9S08JM60.
2.4.4 Reserved Function Select Header
Header J20 selects whether the on-board MC9S08JM60 MCU operates as an OSBDM/OSJTAG debug
interface or as a USB Serial Bridge interface on older versions of S08 firmware such as may have existed

TWR-56F8400 User’s Manual Page 17 of 35
on prototypes of the TWR56F8400. Leaving the shunt on the header enables the OSBDM/OSJTAG
debug interface. Removing the shunt on header J20 enables the USB Serial Bridge interface. The
header, J20, is subsequently reserved for future use.
2.4.5 Bootloader Enable
In addition to the OSBDM/OSJTAG Debug interface and the USB Serial Bridge interface the
MC9S08JM60 device used in the OSBDM/OSJTAG circuit is preprogrammed with a USB Bootloader.
The USB Bootloader will run following a power-on reset if a shunt is installed on header J17. This
allows in-circuit reprogramming of the JM60 flash memory via USB. This enables the OSBDM/OSJTAG
firmware to be upgraded by the user when upgrades become available. In normal OSBDM/OSJTAG /
USB Serial Bridge operation this shunt must be left off. For details on the USB Bootloader, refer
to Application Note AN3561 on the Freescale website (http://www.freescale.com
The USB Bootloader communicates with a GUI application running on a host PC. The GUI application
can be found on the Freescale website; search keyword “JM60 GUI”. Refer to section 2.5 and 3.3 of
AN3561 for details on installing and running the application.
2.4.6 BDM Header
The BDM header at J22 is used for initial programming of the MC9S08JM60 MCU or if reprogramming
when the bootloader fails. An external 9S08 BDM debugger would be connected to J22 and used to
program the MCU. This is not expected to be a normal user interface, however it is useful if the ‘JM60
device is inadvertently reprogrammed with firmware that is not functional.
2.4.7 OSBDM/OSJTAG Status LEDs
The MC9S08JM60 OSBDM/OSJTAG MCU controls two status LEDs at D12 and D13. Refer to the
OSBDM/OSJTAG instructions for the meaning of the LEDs.
2.4.8 OSBDM/OSJTAG Voltage Translation
Since the OSBDM/OSJTAG MCU runs from 5V and the 56F84789 DSC runs from 3.3V there needs to be
voltage translation between the two circuits. This is done through U505, U504A and U502B. U505 has
5V tolerant inputs and provides 3.3V signals (TCK, TDI, and TMS) to the DSC’s JTAG pins through the
shunts on header J21. U504A is powered by the P3_3V/5V rail and translates the 3.3V TDO signal from
the DSC to a 5V signal for the OSBDM/OSJTAG MCU. The outputs of both of these translators are high
impedance if the signal OUT_EN_B goes high. This happens if the OSBDM/OSJTAG circuit looses power
(no power to the USB connector). In that case the OUT_EN signal from the OSBDM/OSJTAG MCU (pin
15) is biased low by R12. The inverter at U502B then drives OUT_EN_B high in response. Additional
information is included in section 2.4.2.

TWR-56F8400 User’s Manual Page 18 of 35
3Jumper Table
There are several headers provided for isolation, configuration, and feature selection. Refer to Table 6
for details. The default shunt positions are shown in bold.
Table 6. TWR-56F8400 Jumper Table
Jumper
Function
Shunts
Description
J1 Thermistor RT1 Connect
1-2, 3-4
Connect RT1 circuit to the MC56F827 DSC
none
Disconnect RT1 circuit from the MC56F84789 DSC
J2 Thermistor RT2 Connect
1-2, 3-4
Connect RT2 circuit to the MC56F827 DSC
none
Disconnect RT2 circuit from the MC56F84789 DSC
J4 IRQ1 Select
1-2
Connect SW1 to MC56F84789 DSC pin
GPIOC2/TXD0/TB0/XB_IN2/CLKO0
3-4
Connect SW1 to MC56F84789 DSC pin
GPIOF6/TB2/PWMA_3X/PWMB_3X/XB_IN2
none
Disconnect SW1 from the MC56F84789 DSC
J5 IRQ0 Select
1-2
Connect SW2 to MC56F84789 DSC pin
GPIOF8/RXD0/TB1/CMPD_O
3-4
Connect SW2 to MC56F84789 DSC pin
GPIOF7/TB3/CMPC_O/SS1_B/XB_IN3
none
Disconnect SW2 from the MC56F84789 DSC
J6 and
J7 3.3V Source Select
J6-1 to
J7-2
Connect the on-board voltage regulator to the
P3_3V power rail
J7-1 to
J7-2
Connect P3_3V_MOTOR to the P3_3V power rail
(power the 3.3V rail from the motor control connector)
J7-2 to
J7-3
Connect P3_3V_ELEV to the P3_3V power rail
(power the 3.3V rail from the tower connector)
J7-2
open
Disconnect the P3_3V power rail – no power
J8 RXD Source Select (note that only one connection can be
made to pin 3 at a time)
1-2
Connect ELEV_RXD0 from the Tower connector
to MC56F84789 DSC pin
GPIO
F8
/RXD0/TB1/CMPD_O
2-3
Connect RXD_SEL from the USB Serial Bridge to
MC56F84789 DSC pin
GPIOF8/RXD0/TB1/CMPD_O
Pin 2
open
Disconnect MC56F84789 DSC pin
GPIOF8/RXD0/TB1/CMPD_O
3-4
Connect RXD_SEL from the USB Serial Bridge to
MC56F84789 DSC pin GPIOF5/RXD1/XB_OUT9
4-5
Connect ELEV_RXD1 from the Tower connector
to MC56F84789 DSC pin GPIOF5/RXD1/XB_OUT9
Pin 4
open
Disconnect MC56F84789 DSC pin
GPIO
F5
/RXD1/XB_OUT9

TWR-56F8400 User’s Manual Page 19 of 35
Jumper
Function
Shunts
Description
J9 TXD Source Select (note that only one connection can be
made to pin 3 at a time)
1-2
Connect ELEV_TXD0 from the Tower connector
to MC56F84789 DSC pin
GPIOC2/TXD0/TB0/XB_IN2/CLKO0
2-3
Connect TXD_SEL from the USB Serial Bridge to
MC56F84789 DSC pin
GPIO
C2
/TXD0/TB0/XB_IN2/CLKO0
Pin 2
open
Disconnect MC56F84789 DSC pin
GPIO
C2
/TXD0/TB0/XB_IN2/CLKO0
3-4
Connect TXD_SEL from the USB Serial Bridge to
MC56F84789 DSC pin GPIO
F4
/TXD1/XB_OUT8
4-5
Connect ELEV_TXD1 from the Tower connector
to MC56F84789 DSC pin GPIOF4/TXD1/XB_OUT8
Pin 4
open
Disconnect MC56F84789 DSC pin
GPIO
F4
/TXD1/XB_OUT8
J10 and
J11 5V Source Select
J10-1 to
J11-2
Connect the power in barrel connector (through fuse
F1) to the input of the 3.3V voltage regulator
J11-1 to
J11-2
Connect P5V_TRG_USB (the switched USB 5V) to
the input of the 3.3V voltage regulator
J11-2 to
J11-3
Connect P5V_ELEV to the input of the 3.3V voltage
regulator
J11-2
open
Disconnect the input of the 3.3V voltage regulator
J12 Unused
open
Unused
J15 CAN Termination Enable
1-2
Connect the 120 ohm CAN termination resistor
open
No CAN termination
J16 CAN Enable
1-2, 3-4
Connect the CAN transceiver TXD and RXD to
MC56F84789 DSC pins
GPIOC11/CANTX/SCL1/TXD1
GPIOC12/CANRX/SDA1/RXD1
open
Disconnect the CAN transceiver
J17 MC9S08JM60 Bootload Enable
1-2
Enable USB bootloading of the MCU Flash memory
open
Disable bootloading
J19 Thermistor RT3 Connect
1-2, 3-4
Connect RT3 circuit to the MC56F827 DSC
none
Disconnect RT3 circuit from the MC56F84789 DSC
J20 RESERVEC /
OSBDM/OSJTAG Enable
1-2
Reserved-deprecated
none
Reserved-deprecated
J21 OSBDM/OSJTAG Connect to
JTAG
1-2, 3-4,
5-6, 7-8
Connect the OSBDM/OSJTAG debug signals
(JTAG) to the MC56F84789 DSC JTAG pins
none
Disconnect OSBDM/OSJTAG from the MC56F84789
DSC
J23 Thermistor RT4 Connect
1-2, 3-4
Connect RT4 circuit to the MC56F827 DSC
none
Disconnect RT4 circuit from the MC56F84789 DSC

TWR-56F8400 User’s Manual Page 20 of 35
Appendix A – Tower Elevator Connector Pin Functions
Table 7 provides the pin out for the Primary Elevator Connector. An “X” in the “Used” column
indicates that there is a connection from the TWR-56F8400 board to that pin on the Elevator
connector. An “X” in the “Jmp” column indicates that a jumper is available that can isolate the
onboard circuitry from the Elevator connector. An “X” in the “Jmp” column indicates that a jumper is
available that can isolate part of the onboard circuitry from the Elevator connector.
The function listed in the “Usage” column is the function(s) that the pin is expected to be programmed
to provide when used with the Tower system. All of the MC56F84789 pins (except power) have
multiple functions. Not all of the possible functions are shown.
Note that all analog pins (ANAn or ANBn) have a low pass filter to ground consisting of a 100 ohm
resistor and a 2200 pf capacitor. This is to protect the analog inputs of the DSC from a static discharge
at one of the connectors. See schematic sheets 6 and 7 in Appendix B – TWR-56F8400 Board
Schematic.
Table 7. TWR-56F8400 Primary Elevator Connector Pin Out
TWR-56F8400 Primary Connector
Pin Name Usage Used Jmp Pin Name Usage Used Jmp
B1 5V_1 5V Power X X A1 5V_2 5V Power X X
B2 GND Ground X A2 GND_9 Ground X
B3 3.3V_1 3.3V Power X X A3 3.3V_4 3.3V Power X X
B4 ELE_PS_SENSE_1 3.3V Power X X A4 3.3V_5 3.3V Power X X
B5 GND_2 Ground X A5 GND_10 Ground X
B6 GND_3 Ground X A6 GND_11 Ground X
B7 SDHC_CLK / SPI1_CLK SCK (see also pin B48) X A7 I2C0_SCL SCL0 X
B8 SDHC_D3 / SPI1_CS1_b A8 I2C0_SDA SDA0 X
B9 SDHC_D3 / SPI1_CS0_b SS_B (see also pin B46) X A9 GPIO9/UART1_CTS1 GPIOA4/ANA4 X X
B10 SDHC_CMD / SPI1_MOSI MOSI (see also pin B45) X A10 GPIO8/SDHC_D2 GPIOA5/ANA5 X X
B11 SDHC_D0 / SPI1_MISO MISO (see also pin B44) X A11 GPIO7 / SD_WP_DET GPIOA6/ANA6 X X
B12 ETH_COL_1 A12 ETH_CRS
B13 ETH_RXER_1 A13 ETH_MDC_1
B14 ETH_TXCLK_1 A14 ETH_MDIO_1
B15 ETH_TXEN_1 A15 ETH_RXCLK_1
B16 ETH_TXER A16 ETH_RXDV_1
B17 ETH_TXD3 A17 ETH_RXD3
B18 ETH_TXD2 A18 ETH_RXD2
B19 ETH_TXD1_1 A19 ETH_RXD1_1
B20 ETH_TXD0_1 A20 ETH_RXD0_1
B21 GPIO1 / UART1_RTS1 GPIOB4/ANB4&CMPC_M1 X X A21 I2S0_MCLK
B22 GPIO2 / SDHC_D1 GPIOB5/ANB5&CMPC_M2 X X A22 I2S0_DOUT_SCLK