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SGH-E700 CircuitDescription
2-4
Thehardwaresequencerbuilt inthisdevice allowsplaying ofthe complexmusicwithoutgiving excessiveloadtothe
CPUoftheportabletelephones.Moreover,theregistersoftheFMsynthesizercan beoperated directlyfor real time
sound generation,allowing,forexample,utilization ofvarious sound effectswhen using thegamesoftwareinstalledinthe
portabletelephone.
YMU762 includesaspeakeramplifierwith high rippleremovalratewhosemaximumoutput is550mW(SPVDD=3.6V).
Thedevice isalsoequippedwithconventionalfunction including avibartorand a circuit forcontrolling LEDs
synchornouswithmusic.
Fortheheadphone,it isprovidedwithastereophonicoutput terminal.
Forthepurposeofenabling YMU762MA3to demonstarteitsfull capablities,Yamahapurposeto use"SMAF:Synthetic
musicMobileApplication Format"asadatadistribution format that iscompatiblewihtmultimedia.Since theSMAFtakes
astructurethatsetsimportance on thesynchronization betweensound and images,variouscontentscan bewrittenintoit
including incoming call melody withwordsthatcan beusedfortraning karaoke,and commercialchannel thatcombines
texts,imagesand sounds,and others.ThehardwaresequencerofYMU762MA3 directlyinterpretsand playsblocks
relevant tosysthesis(playing music and reproducing ADPCMwithFMsynthesizer) thatareincludedin datadistributedin
SMAF.
5.Memory
signalsintheOM6357 enabletwomemories.They useonly onevolt supply voltage,VDD3inthePCF50601.This
systemusesSamsung'smemory,KBB06A300M-T402.It isconsisted of128MbitsflashNORmemoryand 128Mbits
flashNAND memoryand 32MbitsUtRAM.Ithas16 bit dataline,HD[0~15]whichisconnectedtoOM6357 and
MV317S.Ithas23 bit address lines,HA[1~23].CS_NAND and NCSRAMsignalsischipselect.Wrting process,
HWR_Nislowand it enableswriting process toflashmemoryand SRAM.During reading process,HRD_Nislowand
it enablesreading process toflashmemoryand SRAM.EachchipselectsignalsintheOM6357 selectmemoryamong 2
flashmemoryand UtRAM.Reading orwriting procedureisprocessedafterHWR_NorHRD_Nisenabled.Memoriesuse
reset,whichisVDD3 delayfromPCF50601.HA[22]signalenableslowerbyteofSRAMand HA[22]signalenables
higherbyteofSRAM.
6.OM6357
OM6357 isconsisted ofARMcore and DSP core.Ithas8x1Kwordon-chip program/dataRAM,55 Kwords
on-chip programROMintheDSP.Ithas4K*32bitsROMand 2K*32bitsRAMintheARMcore.DSP isconsisted
ofKBS,JTAG,EMIand UART.ARMcoreisconsisted ofEMI,PIC(ProgrammableInterruptController),
reset/power/clock unit,DMAcontroller,TIC(TestInterface Controller),eripheralbridge,PPI,SSI(SynchronousSerial
Interface),ACC(Asynchronouscommunicationscontrollers),timer,ADC,RTC(Real-TimeClock)and keyboardinterface.
KBIO(0:7),address linesofDSP core and HD[0~15].HA[1~23],address linesofARMcore and HD[0~15],datalinesof
ARMcore are connectedtomemory,YMU759.MV317S(CameraDSP Chip)controlsthe communication betweenARM
core and DSP core.
CS_NAND,NCSRAM,NCSFLASHintheARMcore are connectedtoeachmemory.HWR_Nand HRD_Ncontrol the
process ofmemory.ExternalIRQ(InterruptReQuest)signalsfromeach units,suchas,PMUneedthe compatibleprocess.
KBIO[0~7] receivethestatusfromkeyand RXD0/TXD0/irDA_DOWNareusedforthe communicatiosusing IRDA and
datalink cable(DEBUG_DTR/RTS/TXD/RXD/CTS/DSR).
Ithas JTAG controlpins(TDI/TDO/TCK) forARMcore and DSP core.Itrecieves13MHz clockinCKIpinfrom
externalTCXO.ADC(Analog toDigitalConvertor) partreceivesthestatusoftemperature,batterytype and battery voltage.