Sony HTC-W555 User manual

– 1 –
HTC-W555
AEP Model
UK Model
E Model
Australian Model
Chinese Model
Tourist Model
SPECIFICATIONS
SERVICE MANUAL
COMPACT DISC DECK
Model Name Using Similar Mechanism HCD-H991AV
CD Mechanism Type CDM38-5BD29A
Base Unit Type BU-5BD29AL
Optical Pick-up Type KSS-213B/S-N
Model Name Using Similar Mechanism NEW
Tape Transport Mechanism Type TCM-230AWR1
CD
SECTION
TAPE
DECK
SECTION
HTC-W555isthedeckandCD
section in MHC-W555/W777.
MICROFILM

– 27 – – 28 –
HTC-W555
6-4. SCHEMATIC DIAGRAM – CD SECTION –
• See page 23 forWaveforms.
• See page 49 for IC Block Diagrams.
• See page 52 for IC Pin Functions.
(Page
35)

– 29 – – 30 –
HTC-W555
6-5. SCHEMATIC DIAGRAM – DECK SECTION –
• See page 51 for IC Block Diagrams.
(Page 36)

– 35 – – 36 –
HTC-W555
6-8. SCHEMATIC DIAGRAM – MAIN (1/2) SECTION –
(Page 46) (Page 46) (Page 28)
(Page 39)
(Page 30)
(Page 38)
(Page 38)
(Page 38)(Page 37)

– 37 – – 38 –
HTC-W555
6-9. SCHEMATIC DIAGRAM – MAIN (2/2) SECTION –
• See page 33 for PrintedWiring Board.
• See page 57 for IC Pin Functions.
(Page 35) (Page 36) (Page 36) (Page 36)
(Page 43)
(Page 43)
(Page 43)

– 39 –
6-11. SCHEMATIC DIAGRAM – LEAF SW SECTION –
6-10. PRINTED WIRING BOARD – LEAF SW SECTION –
• See page 15 for Circuit Boards Location.
(Page 33)
(Page 36)

– 43 – – 44 –
HTC-W555
6-13. SCHEMATIC DIAGRAM – PANEL SECTION –
(Page 43)
(Page 43)
(Page 43)

– 45 – – 46 –
HTC-W555
6-14. SCHEMATIC DIAGRAM – CD MOTOR SECTION –
• See page 51 for IC Block Diagrams.
(Page 35)
(Page 35)

– 49 –
6-16. IC BLOCK DIAGRAMS
• CD section
IC101 CXA1992AR
–
+
+
–
–
+
12 3 45 6 7 8 9 10
20
19
17
16
15
14
131211
21
22
23
24
25
26
27282930313233343536373839
40
41
42
43
44
45
46
52
51
50
49
48
47
+
–
+
–
+
–
+
–
–
+
–
+
–
+
+
–
+
–
+
–
+
–
–
+
+
–
–
+
–
+
+
–
+
–
+
–
+
–
+
–
+
––
+
–
+
–
+–
+
+
–
+
–
–
+
+
–
–
+
–
+
+
–
18
–
+
–
+
–
+
+
–
+
–
–
+
Charge
up
FEO
FEI
FDFCT
FGD
FLB
FE_O
FE_M
SRCH
TGU
TG2
FSET
TA_M
TA_O
SL_P
SL_M
SL_O
ISET
VCC
VCC
LOCK
CLK
XLT
DATA
XRST
C. OUT
SENS1
SENS2
FOK CC2 CC1 CB CP RF_I RF_O RF_M RFTC LD PD PD1 PD2
FE_BIAS
F
E
EI
VEE
TEO
LPFI
TEI
ATSC
TZC
VC
FZC
TM2
VEEVEE
TM3 TM5
TM4 TM6
VCC VCC
TM7
ISET
TTL
↓
IIL
IIL
↓
TTL
IIL
↓
TTL
IIL DATA REGISTER
INPUT SHIFT REGISTER
ADDRESS DECODER
SENS SELECTOR
OUTPUT DECODER
DFCTO IFB1-6
BAL1-4
TOG1-4
FS1-4 TG1-2 TM1-7 PS1-4
FOH
FOL
TGH
TGL
BALH
BALL
ATSC
TZC
FZC
FSET
TG2
VEE
VCC
FS1
FS2
FOCUS
PHASE COMPENSATION
DFCT
FS4
TRACKING
PHASE COMPENSATION
TG1
TM1
DFCT
FZC COMP.
VEE
VCC
VCC
TDFCT
TZC COMP.
ATSC
WINDOW
COMP.
E-F BALANCE
WINDOW COMP.
TRK. GAIN
WINDOW COMP.
FO. BIAS
WINDOW
COMP.
VEE
TGFL
TOG1
TOG2
TOG3
TOG4
BAL1
BAL2
BAL3
BAL4
IFB1
IFB2 IFB3
IFB4 IFB5
IFB6
FE AMP
VEE
E IV AMP
F IV AMP
VCC
APC
VCC
VEE
LASER POWER CONTROL
VEE
PD1 IV
AMP
PD2 IV
AMP
RF SUMMING
AMP
VCC
VEE
VEE
LEVEL S VEE
MIRR
VCC
DFCT
FOK
VCC
LDON LPCL LPC TGFL MIRR DFCT1 CC1

– 50 –
IC102 BA5941FP
IC103 CXD2519Q
+–
LEVEL SHIFT
+– +–
1 2 345678910 11 12 13 14
28 27
LEVEL SHIFT
+–
+
–
MUTE
+
–
+–
LEVEL SHIFT
+– +–
LEVEL SHIFT
+–
+
–
+
–
15
1617
18
19
21 20
22
26 25 24 23
+–
NC
Vcc
VccVcc
VCC
BIAS IN
IN1B IN1A IN2B IN2A
GND GND
MUTE
VCC
OUT2A OUT2B OUT1A OUT1B
IN4B IN4A IN3B IN3A OP OUT OP IN (–) OP IN (+) GND NC VCC OUT3A OUT3B OUT4A OUT4B
3RD-ORDER NOISE SHAPER
+
–
+
–
PWMPWM
+
–
+
–
VDD
VSS
LMUT
RMUT
TES2
CKOUT
SQCK
SQSO
SENS DATA
XLAT
CLOK
SEIN
CNIN
DATO
XLTO
CLKO
SPOA SPOB SPOC
SPOD
XLON
FOK
VDD
VSS
MON
MDP MDS
LOCK
PWMI
1 2 3456789 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30
LRCK
WDCK
ASYE
ASYO
ASYI
BIAS
RF
AVDD
CLTV
AVSS
FILI
FILO
PCO
VCTL
V16M
VCKI
VPCO1
VPCO2
TES1
TES0
43
42
41
40
39
38
37
36
35
34
33
32
31
50
49
48
47
46
45
44
NC
AVSS
AVDD
AOUT1
AIN1
LOUT1
AVSS
XVDD
XTAI
XTAO
XVSS
AVSS
LOUT2
AIN2
AOUT2
AVDD
AVSS
NC
NC
XRST
88
89
90
91
92
93
94
95
96
97
98
99
100
81
82
83
84
85
86
87
SYSM VDD VSS EXCK SBSO SCOR WFCK EMPHI EMPH DOUT C4M FSTT XTSL MNT0 MNT1 MNT3 XROF C2PO RFCK GFS XPCK XUGF GTOP VDD VSS BCKI BCK PCMDI PCMD LRCKI
71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51
80 79 78 77 76 75 74 73 72
ASYMMETRY
CORRECTOR
DIGITAL
PLL
CLOCK
GENERATOR
D / A
INTERFACE
DIGITAL CLV
SERIAL-IN
INTERFACE OVER SAMPLING
DIGITAL FILTER SUB CODE
PROCESSOR
TIMING
LOGIC CPU
INTERFACE
SERVO
AUTO
SEQUENCER
ERROR
CORRECTOR
16K RAM DIGITAL OUT
OSC
EFM
DEMODURATOR

– 51 –
• Deck section
IC602 uPC1330HA
IC701 M54641L
• CD motor section
IC801 BA6286N
1234567 8 9
INVERTER
COMPARATER
SW R1 GND SW P1 CONT GND VCC SW P2 GND SW R2
1
5
2
7
3
6
4
POWER
AMP.
POWER
AMP.
CONTROL
INPUT
AMP.
INPUT
AMP.
REG
8
VCC VCC
REFERENCE
OUT2
OUT1
IN1
IN2
GND
1
2
3
4
5
6
7
8
9
10
TSD CONTROL
LOGIC
PO WER
SAVE
GND
RIN
VREF
OUT2
RNF
GND
VM
VCC
FIN
OUT1