ST STM32F100 Series Installation and operating instructions

October 2010 Doc ID 16896 Rev 2 1/36
AN3127
Application note
CEC networking
using STM32F100xx value line microcontrollers
Introduction
STM32F100xx value line microcontrollers feature a high-definition multimedia interface
consumer electronics control (HDMI™-CEC) controller peripheral that supports the HDMI-
CEC v1.3a protocol. The HDMI-CEC controller provides a hardware support of this protocol,
and it supports the whole set of features offered with CEC devices.
This application note describes the CEC protocol software and hardware implementation
based on the HDMI-CEC controller. A real application example is also provided to illustrate
the software implementation.
www.st.com

Contents AN3127
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Contents
1 High-definition multimedia interface, consumer
electronics control (HDMI-CEC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
1.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
1.2 Frame description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
1.3 Bit timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
1.4 Device connectivity and addressing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
1.4.1 CEC communication . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
1.4.2 Enhanced DDC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
1.4.3 Hot plug detect (HPD) signal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
1.4.4 Physical address discovery . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
1.4.5 Discovery algorithm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
1.4.6 Logical addressing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
1.4.7 Logical address allocation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
1.5 STM32F100xx’s HDMI-CEC controller . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
1.5.1 Main features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
1.5.2 HDMI-CEC advanced features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
2 Hardware environment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
2.1 HDMI connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
2.1.1 I2C bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
2.2 Hardware connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
3 Firmware description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
3.1 Package directories . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
3.2 Firmware architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
4 Value line evaluation board CEC demonstration . . . . . . . . . . . . . . . . . 27
4.1 CEC demonstration overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
4.2 Device type selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
4.3 Physical address discovery . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
4.4 Logical address allocation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
4.5 Checking the connected devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
4.6 Displaying CEC send/receive information on the LCD . . . . . . . . . . . . . . . 30

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4.6.1 Receive information subscreen . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
4.6.2 Send information subscreen . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
5 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

List of tables AN3127
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List of tables
Table 1. Logical addresses. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Table 2. HDMI connector pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Table 3. STM32F100xx and HDMI-CEC connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Table 4. High-level functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Table 5. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

AN3127 List of figures
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List of figures
Figure 1. CEC frame format. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 2. Message structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 3. Blocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Figure 4. Bit timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Figure 5. Follower acknowledge (ACK) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Figure 6. CEC and DDC line connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Figure 7. Addresses within a HDMI cluster . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 8. Physical address discovery algorithm. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 9. System exits Stop mode when data reception starts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 10. HDMI cable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 11. Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 12. Electrical schematic proposal for STM32100B-EVAL. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 13. Electrical schematic proposal for STM32100E-EVAL. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 14. Example of a hardware connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 15. Package directory structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 16. Firmware architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Figure 17. CEC demonstration flowchart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Figure 18. Device type selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Figure 19. Physical and logical addresses display . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Figure 20. CEC menu . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Figure 21. Receive flowchart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Figure 22. Receive information subscreen . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Figure 23. Send flowchart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Figure 24. Select CEC command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

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Glossary of terms
Broadcast message: a message sent to logical address 15 that all devices are expected to
receive.
Destination: the target device for a CEC message.
Follower: a device that has just received a CEC message and is required to respond to it.
Initiator: the device that is sending, or has just sent, a CEC message and, if appropriate, is
waiting for a follower to respond.
Logical address: a unique address assigned to each device.
Menu-providing device: a non-display device that may render a menu on TV.
Playback device: a device that has the ability to play media, like a DVD player.
Recording device: a device that has the ability to record a source such as an internal tuner
or an external connection.
Source device: a device that is currently providing an AV stream via HDMI.
Tuner device: a device that contains a tuner, e.g. an STB (set-top box) or a recording
device.
TV: a device with a HDMI input that has the ability to display the input HDMI signal.
Generally it has no HDMI output.
CEC: consumer electronics control.
DDC: display data channel.
E-DDC: enhanced display data channel.
EDID: extended display identification data.
E-EDID: enhanced extended display identification data.
HDMI: high-definition multimedia Interface.
(HDMI) source: a device with a HDMI output.
(HDMI) sink: a device with a HDMI input.

AN3127 High-definition multimedia interface, consumer electronics control (HDMI-CEC)
Doc ID 16896 Rev 2 7/36
1 High-definition multimedia interface, consumer
electronics control (HDMI-CEC)
1.1 Introduction
Consumer electronics control (CEC) is the appendix supplement 1 to the HDMI (high-
definition multimedia interface) standard.
It is a protocol that provides high-level control functions between all of the various
audiovisual products in a given environment. It is specified to operate at low speeds with
minimum processing and memory overhead.
For more details, refer to the high-definition multimedia interface specification available from
www.hdmi.org.
1.2 Frame description
The CEC bus is a single-wire protocol that can connect up to 10 audiovisual devices through
standard HDMI cabling.
All transactions on the CEC line consist of an initiator and one or more followers. The
initiator is responsible for sending the message structure and the data. The follower is the
recipient of any data and is responsible for setting any acknowledgement bits.
A message is conveyed in a single frame that consists of a start bit followed by a header
block and, optionally, an opcode and a variable number of operand blocks. Figure 1 shows a
CEC frame format.
Figure 1. CEC frame format
Figure 2. Message structure
Start bit
01101101 0-
EOM ACKInitiator Destination
Header block
Header block Databock 1 Datablock n
10 bits10 bits10 bits
Initiator address = 0x6
Destination address = 0xD
Example of Header block:
11100101 0 -
EOM ACK Data
Data block
Data= 0xE5
Example of Datablock:
ai15931
3TART
HIGH (EADER /PCODE /PERAND /PERAND
TOOPERANDS
HIGH
IMPEDANCE BIT IMPEDANCE
AI

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Figure 3. Blocks
All these blocks are made of an 8-bit payload (most significant bit transmitted first) followed
by an end-of-message (EOM) bit and an acknowledge (ACK) bit.
The EOM bit is set in the last block of a message and kept cleared in all others. If a message
contains additional blocks after the EOM, these blocks should be ignored. The EOM bit may
be set in the header block to “ping” other devices and make sure that they are active.
The acknowledge bit is always brought to high impedance by the initiator. It can therefore be
driven low by either the follower that has read its own address in the header, or the follower
that needs to reject a broadcast message.
The header consists of the source logical address field, and the destination logical address
field. Note that the address 0xF is specially used for broadcast messages.
1.3 Bit timing
The format of the start bit is unique and identifies the start of a message. It should be
validated by its low duration and its total duration.
All remaining data bits in the message, after the start bit, have a consistent timing. The high-
to-low transition at the end of the data bit is the start of the next data bit except for the final
bit where the CEC line remains high.
Figure 4 shows the timings of the start bit and the different data bits.
Figure 4. Bit timings
%/- !#+

$%34).!4)/.;=).)4)!4/2;=
(EADERBLOCK
%/- !#+

$!4!;=
/PCODE/PERANDBLOCK
AI
3TARTBIT
HIGHIMPEDANCE
LOWIMPEDANCE
MSMS
MSMS
$ATABIT
HIGHIMPEDANCE
LOWIMPEDANCE
MSMS
MSMS
).)4)!4/2LOGICAL
$ATABIT
HIGHIMPEDANCE
LOWIMPEDANCE
MSMS
MSMS
).)4)!4/2LOGICAL
AI

AN3127 High-definition multimedia interface, consumer electronics control (HDMI-CEC)
Doc ID 16896 Rev 2 9/36
CEC Figure 5 shows an example bit with both initiator and follower where the follower may
assert the bit to logical 0 to acknowledge a data block. The initiator outputs a logical 1, thus
allowing the follower to change the CEC state by pulling the control line low for the duration
of the safe sample period.
Figure 5. Follower acknowledge (ACK)
1.4 Device connectivity and addressing
1.4.1 CEC communication
By definition the HDMI system architecture consists of sources and sinks. A given device
may have one or more HDMI input(s) and output(s). Each HDMI input on the device should
follow all the rules for a HDMI sink and each HDMI output should follow all the rules for a
HDMI source.
The DDC is used for configuration and status exchange between a single source and a
single sink. The optional CEC protocol provides high-level control functions between all of
the various audiovisual products in a user’s environment.
Figure 6. CEC and DDC line connections
HIGHIMPEDANCE
LOWIMPEDANCE
HIGHIMPEDANCE
LOWIMPEDANCE
AI
MS
MS
MS
MSMAX
$ATABITINITIATORLOGICAL
$ATABITFOLLOWERLOGICAL

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Figure 7. Addresses within a HDMI cluster
1.4.2 Enhanced DDC
The enhanced DDC described in this section is defined in VESA “ENHANCED DISPLAY
DATA CHANNEL STANDARD Version 1 (September 2, 1999)”. All sinks are required to
support these enhanced DDC features. If the E-EDID structure of a sink is longer than 256
bytes, it should support the segment pointer.
Timing
Data is synchronized with the SCL signal and timing should comply with the Standard Mode
of the I2C specification (100 kHz maximum clock rate).
The I2C bus is a standard two-wire (clock and data) serial databus protocol. Refer to the I2C
specification for details.
Note that a HDMI sink may hold off the DDC transaction by stretching the SCL line during
the SCL-low period following the Acknowledge bit as permitted by the I2C specification. All
HDMI sources should delay the DDC transaction while the SCL line is being held low.
Data transfer protocols
The source should use I2C commands to read information from a sink’s E-EDID with a slave
address.
In Enhanced DDC, a segment pointer is used to address the E-EDID outside the 256 bytes
normally addressable by the 0xA0/0xA1 addresses. The Enhanced DDC protocol sets the
segment pointer before the remainder of the DDC command.