Tews Technologies TPMC463 User manual

The Embedded I/O Company
TPMC463
4 Channel Serial Interface RS232/RS422
Version 1.0
User Manual
Issue 1.0.12
May 2020
TEWS TECHNOLOGIES GmbH
Am Bahnhof 7 25469 Halstenbek, Germany
Phone: [phone] Fax: [phone]
e-mail: [e-mail] www.tews.com

TPMC463 User Manual Issue 1.0.12 Page 2 of 25
TPMC463-10R
4 Channel Serial RS232, front panel and P14 I/O
TPMC463-11R
4 Channel Serial RS422, front panel and P14 I/O
TPMC463-12R
2 Channel Serial RS232, 2 Channel Serial
RS422, front panel and P14 I/O
TPMC463-20R
4 Channel Serial RS232, front panel and P14 I/O
with non-standard RJ45 I/O pinout
This document contains information, which is
proprietary to TEWS TECHNOLOGIES GmbH. Any
reproduction without written permission is forbidden.
TEWS TECHNOLOGIES GmbH has made any
effort to ensure that this manual is accurate and
complete. However TEWS TECHNOLOGIES GmbH
reserves the right to change the product described
in this document at any time without notice.
TEWS TECHNOLOGIES GmbH is not liable for any
damage arising out of the application or use of the
device described herein.
Style Conventions
Hexadecimal characters are specified with prefix 0x,
i.e. 0x029E (that means hexadecimal value 029E).
For signals on hardware products, an ‚Active Low’ is
represented by the signal name with # following, i.e.
IP_RESET#.
Access terms are described as:
W Write Only
R Read Only
R/W Read/Write
R/C Read/Clear
R/S Read/Set
2020 by TEWS TECHNOLOGIES GmbH
All trademarks mentioned are property of their respective owners.

TPMC463 User Manual Issue 1.0.12 Page 3 of 25
Issue Description Date
1.0 First Issue October 2004
1.1 Expanded Configuration EEPROM data November 2004
1.2 Expanded Configuration EEPROM data, I/O pinout clarification April 2005
1.3 Back I/O pinout correction, included -2x modules July 2005
1.4 Front I/O pinout clarification September 2005
1.5 Configuration EEPROM data & Pinout clarification October 2005
1.6 Channel numbering clarification August 2006
1.7 New address TEWS LLC September 2006
1.8 Front I/O pinout correction in chapter “Technical Specification” June 2007
1.0.9 New notation for HW Engineering Documentation Releases December 2008
1.0.10 Clarified the difference between front- and back-I/O RS422 signals August 2010
1.0.11 General Revision August 2014
1.0.12 Fixed typos
Corrected “Size” in “Table 3 1: XR17D154 Local Space Configuration”
May 2020

TPMC463 User Manual Issue 1.0.12 Page 4 of 25
Table of Contents
1 PRODUCT DESCRIPTION......................................................................................... 6
2 TECHNICAL SPECIFICATION................................................................................... 7
3 LOCAL SPACE ADDRESSING.................................................................................. 9
3.1 XR17D154 Local Space Configuration..........................................................................................9
3.2 Device Configuration Space ..........................................................................................................9
3.2.1 UART Register Sets............................................................................................................10
3.2.2 Device Configuration Registers ..........................................................................................11
3.2.3 UART Channel Configuration Registers .............................................................................12
4 XR17D154 TARGET CHIP ....................................................................................... 14
4.1 PCI Configuration Registers (PCR) .............................................................................................14
4.2 Configuration EEPROM ................................................................................................................15
5 CONFIGURATION HINTS ........................................................................................ 17
6 PROGRAMMING HINTS .......................................................................................... 18
6.1 UART Baud Rate Programming...................................................................................................18
7 PIN ASSIGNMENT – I/O CONNECTOR .................................................................. 20
7.1 Front Panel I/O Connector (TPMC463-1xR)................................................................................20
7.2 Front Panel I/O Connector (TPMC463-2xR)................................................................................21
7.3 Serial Channel to Front Panel Port Mapping..............................................................................21
7.4 Back I/O PMC Connector (P14)....................................................................................................22
7.4.1 TPMC463-10R ....................................................................................................................22
7.4.2 TPMC463-11R ....................................................................................................................23
7.4.3 TPMC463-12R ....................................................................................................................24
7.4.4 TPMC463-20R ....................................................................................................................25

TPMC463 User Manual Issue 1.0.12 Page 5 of 25
List of Figures
FIGURE 1-1 : BLOCK DIAGRAM......................................................................................................................6
FIGURE 7-1 : I/O CONNECTOR PINOUT ......................................................................................................20
FIGURE 7-2 : I/O CONNECTOR PINOUT ......................................................................................................21
List of Tables
TABLE 2-1 : TECHNICAL SPECIFICATION.....................................................................................................8
TABLE 3-1 : XR17D154 LOCAL SPACE CONFIGURATION...........................................................................9
TABLE 3-2 : DEVICE CONFIGURATION SPACE ............................................................................................9
TABLE 3-3 : UART REGISTER SET OFFSET ...............................................................................................10
TABLE 3-4 : UART REGISTER SET...............................................................................................................10
TABLE 3-5 : DEVICE CONFIGURATION REGISTERS .................................................................................11
TABLE 3-6 : UART CHANNEL CONFIGURATION REGISTERS...................................................................12
TABLE 4-1 : PCI HEADER ..............................................................................................................................14
TABLE 4-2 : CONFIGURATION EEPROM TPMC463-XX..............................................................................15
TABLE 4-3 : PHYSICAL CONFIGURATION EEPROM DATA .......................................................................16
TABLE 5-1 : UART INTERFACE MAPPING ...................................................................................................17
TABLE 6-1 : UART BAUD RATE PROGRAMMING .......................................................................................18
TABLE 7-1 : PIN ASSIGNMENT RJ45 FRONT PANEL I/O CONNECTOR ...................................................20
TABLE 7-2 : PIN ASSIGNMENT RJ45 FRONT PANEL I/O CONNECTOR ...................................................21
TABLE 7-3 : SERIAL CHANNEL TO FRONT PANEL PORT MAPPING........................................................21
TABLE 7-4 : TPMC463-10R PIN ASSIGNMENT BACK I/O PMC CONNECTOR (P14) ................................22
TABLE 7-5 : TPMC463-11R PIN ASSIGNMENT BACK I/O PMC CONNECTOR (P14) ................................23
TABLE 7-6 : TPMC463-12R PIN ASSIGNMENT BACK I/O PMC CONNECTOR (P14) ................................24
TABLE 7-7 : TPMC463-10R PIN ASSIGNMENT BACK I/O PMC CONNECTOR (P14) ................................25

TPMC463 User Manual Issue 1.0.12 Page 6 of 25
1 Product Description
The TPMC463 is a standard single-width 32 bit PMC module and offers 4 channels of high
performance serial interface.
Three different standard modules are available: The TPMC463-10R provides 4 RS232 interfaces. The
TPMC463-11R provides 4 RS422 interfaces. The TPMC463-12R provides 2 RS232 and 2 RS422
interfaces.
The TPMC463-20R provides 4 RS232 interfaces with non standard RJ45 I/O pinout (as used on
Motorola CPU boards).
Other configurations are available as factory build option on a per channel base.
All modules offer front panel I/O with four RJ45 connectors and P14 I/O. Each RS232 channel
supports TxD, RxD, CTS, RTS, DTR, CD, DSR/RI and GND. Each RS422 channel supports RxD+/-,
TxD+/- and GND on front and RxD+/-, TxD+/-, RTS+/- and CTS+/- on back I/O.
Each channel has 64 byte transmit and receive FIFOs to significantly reduce the overhead required to
provide data to and get data from the transmitters and receivers. The FIFO trigger levels are
programmable and the baud rate is individually programmable up to 921.6 kbps for RS232 channels
and 5.5296 Mbps for RS422 channels. The UART offers readable FIFO levels.
All channels generate interrupts on PCI interrupt INTA. For fast interrupt source detection the UART
provides a special Global Interrupt Source Register.
All serial channels use ESD protected transceivers. ESD protection is up to ±15KV.
The TPMC463 can operate with 3.3V and 5.0V PCI I/O signaling voltage.
Figure 1-1 : Block Diagram

TPMC463 User Manual Issue 1.0.12 Page 7 of 25
2 Technical Specification
PMC Interface
Mechanical Interface PCI Mezzanine Card (PMC) Interface
Single Size
Electrical Interface PCI Rev. 2.3 compliant
33 MHz / 32 bit PCI
3.3V and 5V PCI Signaling Voltage
On Board Devices
PCI Target Chip XR17D154 (Exar)
Quad UART XR17D154 (Exar)
Transceiver RS232: MAX3245E (or equivalent)
RS422: MAX3087E (or equivalent)
I/O Interface
Interface Type Asynchronous serial interface
Number of Channels 4
Physical Interface TPMC463-10R: 4 RS232
TPMC463-11R: 4 RS422
TPMC463-12R: 2 RS232, 2 RS422
TPMC463-20R: 4 RS232
Serial Channel I/O Signals RS232: TxD, RxD, RTS, CTS, DTR, CD, DSR/RI, GND
RS422 (front I/O): TxD+/-, RxD+/-, GND
RS422 (back I/O): TxD+/-, RxD+/-, RTS+/-, CTS+/-, GND
I/O Connector 4x RJ45 Modular Jack (AMP 406 732-1)
PMC P14 I/O (64 pin Mezzanine Connector)
Front I/O Pinout RS232 (TPMC463-10R/-12R): Compliant to TIA/EIA-561 (EIA-
232D)
RS232 (TPMC463-20R): Compliant to TIP866-TM-20
Termination RS422: 120Ω between RxD+/- and CTS+/- of each channel
Programmable Baud Rates RS232: up to 921.6 kbps
RS422: up to 5.5296 Mbps
ESD Protection RS232:
±15kV—Human Body Model
±8kV—IEC 1000-4-2, Contact Discharge
±15kV—IEC 1000-4-2, Air-Gap Discharge
RS422:
±15kV—Human Body Model

TPMC463 User Manual Issue 1.0.12 Page 8 of 25
Physical Data
Power Requirements TPMC463-10R: 30 mA typical @ +5V DC (no load)
TPMC463-11R: 40 mA typical @ +5V DC (no load)
TPMC463-12R: 35 mA typical @ +5V DC (no load)
TPMC463-20R: 30 mA typical @ +5V DC (no load)
Temperature Range Operating
Storage
-40°C to +85°C
-55°C to +125°C
MTBF TPMC463-10R: 370 000 h
TPMC463-11R: 320 000 h
TPMC463-12R: 350 000 h
TPMC463-20R: 370 000 h
MTBF values shown are based on calculation according to MIL-HDBK-217F and
MIL-HDBK-217F Notice 2; Environment: GB20°C.
The MTBF calculation is based on component FIT rates provided by the
component suppliers. If FIT rates are not available, MIL-HDBK-217F and
MIL-HDBK-217F Notice 2 formulas are used for FIT rate calculation.
Humidity 5 – 95 % non-condensing
Weight 66 g
Table 2-1 : Technical Specification

TPMC463 User Manual Issue 1.0.12 Page 9 of 25
3 Local Space Addressing
XR17D154 Local Space Configuration3.1
The local on board addressable regions are accessed from the PCI side by using the XR17D154 local
space.
XR17D154 PCI Base
Address
(Offset in PCI
Configuration
Space)
PCI
Space
Mapping
Size
(Byte)
Port
Width
(Bit)
Endian
Mode
Description
0 (0x10) MEM 2048 32 BIG Device Configuration
Space
Table 3-1 : XR17D154 Local Space Configuration
Device Configuration Space3.2
PCI Base Address: XR17D154 PCI Base Address 0 (Offset 0x10 in PCI Configuration
Space).
The TPMC463 uses the Exar XR17D154 Quad UART to provide and control the 4 channels.
Device Configuration Space
Content
PCI Address Size
(Bit)
UART 0 Register Set PCI Base Address 0 + (0x0000 to 0x007F) 32
Device Configuration Registers PCI Base Address 0 + (0x0080 to 0x009F) 32
UART 0 Register Set PCI Base Address 0 + (0x0100 to 0x01FF) 32
UART 1 Register Set PCI Base Address 0 + (0x0200 to 0x03FF) 32
UART 2 Register Set PCI Base Address 0 + (0x0400 to 0x05FF) 32
UART 3 Register Set PCI Base Address 0 + (0x0600 to 0x07FF) 32
Table 3-2 : Device Configuration Space
All registers can be accessed in 8, 16 or 32 bit width with exception to one special case: When reading
the receive data together with its LSR register content, the host must read them in 16 or 32 bits format
in order to maintain integrity of the data byte with its associated error flags.

TPMC463 User Manual Issue 1.0.12 Page 10 of 25
3.2.1 UART Register Sets
The Device Configuration Space provides a register set for each of the 4 UARTs.
UART Register Set Register Set Offset
Serial Channel 0 0x0000
Serial Channel 1 0x0200
Serial Channel 2 0x0400
Serial Channel 3 0x0600
Table 3-3 : UART Register Set Offset
Offset Address Description Access Data Width
0x000 – 0x00F UART Channel Configuration Registers
First 8 registers are 16550 compatible
R/W 8, 16, 32
0x010 – 0x07F Reserved - -
0x080 – 0x093 Channel 0: Device Configuration Registers
All other channels: Reserved
R/W 8, 16, 32
0x094 – 0x0FF Reserved - -
0x100 Read FIFO – 64 bytes of RX FIFO data R 8, 16, 32
Write FIFO – 64 bytes of TX FIFO data W 8, 16, 32
0x140 – 0x17F Reserved - -
0x180 – 0x1FF Read FIFO with errors –
64 bytes of RX FIFO data + LSR
R 16, 32
Table 3-4 : UART Register Set