Texas Instruments TIDA-010243 Guide

Design Guide: TIDA-010243
Cost-Effective, 3-Phase CT Electricity Meter Reference
Design Using Standalone ADC
Description
This reference design implements Class 0.1
three-phase energy measurement using a high-
performance, multichannel analog-to-digital converter
(ADC), which samples current transformers (CT)
at 8 kHz to measure the current and voltage of
each leg of the AC mains. The reference design
achieves high accuracy across a wide input current
range (0.01 A – 100 A) and supports high sampling
frequencies necessary for power quality features such
as individual harmonic analysis. An ADC sample
rate of 32 kSPS can be achieved when using a TI
Arm® Cortex®-M0+ host microcontroller for metrology.
The necessary software functionality is implemented
by porting the ADC Energy Metrology library to
MSPM0G3507 and can be compiled with Code
Composer Studio™.
Resources
TIDA-010243 Design Folder
MSPM0G3507, ADS131M08 Product Folder
THVD1400, TRS3232E, TPS3840 Product Folder
TMAG5273, ISO6731, ISO6720 Product Folder
Ask our TI E2E™ support experts
Features
• 3-phase metrology for electricity meters that meets
ANSI C12.20 Class 0.1 active energy accuracy
requirements across 2000:1 input range
• Active and reactive energy and power, root mean
square (RMS) current and voltage, power factor,
and line-frequency calculations
• Isolated RS-232 and RS-485 with 5-kVRMS
isolation
• Tested across 10 mA to 100 A and 9-V to 270-V
input range
• Software for energy metrology and displaying
results on a Microsoft® Windows® PC GUI
Applications
•Electricity meter
•Power quality meter
•Power quality analyzer
ADS131M08
Load
MSPM0G1107
Source from Utility
16.384
MHz XTAL

ADC
Control +
Serial
Interface
MSP430
FR4131
UART1 TX
UART1 RX
UART2 TX
UART2 RX
RS-232
Connection
ISO6731
VCC
GND TPS709
TRS3232E
DTR
RTS
RGND
RS232_VCC
RS232_GND
Board Header to
External Radio/
Radio Module
GND
GPIO
THVD1400 RS-485
Connection
GPIO
RE
WE RGND
VCC3
VCC
GND
DVCC
DVSS
TPS3840
RESET
CT
GND
RST/NMI
SCLK
DIN
DOUT
DRDY
SPI POCI
GPIO
Interruptible GPIO
SPI CLK
SPI PICO
CLKIN CLKOUT
RESET
CSn
VDD
GND
HFXIN
HFXOUT
VCC
UART3 TX
UART3 RX
GND
Current C
Voltage C
Voltage C
Voltage C
Phase A
Phase B
Phase C
CT #1
CT #2
CT #3
Current A

ADC
Current A

ADC

ADC

ADC

ADC

ADC

ADC
Button
1
Button
2
ADC_CLKIN
10980.4 kWh
ISO6720
ACT
REACT
ISO-ACT
ISO-REACT
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1 System Description
1.1 End Equipment
Electricity meters and Power quality meters are two popular system designs for accurate energy measurement
in compliance with IEC and ANSI standards. The energy measurement is the basic functionality for both and
calculates various metrology parameters. Some of the parameters are included in the following list:
• Total and per-phase active (kWh), reactive (kvarh), and apparent energy (kVAh) with pulse-generation
outputs
• Total and per-phase active (kW), reactive (kvar), and apparent power (kVA)
• Per-phase voltage and current root mean square (RMS)
• Line frequency
Typical sensors used are either current transformers (CT), shunts, or Rogowski coils.
In addition, multiple power quality parameters in a polyphase energy measurement system can be also
calculated, including:
• Per-phase voltage total harmonic distortion (THD)
• Per-phase current THD
• Voltage phase-to-phase angle
• Per-phase zero crossing
TIDA-010243 is a Class 0.1 high-accuracy 3-phase CT electricity meter reference design, using a single
8-channel standalone ADS131M08 ADC and cost-effective MSPM0G3507 MCU. The reference design can also
be used for energy metering in popular products such as Level 2 EV chargers and AC wallboxes.
1.2 Electricity Meter
Utility providers and their customers are driving the need for more features from electricity meters. Advanced
features, such as harmonic analysis, are increasingly being required from meters which mandates higher
processing and accuracy requirements for the MCUs. As an example, adding harmonic analysis capabilities
to an electricity meter can require an increase in the sample rate of the meter to capture the desired frequency
range. Often such increases in sample frequency must be done without compromising on accuracy, while the
higher sample rate, in turn, also requires more processing.
As both the accuracy requirements and amount of processing expected from electricity meters rapidly
increase, it becomes more and more difficult to solve this with a single metrology system on chip (SoC). A
common solution to this problem is to utilize a dual-chip approach with a standalone ADC and a standard
host microcontroller (MCU). Using an accurate state-of-the-art standalone ADC typically has the following
advantages:
• Enables meeting the most stringent of accuracy requirements
• Enables meeting minimum sample rate requirements (without compromising on accuracy) that cannot be
obtainable with application-specific products or metrology SoCs
• Enables flexibility in selecting the host microcontroller, because the MCU only needs to meet the application
requirements, such as processing capability, minimum RAM and Flash storage for logging energy usage, and
microcontroller security features for ensuring meter data security
To properly sense energy consumption, voltage and current sensors translate mains voltage and current to a
voltage range that an ADC can sense. To sense the energy consumption when a multiphase distribution system
is used, it is necessary for the current sensors to be isolated so the sensors can properly determine the current
drawn from the two different lines without damaging the ADC. As a result, current transformers, which inherently
have isolation, have historically been used for the current sensors for split-phase, two-phase, and three-phase
electricity meters.
In this reference design, Class 0.1 three-phase CT-based energy measurement is implemented by using a
standalone ADC device, which senses the mains voltage and current. When there are new ADC samples
available, the host MCU communicates to the standalone ADC via SPI bus to read out the new samples and
calculate multiple metrology parameters. In addition, the host also communicates to a PC GUI through either the
isolated RS-232 circuitry or isolated RS-485 circuitry on the board. As an additional safeguard, an external SVS
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device is added to the design to reset the host MCU when the supplied voltage to power the host MCU is not
sufficient. In general, using an (optional) external supply voltage supervisor (SVS) provides more security than
the internal SVS on a host microcontroller.
In this design, the test software specifically supports calculation of various metrology parameters for 3-phase
energy measurement. These parameters can be viewed either from the calibration GUI or on an optional LCD
display. The key parameters calculated during energy measurements are:
• Active, reactive, apparent power, and energy
• RMS current and voltage
• Power factor
• Line frequency
1.3 Power Quality Meter, Power Quality Analyzer
Except being used for electricity meters, this standalone ADC architecture applies also for power quality
analyzers and power quality meters and EV chargers or wallboxes. This end equipment is used to monitor
and control power quality by measuring certain power quality parameters, such as voltage harmonics, current
harmonics, supply voltage dips, supply voltage swells, and other parameters as well. For all equipment, a lot of
computation is required for calculating the power quality parameters. Also, accuracy is important to be able to
meet the accuracy requirements for the different power quality parameters. The requirement for high accuracy
and computation power is something well supported by having a standalone ADC and separate host MCU or
processor, as is done in this design.
A couple of the parameters commonly measured by power quality meters and power quality analyzers are
voltage and current harmonics. For the most accurate harmonic calculations, implement coherent sampling.
One way of implementing coherent sampling is to vary the sampling clock based on the Mains frequency. The
standalone ADC in this design has the ability to take in a varying clock so the ADC can support coherent
sampling. Although the clock to the standalone ADC in this design can be varied, this design cannot support
coherent sampling because the sampling clock from the host MCU to the standalone ADC cannot be varied with
the proper resolution.
1.4 Key System Specifications
Table 1-1. Key System Specifications
FEATURES DESCRIPTION
Number of phases 3 (each phase measures voltage and current through CT)
Accuracy class Class 0.1
Current sensor Current transformer
Tested current range 0.01 – 100 A
Tested voltage range 15 V – 240 V
ADS131M08 CLKIN frequency 8,192,000 Hz
ADS131M08 Delta-sigma modulation clock frequency 4,096,000 Hz (= CLKIN / 2)
SPI Clock 19,968,000 Hz
Oversampling ratio (OSR) 512
Digital filter output sample rate 8,000 samples per second
Phase compensation implementation Software
Phase compensation resolution 0.0088° at 50 Hz or 0.0105° at 60 Hz
Selected CPU clock frequency 79.87 MHz
MCU External SVS voltage 1.72 – 1.74 V
System nominal frequency 50 or 60 Hz
Measured parameters
• Active, reactive, apparent power and energy
• Root mean square (RMS) current and voltage
• Power factor
• Line frequency
Update rate for measured parameters Approximately equal to 1 second
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Table 1-1. Key System Specifications (continued)
FEATURES DESCRIPTION
Communication options
• LCD
(Controlled by MSP430FR4131, not implemented in software yet)
• PC GUI via 5 kVRMS isolated RS-232 or 5 kVRMS isolated RS-485
Utilized LEDs Total active energy and total reactive energy
Board power supply 3.3 V directly to DVCC rail
2 System Overview
2.1 Block Diagram
TIDA-010243 Block Diagram, Three-Phase + Neutral Configuration depicts the block diagram of the high-level
interface used for an ADS131M08-based three-phase energy measurement application. For each phase, the
line-to-neutral voltage is directly measured, as well as the current for each line (3 phases) and the current thru
the N (neutral) wire.
In the TIDA-010243 block diagram, a current transformer (CT) connects to each current channel and a simple
voltage divider is used for dividing down the corresponding voltage of each channel. Each CT has an associated
burden resistor that must be connected at all times to protect the measuring device. The selection of the CT and
the burden resistor is made based on the manufacturer and current range required for energy measurements.
The choice of voltage divider resistors for the voltage channel is selected to make sure the Mains voltage is
divided down to adhere to the normal input ranges of the ADS131M08 device. Since the ADS131M08 ADCs
have a large dynamic range and a large dynamic range is not needed to measure voltage, the voltage front-end
circuitry is purposely selected so that the maximum voltage seen at the inputs of the voltage channel ADCs are
only a fraction of the full-scale voltage.
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ADS131M08
Load
MSPM0G1107
Source from Utility
16.384
MHz XTAL

ADC
Control +
Serial
Interface
MSP430
FR4131
UART1 TX
UART1 RX
UART2 TX
UART2 RX
RS-232
Connection
ISO6731
VCC
GND TPS709
TRS3232E
DTR
RTS
RGND
RS232_VCC
RS232_GND
Board Header to
External Radio/
Radio Module
GND
GPIO
THVD1400 RS-485
Connection
GPIO
RE
WE RGND
VCC3
VCC
GND
DVCC
DVSS
TPS3840
RESET
CT
GND
RST/NMI
SCLK
DIN
DOUT
DRDY
SPI POCI
GPIO
Interruptible GPIO
SPI CLK
SPI PICO
CLKIN CLKOUT
RESET
CSn
VDD
GND
HFXIN
HFXOUT
VCC
UART3 TX
UART3 RX
GND
Current C
Voltage C
Voltage C
Voltage C
Phase A
Phase B
Phase C
CT #1
CT #2
CT #3
Current A

ADC
Current A

ADC

ADC

ADC

ADC

ADC

ADC
Button
1
Button
2
ADC_CLKIN
10980.4 kWh
ISO6720
ACT
REACT
ISO-ACT
ISO-REACT
Figure 2-1. TIDA-010243 Block Diagram, Three-Phase + Neutral Configuration
By reducing the voltage fed to the three ADS131M08 voltage ADC channels, voltage to current crosstalk, which
actually affects metrology accuracy more than voltage ADC accuracy, is reduced at the cost of voltage accuracy,
thereby resulting in more accurate energy measurements at lower currents.
The ADS131M08 device interacts with the MSPM0+ MCU in the following manner:
1. The CLKIN clock used by the ADS131M08 device is provided from the M0_CLKOUT clock signal output of
the MSPM0G3507 MCU.
2. The ADS131M08 device divides the clock provided on the CLKIN pin by two and uses this divided clock as
the delta-sigma modulation clock.
3. When new ADC samples are ready, the ADS131M08 device asserts the DRDY pin, which alerts the
MSPM0+ MCU that new samples are available.
4. After being alerted of new samples, the MSPM0+ MCU uses one of the SPIs and two of the DMA channels
in the DMA module to get the voltage and current samples from the ADS131M08 device.
The optional TPS3840 device is used as an external SVS for the MSPM0+ MCU. Although the MSPM0+ MCU
has internal Power-on reset (POR) and POR as well as a Brownout reset (BOR) supply monitor with four
configurable threshold voltages, the external TPS3840 standalone SVS adds redundancy in case of a power
failure.
Other signals of interest in Figure 2-1 are the active and reactive energy pulses used for accuracy measurement
and calibration. The ISO6720 device provides an isolated connection for these pulses for connecting to
non-isolated equipment. This design also supports isolated RS-232 communication through the use of the
TPS70933, ISO6731B, and TRS3232E devices. The hardware uses a push switch to select between the RS-485
interface, with ISO6731 and THVD1400 devices, or the RS-232 interface with TRS3232E.
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The design can be powered either by applying 3.3 V at TP6 and GND at TP1 directly or by connecting 3.3 V and
GND to the Application Board Connector J13. See Header Names and Jumper Settings for more details on the
proper jumper connections for powering the board for both options.
2.2 Design Considerations
2.2.1 External Supply Voltage Supervisor (SVS) With TPS3840
The TPS3840 device is an external supply voltage supervisor (SVS) that is used to externally reset the MSPM0+
MCU. The TPS3840 maintains very low quiescent current, which enables this device to still be used if there is a
power outage and the meter is running from a backup battery. The MSPM0+ MCU has internal POR and BOR
supply monitors which cannot be disabled and suffices for this application; however, using the optional external
SVS adds redundancy to SVS, in case some issue has affected the MCU itself.
In this design, the TPS3840DL20 device variant is specifically used, which has a negative-voltage threshold
voltage of 1.72 ±1% V. When the voltage rail that powers the MSPM0+ MCU drops below 1.74 V, the TPS3840
device resets the MSPM0+ MCU. When the monitored voltage rises above the undervoltage threshold plus
hysteresis voltage value (approximately equal to 1.85 V total), the RESET pin of the TPS3840 is pulled back
high after a user-defined reset delay time, tD, elapses. The tD is determined based on the value of the capacitor
connected to the CT pin of the TPS3840 device.
The TPS3840 device is available with both push-pull and open-drain outputs. The open-drain output version
TPS3840DL20 is specifically selected for this design since a 47-kΩ pullup resistor is recommended in the JTAG
circuitry of the MSPM0+ MCU.
2.2.2 Magnetic Tamper Detection With TMAG5273 Linear 3D Hall-Effect Sensor
One common nonintrusive way to steal electricity is to apply a strong permanent magnet or an AC magnet near
the electricity meter, thus tampering with the meter. A permanent magnet or an AC magnetic field can affect
meter components like current transformer current sensors, shunt current sensors (shunts are only affected by
AC magnets), or any power supply transformer. As a result of the weaknesses of these components to magnetic
tampering, utility customers can be undercharged for their energy consumption, thereby allowing consumers to
essentially steal electricity.
Due to the susceptibility of meters to magnetic tampering, magnetic sensors are often used in electricity meters
to detect external magnetic fields to take appropriate action, such as disconnecting services to the meter or
applying a penalty fee for magnetic tampering. In this design, magnetic tamper detection is done with the
TMAG5273 linear 3D Hall-effect sensor, which has the following advantages compared to other magnetic
sensing devices and designs:
•Ease of assembly: Hall sensors in general are not as fragile as reed switches, the latter of which can break
during assembly.
•Only one surface mount IC needed: Sensing in three directions with the TMAG5273 requires only one
surface mount IC for 3D linear Hall-effect sensors instead of the three ICs in the case of 1D Hall-effect
sensors. 3D linear Hall-effect sensors therefore enable a more compact printed circuit board (PCB) layout.
In addition, having a surface mount-only implementation can reduce PCB manufacturing costs compared
to a 1D Hall-effect sensor implementation that can require through-hole sensors for detecting some of the
directions.
•Flexibility for defining magnetic tampering threshold: Since 3D linear Hall-effect sensors provide
information about the actual sensed magnetic flux density value, it is possible to select the magnetic
tampering threshold of each axis to anything within the magnetic sensing range of the 3D linear Hall-effect
sensor. This enables configuring how to define what is tampering, which can vary between designs since
the magnetic flux density sensed depends on the distance from the magnet to the sensor as well as the
characteristics of the external magnets to be detected. This type of flexibility is not possible for Hall-effect
switches with fixed magnetic operating point (BOP) thresholds. Finding the appropriate tamper threshold
definition can be done by using a magnetic calculation tool to determine what is the resulting magnetic flux
density seen for the different magnet-to-sensor distances and magnet types that must be detected. The
magnetic threshold can be then set to something lower than the magnetic flux density seen by the sensor
when exposed to the desired tamper conditions. Typically, it is desired to set the threshold to be small enough
to detect tamper magnets but also large enough so that the system does not see any false positives from
any nearby equipment that causes a magnetic field that does not affect the functionality of the meter. The
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magnet-to-sensor distance depends on where the sensor is placed on the PCB as well as the dimensions of
the e-Meter case. For small-sized systems, the magnetic sensor can be placed near the center of the board
for symmetrical sensing coverage across the meter case, or the sensor can be placed near any components
that are affected by magnetic tampering. For large-sized systems like certain polyphase meters, sometimes
it is not possible for one magnetic sensor to sense tampering across the entire meter surface, so multiple
3D Hall sensors can be used and placed spread out with respect to each other on the PCB to cover a large
sensing area. The TMAG5273 has four sets of device orderables that are factory programmed with different
I2C addresses, which enable multiple devices to share the same I2C bus.
•Ability to change between multiple device power modes: The TMAG5273 supports switching between
multiple power modes, depending on if it is desired to reduce system current consumption. The TMAG5273
has an active mode for taking measurements, a sleep mode for minimizing current consumption, and a
duty-cycle mode that automatically switches between active and sleep modes. Typical use-cases of the
different power modes for electricity meters are described below:
– Active mode is used for taking measurements and requires the most power out of the different power
modes. An example scenario where active mode is typically used is when the Mains are available and the
meter is running off the AC/DC power supply. When running off the AC/DC power supply, the relatively
high active mode current consumption (2.3 mA) of the TMAG5273 is negligible.
– In duty cycle mode, the device takes measurements and then automatically goes to sleep for a user-
specified amount of time. Duty-cycle mode is good for minimizing current consumption while still detecting
magnetic tampering, such as when low-speed magnetic tamper detection is necessary when running off
a backup battery. To reduce average current consumption in duty cycle mode, select a long sleep time.
When selecting the sleep time, set the sleep time to be less than the desired response time for magnetic
measurements. As an example, to sense magnetic tampering every 2 ms using wakeup and sleep mode,
set the sleep time to 1 ms instead of 1 second.
– In sleep mode, the device does not take any magnetic measurements. An alternative to wakeup and sleep
mode is to have the MCU manually set the sensor to sleep mode and then manually set the sensor to
wake up after the desired sleep time has passed. This requires more overhead from the MCU; however,
this option can reduce the system current consumption if the MCU is going to have its own wakeup and
sleep mode that allows the MCU to reconfigure the TMAG5273 during each wakeup and sleep mode
cycle. For systems that do not require detecting magnetic tampering when running off a backup battery,
the TMA5273 can just be put in sleep mode to reduce system current consumption when running off a
battery and then put back in active mode when the system is able to run off the AC/DC power supply
again.
•GPIO pin interrupts when magnetic tampering detected (depends on device): The TMAG5273 has
the ability to set an interrupt pin when the sensed magnetic flux density of any axis goes beyond a user-
defined magnetic switching threshold. To detect tampering, the user can set the magnetic switching point
for interrupts to the desired magnetic tampering threshold. Since the interrupt pin of the Hall-effect sensor
can wake up the microcontroller when the MCU is in low-power mode, and since the microcontroller does
not have to read the Hall-effect sensor to determine magnetic tampering, the MCU can go to low-power
mode when running off a backup power supply until woken up by the interrupt pin of the Hall-effect sensor.
Used simultaneously, the general-purpose input/output (GPIO) pin interrupt feature and duty-cycle power
mode can reduce system current consumption and extend the lifetime of the backup power supply. Once the
GPIO pin of the Hall-effect sensor wakes up the microcontroller, the MCU can then retrieve the value of the
sensed magnetic field reading that caused the interrupt and then enable wakeup and sleep mode with GPIO
interrupts again.
•Detection of AC magnets: AC magnets do not only affect current transformers. AC magnets can also affect
shunt and Rogowski coil current sensors. To detect AC magnets, a linear 3D Hall sensor can also be used.
Detecting AC magnets requires a fast-enough effective sampling period and a small enough sleep time to
properly capture enough samples along a cycle of the AC magnet waveform, as Figure 2-2 shows. The
effective sampling period corresponds to the time needed to get one set of samples, which is dependent on
the internal sampling rate of the device. Since linear Hall sensors provide information on the actual sensed
magnetic flux densities, the sensors are better able to detect AC magnets than a low-sample rate Hall switch.
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Figure 2-2. Detection AC Magnets
2.2.3 Analog Inputs
The analog front end in this design consists of the ADS131M08 delta-sigma standalone ADC. Each of the eight
integrated channel converters is differential and requires that the input voltages at the pins does not exceed
±1.2 V (gain = 1). To meet this input voltage specification, the current and voltage inputs must be divided down.
Because the ADS131M08 device can sense voltages down to −1.2 V, AC signals from Mains can be directly
interfaced without the need for level shifters.
2.2.3.1 Voltage Measurement Analog Front End
The nominal voltage from the Mains is from 100 V – 240 V so the voltage needs to be scaled down to be sensed
by an ADC. Figure 2-3 shows the analog front end used for this voltage scaling. J1 is where the voltage is
applied for Phase A, similar circuitry is used for each of the Phases B and C.
R6
0
B72220S0271K101
R1
0
R9
330k
R2 R3
330k
GND
330k
R4
GND
10pF
C1
100V
10pF
C3
100V
1
2
J1
R5
1.00k
R8
1.00k
6800pF
100V
C2
750
R7
V_Phase_A_P
V_Phase_A_N
Figure 2-3. Analog Front End for Voltage Inputs
In the analog front end for voltage, there consists a spike protection varistor (R6), footprints for electromagnetic
interference filter beads (resistor footprints R1 and R9), a voltage divider network (R2, R3, R4, and R7), and an
RC low-pass filter (R5, R8, C1, C3, and C2).
At lower currents, voltage-to-current crosstalk affects active energy accuracy much more than voltage accuracy,
if power offset calibration is not performed. To maximize the accuracy at these lower currents, in this design
only a small part of the full ADC range is used for voltage channels. Since the ADCs of the ADS131M08 device
are high-accuracy ADCs, using the reduced ADC range for the voltage channels in this design still provides
more than enough accuracy for measuring voltage. Equation 1 shows how to calculate the range of differential
voltages fed to the voltage ADC channel for a given Mains voltage and selected voltage divider resistor values.
VADC_Swing, Voltage = ±VRMS × 2 R7
R2+ R3+ R4+ R7(1)
Based on this formula and the selected resistor values in Figure 2-3, for a mains voltage of 120 V (as measured
between the line and neutral), the input signal to the voltage ADC has a voltage swing of ±128 mV (91 mVRMS).
For a mains voltage of 230 V (as measured between the line and neutral, the 230-V input to the front-end circuit
produces a voltage swing of ±245.33 mV (173.48 mVRMS). The ±128-mV and the ±245.33-mV voltage ranges
are both well within the ±1.2-V input voltage that can be sensed by the ADS131M08 device for the selected PGA
gain value of 1 that is used for the voltage channels.
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2.2.3.2 Current Measurement Analog Front End
The analog front end for current inputs is different from the analog front end for the voltage inputs. Figure 2-4
shows the analog front end used for a current channel, where the positive and negative leads from a CT for
Phase A are connected to pins 1 and 3 of header J4. Again, similar circuitry is used for the CTs on each of the
Phases B and C.
3
2
1
J4
ED120/3DS
GND
0
R35
0
R39
GND
2.00k
R36
2.00k
R40
100V
C14
6800pF
GND
10pF
100V
C13
10pF
100V
C15
6.49
R37
6.49
R38
I_Phase_A_P
I_Phase_A_N
Figure 2-4. Analog Front End for Current Inputs
The analog front end for current consists of footprints for electromagnetic interference filter beads (R35 and
R39), burden resistors for current transformers (R37 and R38), and an RC low-pass filter (R36, R40, C13, C15,
and C14) that functions as an anti-alias filter.
As Figure 2-4 shows, resistors R37 and R38 are the burden resistors, which are in series with each other. For
best THD performance, instead of using one burden resistor, two identical burden resistors in series are used
with the common point being connected to GND. This split-burden resistor configuration makes sure that the
waveforms fed to the positive and negative terminals of the ADC are 180 degrees out of phase with each other,
which provides the best THD results with this ADC. The total burden resistance is selected based on the current
range used and the turns ratio specification of the CT (this design uses CTs with a turns ratio of 2000). The total
value of the burden resistor for this design is 12.98 Ω.
Equation 2 shows how to calculate the range of differential voltages fed to the current ADC channel for a given
maximum current, CT turns ratio, and burden resistor value.
VADC_Swing, Current = ± 2 R37+R38 IRMS, max
CTTURNS_RATIO (2)
Based on the maximum current of 100 A, CT turns ratio of 2000, and burden resistor of 12.98 Ω, of this design,
the input signal to the current ADC has a voltage swing of ±918 mV maximum (649 mVRMS) when the maximum
current rating of the meter (100 A) is applied. This ±918-mV maximum input voltage is well within the ±1.2-V
input range of the device for the selected PGA gain of 1 that is used for the current channels.
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2.3 Highlighted Products
2.3.1 ADS131M08
The ADS131M08 device is a eight-channel, simultaneously-sampling, 24-bit, 2nd order delta-sigma (ΔΣ),
analog-to-digital converter (ADC) that offers wide dynamic range, and internal calibration features making the
device an excellent choice for energy metering, power quality, and protection applications. The ADC inputs can
be directly interfaced to a resistor-divider network, a transformer to measure voltage or current, or a Rogowski
coil to measure current.
The individual ADC channels can be independently configured depending on the sensor input. A low noise,
programmable gain amplifier (PGA) provides gains ranging from 1 to 128 to amplify low-level signals.
Additionally, these devices integrate channel to channel phase alignment and offset and gain calibration
registers to help remove signal chain errors. A low-drift, 1.2-V reference is integrated into the device reducing
printed circuit board (PCB) area. Cyclic redundancy check (CRC) options can be individually enabled on the data
input, data output and register map to provide communication integrity. Figure 2-5 shows a block diagram of this
device.
+
±
Gain & Offset
Calibration
Gain & Offset
Calibration
Gain & Offset
Calibration
+
±
+
±
+
±Phase Shift &
Digital Filter
Phase Shift &
Digital Filter
Phase Shift &
Digital Filter
'6ADC
'6ADC
'6ADC
'6ADC Gain & Offset
Calibration
Phase Shift &
Digital Filter
'6ADC Gain & Offset
Calibration
Phase Shift &
Digital Filter
+
±
'6ADC
SCLK
DOUT
DIN
Control &
Serial Interface
CS
Gain & Offset
Calibration
AVDD
AGND
DVDD
DGND
DRDY
Clock
Generation
SYNC / RESET
Phase Shift &
Digital Filter
'6ADC Gain & Offset
Calibration
Phase Shift &
Digital Filter
AIN0P
AIN0N
+
±
AINnP
AINnN
AIN7P
AIN7N
+
±
1.2-V
Reference
REFIN
XTAL1 / CLKIN
XTAL2
'6ADC Gain & Offset
Calibration
Phase Shift &
Digital Filter
+
±
SW
Channel 0
Channel 7
Channels 1-6
Channels 1-6
Channel 0
Channel 7
Figure 2-5. ADS131M08 Functional Block Diagram
2.3.2 MSPM0G3507
The MSPM0G device family integrates an Arm® 32-bit Cortex®-M0+ CPU with memory protection unit, clock
frequency up to 80 MHz and two SPIs, one of those supporting up to 32Mbps. Other relevant peripherals for
running Energy Calculations are the Real Time Clock (RTC) with calendar function, CRC-16 or CRC-32 HW
module, four Universal Asynchronous Receiver Transmitters (UARTs), two I2Cs with 1Mbps and up to 60 GPIOs.
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SPI0
SPI1
CPU SUB SYSTEM
Arm
Cortex-M0+
fmax = 80 MHz
NVIC
MPU
SWD + MTB
IOPORT
AHB BUS (MCLK)
FLASH
Up to 128 KB
SRAM
Up to 32 KB
CPU-ONLY PD1 PERIPHERAL BUS (MCLK)
DMA
7-ch
PD1 PERIPHERAL BUS (MCLK)
AES
CRC
TRNG
UART3GPIO
tIOBUSt
PD0 PERIPHERAL BUS (ULPCLK)
12b ADC0
12b ADC1
TIMG0
TIMG8
UART0
I2C0
I2C1
IOMUX
PMCU (SYSCTL)
GPAMP
FLASHCTL
ULPCLK
ULPCLK
PD1, CPU ACCESS ONLY
PD1, CPU/DMA ACCESS
PD1/PD0, CPU/DMA ACCESS
PD0, CPU/DMA ACCESS
LEGEND
EVENTRTC
WWDT0
WWDT1
TIMA0
TIMA1
TIMG6
TIMG7
TIMG12
32-bit
UART1
UART2
VREF
PD0 PERIPHERAL BUS (ULPCLK)
OPA0
OPA1
COMP0
COMP1
COMP2
TEMP SENSOR
SYSOSC
SYSPLL
LFXT
HFXT
LFOSC
CKM
LDO
PMU
BOR
POR
VBOOST
12b DAC0
DEBUG
RTC_OUT
TX, RX,
CTS, RTS
TX, RX,
CTS, RTS
SDA, SCL
2-CH
IN+, IN-,
OUT
DAC_OUT
IN+, IN-,
OUT
IN+, IN-,
OUT
VREF+,
VREF-
A0_x
A1_x
2-CH
2-CH
2-CH
2-CH
FAULT
4-CH
FAULT
POCI, PICO,
SCK, CSx
TX, RX,
CTS, RTS
PAx, PBx
LFXIN, LFXOUT
HFXIN, HFXOUT
ROSC
CLK_OUT, FCC_IN
VDD, VSS
VCORE, NRST
2-CH
QEI/HALL
ROM
BCR, BSL
MATHACL
SWCLK,
SWDIO
Each COMPx includes an 8b
reference DAC; COMP0 and
COMP1 reference DACs connect
to OPA0 and OPA1, respectively
Figure 2-6. MSPM0G3507 Functional Block Diagram
The MSPM0+ MCU in this design retrieves voltage and current samples from the ADS131M08 device and
calculates metrology parameters. In addition, the device also keeps track of time with the RTC module, and
uses one of the UART interfaces to communicate to a PC GUI using either the isolated RS-232 or isolated
RS-485 circuit of the board or sends the calculated parameters to be displayed on the LCD to an external
MSP430FR4131 thru a 2nd UART link.
The CRC16 module of the MSPM0+ MCU is also used to accelerate the CRC calculations that are done to verify
the integrity of the ADC packet sent by the ADS131M08 device.
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Main features of MSPM0G3507 are the extended temperature range: –40°C up to 125°C; the wide supply
voltage range: 1.62 V to 3.6 V; and the integrated 128KB of flash memory with built-in error correction code
(ECC) and 32KB of ECC protected SRAM with hardware parity.
The pin-compatible MSPM0G1107 device, featuring –40°C up to 105°C range and without the hardware math
accelerator (MATHACL) and the AES modules can be used, if the application targets lower system cost and
does not require these two peripherals.
2.3.3 MSP430FR4131 for Driving Segmented LCD Displays
The MSP430FR413x ultra-low power (ULP) microcontroller family supports low-cost LCD applications that
benefit from an integrated 10-bit ADC such as remote controls, thermostats, smart meters, blood glucose
monitors, and blood pressure monitors. The MCUs feature a powerful 16-bit RISC CPU, 16-bit registers, and
constant generators that contribute to maximum code efficiency. The digitally controlled oscillator (DCO) allows
the device to wake up from low-power modes to active mode in less than 10 µs. The architecture, combined
with extensive low-power modes, is optimized to achieve extended battery life in portable measurement
applications. The MSP430™ FRAM microcontroller platform combines uniquely embedded ferroelectric random
access memory (FRAM) and a holistic ultra-low-power system architecture, allowing system designers to
increase performance while lowering energy consumption. FRAM technology combines the low-energy fast
writes, flexibility, and endurance of RAM with the nonvolatile behavior of flash.
The main features of this FRAM MCU are the temperature range: –40°C up to 85°C; the wide supply voltage
range: 1.8 V to 3.6 V; and the integrated 4KB of program FRAM + 512B of information FRAM + 512B of RAM
memory.
A key feature is the internal LCD driver module in the MSP430FR4131 supporting 4 × 36 or 8 × 32 segment LCD
displays, which are quite popular in electricity meters.
2.3.4 TPS3840
The TPS3840 family of voltage supervisors or reset ICs can operate at high voltage levels while maintaining
very low quiescent current across the whole VDD and temperature range. The TPS3840 device offers the best
combination of low power consumption, high accuracy and low propagation delay.
The reset output signal of the device is asserted when the voltage at VDD drops below the negative voltage
threshold (VIT–) or when manual reset is pulled to a low logic (VMR_L). The reset signal is cleared when VDD
rises above VIT– plus hysteresis (VIT+) and manual reset (MR) is floating or above VMR_H and the reset time
delay (tD) expires. Reset time delay can be programmed by connecting a capacitor to ground in the CT pin,
because a fast reset CT pin can be left floating. Additional features include low power on reset voltage (VPOR),
built-in glitch immunity protection for MR and VDD, built-in hysteresis and low open drain output leakage current
(ILKG(OD)).
For electricity meters, sometimes having external SVS devices to reset any microcontrollers in the system is
beneficial, even if the microcontrollers already have an internal SVS. In this design the TPS3840 external SVS
device is added for an additional level of security. External SVS devices can sometimes also be used for early
detection of a Mains blackout condition by monitoring one of the rails of an AC/DC powered from Mains.
In this design, the TPS3840DL17 variant is specifically used, which has a 1.7-V threshold and an open drain,
active low output.
2.3.5 THVD1400
The THVD1400 is a robust half-duplex RS-485 transceiver for industrial applications. The bus pins are immune
to high levels of IEC Contact Discharge ESD events, eliminating the need for additional system-level protection
components due to ±12-kV IEC 61000-4-2 contact discharge bus I/O protection. The device operates from a
single 3- to 5.5-V supply and is available in industry standard, 8-pin SOIC package for drop-in compatibility as
well as in the industry-leading, small SOT package.
The device is characterized for ambient temperatures from –40°C to 125°C and also meets or exceeds the
requirements of the TIA/EIA-485A standard. The wide common-mode voltage range and low input leakage on
bus pins make the devices an excellent choice for multi-point applications over long cable runs.
This device is specifically used in this design to convert from UART to RS-485 signals.
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2.3.6 ISO6731
To add isolation to the RS-232 and RS-485 connection to a PC, the isolated RS-232 and isolated RS-485 portion
of this reference design uses capacitive galvanic isolation, which has an inherent life span advantage over an
opto-isolator. In particular, industrial devices are usually pressed into service for much longer periods of time
than consumer electronics; therefore, maintenance of effective isolation over a period of 15 years or longer is
important.
The ISO6731 device is a high-performance, triple-channel digital isolator designed for cost-sensitive applications
requiring up to 5000 VRMS isolation ratings per UL 1577. This device is also certified by VDE, TUV, CSA,
and CQC. The ISO6731 device provides high electromagnetic immunity and low emissions at low power
consumption, while isolating CMOS or LVCMOS digital I/Os. Each isolation channel has a logic input and
output buffer separated by TI's double capacitive silicon dioxide (SiO2) insulation barrier. This device comes
with enable pins which can be used to put the respective outputs in high impedance for multi-master driving
applications.
The ISO6731 device has two forward and one reverse-direction channels. In the event of input power or signal
loss, the default output is high for the device without suffix F and low for the device with suffix F.
In this design, two isolation channels are used for the TX and RX in RS-485 communication mode, while the
third isolation channel is used for the RE_DE control signal used to enable the receiver or driver. This chip
supports a signaling rate of 50Mbps and operates from a 1.71-V to 1.89-V and 2.25-V to 5.5-V supply in the
temperature range: –40°C to +125°C.
2.3.7 ISO6720
The ISO6720 device is a high-performance, dual-channel digital isolator designed for cost-sensitive applications
requiring up to 3000 VRMS (D package) isolation ratings per UL 1577. These devices are also certified by VDE,
TUV, CSA, and CQC.
The ISO6720 device provides high electromagnetic immunity and low emissions at low power consumption,
while isolating CMOS or LVCMOS digital I/Os. Each isolation channel has a logic input and output buffer
separated by TI's double capacitive silicon dioxide (SiO2) insulation barrier. The ISO6720 device has 2 isolation
channels with both channels in the same direction. Through remarkable chip design and layout techniques,
the electromagnetic compatibility of the ISO6720 devices has been significantly enhanced to ease system-level
ESD, EFT, surge, and emissions compliance. The ISO6720 family of devices is available in a 8-pin SOIC
narrow-body (D) package and is a pin-to-pin upgrade to the older generations.
To test the active energy and reactive energy accuracy of a meter, pulses are output at a rate proportional to
the amount of energy consumed. A reference meter can then determine the accuracy of the electricity meter by
calculating the error based on these pulses and how much energy is provided to the meter. In this reference
design, pulses are output through headers for the cumulative active and reactive energy consumption. Using
the ISO6720 device provides an isolated version of these headers for connection to non-isolated equipment.
In this design, the D package of the ISO6720 device is used, which provides an isolation voltage of 3000
VRMS for these signals. These isolated active and reactive signals can be set to have either a 3.3- or 5-V
maximum voltage output by applying the selected maximum voltage output between the VCC (ISO_VCC) and
GND (ISO_GND) of the isolated side.
This chip supports a signaling rate of 50Mbps and operates from a 1.71-V to 1.89-V and 2.25-V to 5.5-V supply
in the temperature range: –40°C to +125°C.
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2.3.8 TRS3232E
To properly interface with the RS-232 standard, a voltage translation system is required to convert between the
3.3-V domain on the board and from the 12 V on the port itself. To facilitate the translation, the design uses a
TRS3232E device. The TRS3232E device is capable of driving the higher voltage signals on the RS-232 port
from only the 3.3-V DVCC through a charge pump system.
The TRS3232E device consists of two line drivers, two line receivers, and a dual charge-pump circuit with ±15-
kV electrostatic discharge (ESD) protection pin-to-pin (serial-port connection pins, including GND). The device
meets the requirements of the Telecommunications Industry Association and Electronic Industries Alliance TIA/
EIA-232-F and provides the electrical interface between an asynchronous communication controller and the
serial-port connector. The charge pump and four small external capacitors allow operation from a single 3-V to
5.5-V supply. The devices operate at data signaling rates up to 250kbps and a maximum of 30-V/µs driver output
slew rate.
2.3.9 TPS709
To power the data terminal equipment (DTE) side of the isolation boundary and the RS-232 charge pump, there
are two choices. The interface can either implement an isolated power supply or harvest power from the RS-232
line. Integrating a power supply adds cost and complexity to the system, which is difficult to justify in low-cost
sensing applications.
To implement the second option of harvesting power from the RS-232 port itself, this reference design uses
the flow control lines that are ignored in most embedded applications. The RS-232 specification (when properly
implemented on a host computer or adapter cable), keeps the request to send (RTS) and data terminal ready
(DTR) lines high when the port is active. As long as the host has the COM port open, these two lines retain
voltage on them. This voltage can vary from 5 V to 12 V, depending on the driver implementation. The 5 V to 12
V is sufficient for the use requirements in this design.
The voltage is put through a diode arrangement to block signals from entering back into the pins. The voltage
charges a capacitor to store energy. The capacitor releases this energy when the barrier and charge pump pull
more current than what is instantaneously allowed. The TPS70933 device is used to bring the line voltage down
to a working voltage for the charge pump and isolation device.
In addition to being used in the RS-232 circuit, an additional TPS709 device is used to regulate the 5-V input
voltage from the 5V_IN rail down to the 3.3 V used to power most of the components on the board.
The TPS70933 linear regulator is an ultra-low quiescent current devices designed for power-sensitive
applications. A precision band-gap and error amplifier provides 2% accuracy overtemperature. A quiescent
current of only 1 µA makes these devices an excellent design for battery-powered, always-on systems that
require very little idle-state power dissipation. These devices have thermal-shutdown, current-limit, and reverse-
current protections for added safety. These regulators can be put into shutdown mode by pulling the EN pin low.
The shutdown current in this mode goes down to 150 nA (typical).
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2.3.10 TMAG5273
The TMAG5273 is a low-power linear 3D Hall-effect sensor designed for a wide range of industrial and personal
electronics applications. This device integrates three independent Hall-effect sensors in the X, Y, and Z axes.
A precision analog signal chain along with an integrated 12-bit ADC digitizes the measured analog magnetic
field values. The I2C interface, while supporting multiple operating VCC ranges, provides seamless data
communication with low-voltage microcontrollers. The device has an integrated temperature sensor available
for multiple system functions, such as thermal budget check or temperature compensation calculation for a
given magnetic field. The TMAG5273 can be configured through the I2C interface to enable any combination
of magnetic axes and temperature measurements. Additionally, the device can be configured to various power
options (including wake-up and sleep mode) allowing designers to optimize system power consumption based
on their system-level needs. Multiple sensor conversion schemes and I2C read frames help optimize throughput
and accuracy. A dedicated INT pin can act as a system interrupt during low power wake-up and sleep mode, and
can also be used by a microcontroller to trigger a new sensor conversion. The ultra-low power consumption is
defined by 2.3-mA active mode current, 1-µA wake-up current and just 5-nA sleep mode current.
TMAG5273 operates from 1.7-V to 3.6-V supply voltage in the –40°C to +125°C temperature range at a
maximum 1-MHz I2C clock speed.
• The TMAG5273 is a linear 3D Hall-effect sensor that is designed for electricity meters.
• The TMAG5273 is offered in four different factory-programmed I2C addresses. The device also supports
additional I2C addresses through the modification of a user-configurable I2C address register.
•Figure 2-7 shows how the TMAG5273 defines the X, Y, and Z directions:
1
2
3
Z Axis
X Axis
Y Axis
N
S
N
S
N
S
Figure 2-7. Field Direction Definition
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3 System Design Theory
This chapter explains the hardware architecture and the necessary software support for the MSPM0G3507 and
ADS131M08 devices.
3.1 How to Implement Software for Metrology Testing
The MSPM0+ software used for evaluating this design is test software. This section discusses the features
of the test software, which provides insight on how to implement custom software for metrology testing.
This section discusses the setup of the ADS131M08 device and various peripherals on the MSPM0G3507
MCU. Subsequently, the metrology software is described as two major processes: the foreground process and
background process.
The test data included in this reference design was taken using the generic test code written for the
MSPM0G3507 MCU, which is a porting of the ADC Energy Metrology Library software to the TI MSPM0G-series
of MCUs.
The original ADC Energy Metrology Library was developed and tested on an Arm Cortex-M4F MCU, which
makes the software easily portable to popular Arm Cortex-M3, M4(F), and M33 microcontrollers, such as TI's
wireless MCUs portfolio of Sub-1-GHz and 2.4-GHz devices.
The MSPM0+ software contains hardware abstraction layers which enable communication between the
standalone ADC and an Arm Cortex-M0+ MCU and a library of metrology calculations for energy measurements.
Also included in the software is a Microsoft Windows PC GUI to display metrology parameters from the
TIDA-010243 reference design.
3.2 Clocking System
The MSPM0G3507 MCU is configured to have the CPU clock (MCLK) set at 79.87 MHz and the CLK_OUT clock
signal to ADS131M08 is set to 8.192 MHz. The external 16.384 MHz XTAL, which is feeding the PLL module
and is being multiplied and divided with specific factors, generates a MCLK frequency (the CPU clock speed) of
79.87 MHz.
The external 16.384-MHz crystal is divided by 2 to create the 8.192-MHz output frequency for CLK_OUT. An
internal 32.768-kHz LFOSC is used as the clock source for the auxiliary clock (RTCCLK) of the device.
All these settings are configured in the TIDA-010243.syscfg file in the software deliverable, utilizing the graphical
Clock Tree configuration inside the SYSCONFIG tool.
3.3 UART Setup for GUI Communication
The MSPM0+ MCU is configured to communicate to the PC GUI through either the RS-232 or RS-485
connection on this reference design. The MSPM0G3507 MCU communicates to the PC GUI using a UART
module configured for 115,200 baud with 8N1.
3.4 Real-Time Clock (RTC)
The real-time clock module of the MSPM0G3507 MCU is configured to give precise two-second interrupts and
update the calendar time and date, as necessary.
3.5 LCD Controller in MSP430FR4131
The LCD_E peripheral module on the MSP430FR4131 MCU can support up to 8-MUX displays with 256
segments or 4-MUX with 144 segment displays, as used in this design with the FH-1152P LCD. In the PCB
layout-driven design process, LCD_E offers fully-software-configurable segment S and common COM signals
which are connected to the respective MSP430 device pins. This enables an optimized routing of the PCB which
avoids signal crossings and keeps signals on one side of the PCB only, here the top layer. If the internal charge
pump of the LCD module is used, place the externally provided capacitor on the LCDCAP0 and LCDCAP1
pins as close as possible to the MCU. Connect the capacitor to the device using a short and direct trace. TI
recommends using the VLO on-chip oscillator for the lowest system cost. The ultra-low power VLO has an
accuracy of 10 kHz ±50% so calibrate the VLO against the ±1% accurate on-chip 16-MHz digitally-controlled
oscillator (DCO) with frequency-locked loop (FLL).
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Alternatively, a 32.768-kHz clock output from MSPM0G3507 device can be provided to the MSP430FR4131
using a GPIO output.
3.6 Direct Memory Access (DMA)
The DMA module transfers packets between the MSPM0G3507 MCU and ADS131M08 device with minimal
hardware resources and timing overhead. Two DMA channels are used for communicating to the ADS131M08.
DMA Channel 0 is used to send data to the ADS131M08 and DMA Channel 1 is used simultaneously to
receive the measurements data from the ADS131M08 over SPI bus. Once a complete packet has been received
from the ADS131M08, an interrupt is generated to complete the (optional but strongly recommended) CRC16
verification of the data packet and finally the packet disassembly into voltage and current values per each phase
line and the neutral line is done. Figure 3-5 shows the packets that are sent and received using the DMA of the
MSPM0G3507 MCU.
3.7 ADC Setup
The ADS131M08 registers must be initialized to deliver measurement data from all 7 channels (the 8-th channel
is unused but still has to be read out over SPI). This process is followed when the ADS131M08 is being first
setup after the MSPM0G3507 MCU resets as well as each time calibration is performed.
Setup ADS131M08 SPI
Disable IRQ
Send ADS131M08 reset pulse
Enable IRQ
Return
ADS131M08 Setup
Send commands to configure
ADS131M08 registers
Setup port interrupt on falling edge
of ADS131M08 DRDY
Figure 3-1. ADC Initialization and Synchronization Process
The SPI module of the MSPM0+ MCU is configured for communication to the ADS131M08 device as a controller
device that uses 4-wire mode (the chip-select signal is automatically asserted high and low by the SPI hardware
module) and has a 19.87-MHz SPI clock that is derived from the MCU MCLK clock, divided by 4. After the SPI
is setup, all interrupts are disabled and a reset command is sent from the MSPM0+ MCU to the ADS131M08 via
SPI. Interrupts are then re-enabled and the MSPM0+ MCU sends commands to the ADS131M08 to configure
the registers.
By sending write commands to the ADS131M08 registers, the following configuration is done:
• MODE register settings: 16-bit CCITT CRC used, 24-bit length for each word in the ADS131M08 packet,
DRDY signal asserted on most lagging enabled channel, DRDY asserted high when conversion value is not
available, DRDY asserted low when conversion values are ready
• GAIN1 register settings: PGA gain of 1 used for all four ADC channels
• CFG register settings: Current detection mode disabled
• CHx_CNG register settings (where x is the channel number)
– 3-phase mode: All seven ADC channel inputs connected to external ADC pins and channel phase delay
set to 0 for each channel (note that software phase compensation is used instead of ADS131M08
hardware phase compensation).
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• CLOCK register settings: 512 OSR, all channels enabled, and high-resolution modulator power mode
After the ADS131M08 registers are properly initialized, the MSPM0+ MCU is configured to generate a port
interrupt whenever a falling edge occurs on the DRDY pin, which indicates that the ADS131M08 has new
measurement samples available.
The ADS131M08 modulator clock is derived from the clock fed to the CLKIN pin, which is output from the
CLK_OUT output of the MSPM0+ MCU. The clock fed to the CLKIN pin of the ADS131M08 device is internally
divided by two, to generate the ADS131M08 modulator clock. The sampling frequency of the ADS131M08 is
therefore defined as shown in Equation 3.
fS=fM
OSR =fCLKIN 2 × OSR (3)
where
• ƒS is the sampling rate
• ƒM is the modulator clock frequency
• ƒCLKIN is the clock fed to the ADS131M08 CLKIN pin
• OSR is the selected oversampling ratio
In this design, the CLK_OUT signal of the MSPM0+ MCU that is fed to the ADS131M08 CLKIN pin has a
frequency of 8.192 MHz. The oversampling ratio is selected to be 512 with the appropriate register setting. As
a result, the ADS131M08 modulator clock is set to 4.096 MHz and the sample rate is set to 8000 samples per
second.
For a 3-phase system where each line-to-neutral voltage is measured, at least six ADC channels are necessary
to independently measure three voltages and three currents. In this design, the following ADS131M08 channel
mappings are used in software for the 3-phase configuration:
• AIN0P and AIN0N ADS131M08 ADC channel pins → Voltage V1 (Phase A Line-to-Neutral Voltage)
• AIN1P and AIN1N ADS131M08 ADC channel pins → Voltage V2 (Phase B Line-to-Neutral Voltage)
• AIN2P and AIN2N ADS131M08 ADC channel pins → Voltage V3 (Phase C Line-to-Neutral Voltage)
• AIN3P and AIN3N ADS131M08 ADC channel pins → Current I1 (Phase A Current)
• AIN4P and AIN4N ADS131M08 ADC channel pins → Current I2 (Phase B Current)
• AIN5P and AIN5N ADS131M08 ADC channel pins → Current I3 (Phase C Current)
• AIN6P and AIN6N ADS131M08 ADC channel pins → Current N (Neutral Current)
• AIN7P and AIN7N ADS131M08 ADC channel pins → unconnected, channel 7 data is always reported as
0x00 00 00 over SPI when ADS131M08 is 24-bit mode with channel 7 disabled
3.8 Foreground Process
The foreground process includes the initial setup of the MSPM0+ MCU hardware and software and the
ADS131M08 registers immediately after a device RESET. Figure 3-2 shows the flowchart for this process.
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RESET
HW setup:
Port pins, Clocks, UARTs, RTC, SPI,
DMA, ADS131M08, Metrology
Calculate metrology readings for all ready
V-I mappings (3 phases + neutral)
Y
RTC tick triggers LCD update
DLT645 frame reception management
and RS-485 read/write enable handling
N
second of energy
accumulated for any V-I mapping?
Wait for acknowledgement from
background process
Figure 3-2. Foreground Process
The initialization routines involve the setup of the MSPM0G3507:
• General purpose input/output (GPIO) port pins
• Clock system (MCLK or CPU clock, RTC clock, SPI clock, I2C clock, CLK_OUT pin)
• 4 UART ports for UART functionality
• Two DMA channels, one per SPI receive and transmit
• ADS131M08 registers
• Metrology variables
After the hardware is setup, any received frames from the GUI are processed. If RS-485 is selected for
communication to the PC GUI, the THVD1400 device must have the RE and DE pins driven to enable the
receiver and driver during the proper points in time to receive packets from the PC GUI and send responses
back to the GUI. After any packet is sent from the MSPM0+ MCU to the PC GUI, the foreground process is
responsible for asserting the RE and DE pins after the packet has been completely sent out from the MSPM0+
MCU but before the GUI sends out the next packet.
Subsequently, the foreground process checks whether the background process has notified the foreground
process to calculate new metering parameters for any voltage-current mappings. This notification is
accomplished through the assertion of the "PHASE_STATUS_NEW_LOG" status flag whenever a frame of data
is available for processing. The data frame consists of the processed dot products that were accumulated for
approximately one second in the background process. This is equivalent to an accumulation of 50 or 60 cycles
of data synchronized to the incoming voltage signal. In addition, a sample counter keeps track of how many
samples accumulate over this frame period. This count can vary as the software synchronizes with the incoming
Mains frequency.
The processed dot products include the VRMS, IRMS, active power, and reactive power. These dot products are
used by the foreground process to calculate the corresponding metrology readings in real-world units. Processed
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voltage dot products, current dot products, active energy dot products, and reactive energy dot products are
accumulated in separate 64-bit registers to further process and obtain the RMS and mean values. Using the
calculated values of active and reactive power of the foreground process, the apparent power is calculated. The
frequency (in Hz) and power factor are also calculated using parameters calculated by the background process
using the formulas in Section 3.8.1.
For the 3-phase configuration, there are three voltage-current mappings, where each voltage-to-current mapping
has a different voltage and current channel. Specifically, the line-to-neutral voltage measurement for line A
and the line A current measurement are associated with each other for one mapping and the line-to-neutral
voltage measurement for line B and the line B current measurement are associated with each other for the other
mapping and the same for Line C. For simplicity, note that each voltage-to-current mapping is referred to as a
phase in the rest of this documentation as well as in the PC GUI.
The foreground process also updates the LCD. The LCD display item is changed every two seconds. See
Section 4.2.4.1 for more information about the different items displayed on the LCD.
3.8.1 Formulas
This section describes the formulas used for the voltage, current, power, and energy calculations. As previously
described, voltage and current samples are obtained at a sampling rate of 8000 Hz. All of the samples that are
taken in approximately one second frames are kept and used to obtain the RMS values for voltage and current
for each phase. The RMS values are obtained with the following formulas:
VRMS, ph = Kv, ph ×∑n=1
Sample Count vph n × vph n
Sample Count −voffset, ph (4)
IRMS, ph = Ki, ph ×∑n=1
Sample Count iph n × iph n
Sample Count −ioffset, ph (5)
where
• ph = Phase parameters that are being calculated [that is, Phase A (= 1) or B (= 2)]
• vph(n) = Voltage sample at a sample instant n
• voffset,ph = Offset used to subtract effects of the additive white Gaussian noise from the voltage converter
• iph(n) = Each current sample at a sample instant n
• ioffset,ph = Offset used to subtract effects of the additive white Gaussian noise from the current converter
• Sample count = Number of samples within the present frame
• Kv,ph = Scaling factor for voltage
• Ki,ph = Scaling factor for current
Power and energy are calculated for active and reactive energy samples of one frame. These samples are
phase-corrected and passed on to the foreground process, which uses the number of samples (sample count) to
calculate phase active and reactive powers through the following formulas:
PACT, ph = KACT, ph
∑n=1
Sample Count v n × iph n
Sample Count −PACT_Offset, ph (6)
PREACT, ph = KREACT, ph
∑n=1
Sample Count v90, ph n × iph n
Sample Count −PREACT_Offset, ph (7)
PAPP, ph = PACT, ph2+ PREACT, ph2(8)
where
• v90(n) = Voltage sample at a sample instant ‘n’ shifted by 90°
• KACT,ph = Scaling factor for active power
• KREACT,ph = Scaling factor for reactive power
• PACT_offset,ph = Offset used to subtract effects of crosstalk on the active power measurements from other
phases and the neutral
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