Texas Instruments TLC694 Series Product manual

TI Information — Selective Disclosure
TLC694x 16-Channel LED Driver Technical
Reference Manual
Technical Reference Manual
Literature Number: SLVUBF4A
February 2018–Revised June 2019

2SLVUBF4A–February 2018–Revised June 2019
Submit Documentation Feedback
Copyright © 2018–2019, Texas Instruments Incorporated
Contents
TI Information — Selective Disclosure
Contents
Preface ........................................................................................................................................ 6
1 Introduction......................................................................................................................... 7
1.1 Overview...................................................................................................................... 7
1.2 Features....................................................................................................................... 7
1.3 Applications................................................................................................................... 8
1.4 Typical Application Schematic ............................................................................................. 8
2 Function Control ................................................................................................................ 10
2.1 Function-Control Registers................................................................................................ 10
2.1.1 Write Function-Control Data Through a Common Shift Register ........................................... 10
2.1.2 Function-Control Register 1 (FC1).............................................................................. 11
2.1.3 Function-Control Register 2 (FC2).............................................................................. 12
2.1.4 Function-Control Register 3 (FC3).............................................................................. 13
2.1.5 Function-Control Register 4 (FC4).............................................................................. 14
2.2 Function-Control Commands ............................................................................................. 16
2.2.1 Write Function-Control Register................................................................................. 16
2.2.2 Read Function-Control Register................................................................................. 17
2.3 Function-Control Description.............................................................................................. 20
2.3.1 Global Brightness Control and Current Setting................................................................ 20
2.3.2 LED Open Detection (LOD)...................................................................................... 21
2.3.3 Precharge Function ............................................................................................... 24
2.3.4 Power-Save Mode (PSM)........................................................................................ 24
2.3.5 Thermal Shutdown (TSD) ........................................................................................ 25
2.3.6 IREF Resistor Short Protection (ISP)........................................................................... 25
3 PWM Grayscale Control ...................................................................................................... 26
3.1 Write Grayscale Data Into Memory ...................................................................................... 26
3.1.1 Memory Structure Overview ..................................................................................... 26
3.1.2 Detail of Memory BANK .......................................................................................... 27
3.1.3 Write Grayscale Data Into One Memory Unit.................................................................. 29
3.1.4 Write Grayscale Data Into One Memory BANK............................................................... 30
3.2 Vertical Frame Synchronization (VSYNC) ............................................................................. 30
3.2.1 VSYNC Command ................................................................................................ 30
3.2.2 Send VSYNC Command ........................................................................................ 31
3.3 PWM Control and New Frame Image Display.......................................................................... 31
3.3.1 PWM Control Overview........................................................................................... 31
3.3.2 Enhanced Spectrum PWM (ES PWM) Control ............................................................... 32
3.3.3 Send GCLK for Multiplexing ..................................................................................... 36
3.3.4 Complete Frame Image Display................................................................................. 37
4 Device Operation Examples................................................................................................. 38
4.1 TLC6946 Design Example ................................................................................................ 38
4.1.1 Design Requirements............................................................................................. 38
4.1.2 FC Register Configuration ....................................................................................... 40
4.1.3 PWM Grayscale Control.......................................................................................... 41
4.2 TLC6948 Design Example ................................................................................................ 43

www.ti.com
3
SLVUBF4A–February 2018–Revised June 2019
Submit Documentation Feedback Copyright © 2018–2019, Texas Instruments Incorporated
Contents
TI Information — Selective Disclosure
4.2.1 Design Requirements............................................................................................. 43
4.2.2 FC Registers Settings ............................................................................................ 44
4.2.3 PWM Grayscale Control.......................................................................................... 46

www.ti.com
4SLVUBF4A–February 2018–Revised June 2019
Submit Documentation Feedback
Copyright © 2018–2019, Texas Instruments Incorporated
List of Figures
TI Information — Selective Disclosure
List of Figures
1-1. Typical Application Schematic of TLC6946 With 32-Multiplexing ..................................................... 8
1-2. Typical Application Schematic of TLC6948 With 48-Multiplexing ..................................................... 9
2-1. Common Shift Register and Data Latch Configuration................................................................ 10
2-2. FC1 Register................................................................................................................ 11
2-3. FC2 Register................................................................................................................ 12
2-4. FC3 Register................................................................................................................ 13
2-5. FC4 Register................................................................................................................ 15
2-6. WRTFC_EN Command and WRTFC1 Command..................................................................... 16
2-7. WRTFC_EN Command and WRTFC2 Command..................................................................... 17
2-8. WRTFC_EN Command and WRTFC3 Command..................................................................... 17
2-9. WRTFC_EN Command and WRTFC4 Command..................................................................... 17
2-10. READFC1 Command...................................................................................................... 18
2-11. READFC2 Command...................................................................................................... 18
2-12. READFC3 Command...................................................................................................... 19
2-13. READFC4 Command...................................................................................................... 19
2-14. LED Open-Detection Circuit .............................................................................................. 21
2-15. Bit Arrangement in the LOD Data Register ............................................................................ 21
2-16. Read LOD Data ............................................................................................................ 22
2-17. LED-Open Detection Process ............................................................................................ 23
2-18. Caterpillar Issue ............................................................................................................ 24
2-19. Power-Save Mode.......................................................................................................... 25
3-1. BANK-Selection Exchange Operation................................................................................... 27
3-2. TLC694x Memory-Unit Structure......................................................................................... 28
3-3. Write Grayscale Data Into Selected Memory Unit ..................................................................... 29
3-4. Write Grayscale Data Into Selected Memory BANK................................................................... 30
3-5. Send VSYNC Command .................................................................................................. 31
3-6. Conventional 8+8 Mode of ES PWM (Static)........................................................................... 33
3-7. TLC6946 Multiplexed 8+8 Mode of ES PWM (32-Multiplexing)...................................................... 33
3-8. TLC6948 Multiplexed 8+8 Mode of ES PWM (48-Multiplexing)...................................................... 34
3-9. Conventional 7+9 Mode of ES PWM (Static)........................................................................... 35
3-10. TLC6946 Multiplexed 7+9 Mode of ES PWM (32-Multiplexing)...................................................... 35
3-11. TLC6948 Multiplexed 7+9 Mode of ES PWM (48-Multiplexing)...................................................... 36
3-12. Timing Sequence for 32-Multiplexing.................................................................................... 36
3-13. Timing Sequence for 48-Multiplexing.................................................................................... 37
4-1. TLC6946 LED Display Board............................................................................................. 38
4-2. 14-Bit GS Data for the TLC6946 Device................................................................................ 42
4-3. TLC6948 LED Display Board............................................................................................. 43
4-4. 13-bit GS Data for TLC6948.............................................................................................. 46

www.ti.com
5
SLVUBF4A–February 2018–Revised June 2019
Submit Documentation Feedback Copyright © 2018–2019, Texas Instruments Incorporated
List of Tables
TI Information — Selective Disclosure
List of Tables
2-1. FC1 Access Type Codes.................................................................................................. 11
2-2. FC1 Register Field Descriptions.......................................................................................... 11
2-3. FC2 Register Field Descriptions.......................................................................................... 12
2-4. LGSC1 GCLK Period ...................................................................................................... 13
2-5. FC3 Register Field Descriptions.......................................................................................... 13
2-6. Number of TLC6946 Scan Lines ........................................................................................ 14
2-7. Number of TLC6948 Scan Lines ........................................................................................ 14
2-8. FC4 Register Field Descriptions.......................................................................................... 15
2-9. Description of Commands to Write Function-Control Data ........................................................... 16
2-10. Description of Commands to Read Function-Control Data .......................................................... 18
2-11. Global BC Data vs Constant-Current Ratio and Set Current Value ................................................. 20
2-12. Maximum Constant Current vs External Resistor RIREF................................................................ 20
2-13. Description of READLOD Command ................................................................................... 22
3-1. WRTGS Command Description .......................................................................................... 29
3-2. VSYNC Command Description........................................................................................... 31
4-1. TLC6946 Design Parameters............................................................................................. 38
4-2. TLC6946 System Structure ............................................................................................... 39
4-3. SCLK and GCLK Frequency.............................................................................................. 39
4-4. Channel Current and Brightness Control Method 1 ................................................................... 40
4-5. Channel Current and Brightness Control Method 2 ................................................................... 40
4-6. Function-Control Registers For Red Color LEDs ...................................................................... 40
4-7. Function-Control Registers For Green Color LEDs.................................................................... 40
4-8. Function-Control Registers For Blue Color LEDs...................................................................... 41
4-9. TLC6948 Design Parameters............................................................................................. 43
4-10. TLC6948 System Structure ............................................................................................... 44
4-11. SCLK and GCLK Frequency.............................................................................................. 44
4-12. Channel Current and Brightness Control Settings..................................................................... 44
4-13. Function-Control Registers For Red Color LEDs ...................................................................... 44
4-14. Function-Control Registers For Green Color LEDs.................................................................... 45
4-15. Function-Control Registers For Blue Color LEDs...................................................................... 45

6SLVUBF4A–February 2018–Revised June 2019
Submit Documentation Feedback
Copyright © 2018–2019, Texas Instruments Incorporated
Read This First
TI Information — Selective Disclosure
Preface
SLVUBF4A–February 2018–Revised June 2019
Read This First
About This Manual
This Technical Reference Manual (TRM) details the integration, the environment, the functional
description, and the programming models for each peripheral and subsystem in the device.
The TRM should not be considered a substitute for the data sheet, rather a companion guide that should
be used alongside the device-specific data sheet to understand the details to program the device. The
primary purpose of the TRM is to abstract the programming details of the device from the data manual.
This allows the data sheet to outline the high-level features of the device without unnecessary information
about register descriptions or programming models.
Related Documentation From Texas Instruments
For a complete listing of related documentation and development-support tools for these devices, visit the
Texas Instruments Web site at http://www.ti.com.
Trademarks
All trademarks are the property of their respective owners.

7
SLVUBF4A–February 2018–Revised June 2019
Submit Documentation Feedback Copyright © 2018–2019, Texas Instruments Incorporated
Introduction
TI Information — Selective Disclosure
Chapter 1
SLVUBF4A–February 2018–Revised June 2019
Introduction
1.1 Overview
The TLC6946 and TLC6948 devices are 16-channel constant-current sink LED drivers supporting 1- to 32-
and 1- to 48-multiplexing, respectively. Each channel has an individually adjustable 65,536-step pulse-
width modulation (PWM) grayscale (GS) control. The TLC6946 and TLC6948 devices implement 16Kb
and 24Kb display memory, respectively, to increase the visual refresh rate and to decrease the grayscale
data-writing frequency.
The TLC6946 and TLC6948 devices support current from 0.3 mA to 25 mA for each channel, with 1%
typical channel-to-channel deviation and 1% typical device-to-device deviation. The maximum current
value of all 16 channels is set by an external IREF resistor, and can be adjusted by the 128-step global
brightness control (BC). The device also implements low-grayscale enhancement technology to solve the
coupling issue and improve the display quality in low-grayscale conditions. These features make the
TLC6946 and TLC6948 devices more suitable for high-density multiplexing LED-matrix-display and LED-
panel applications.
The TLC6946 and TLC6948 devices integrate enhanced circuits to solve the various display issues in fine-
pitch LED display applications: the low-grayscale uniformity issue, coupling issue, ghosting issue, and
caterpillar issue. The TLC6946 and TLC6948 devices feature an LED-open detection function, and the
error detection results can be read via a serial-data interface port. Thermal shutdown and IREF-resistor
short protection help ensure high system reliability. The TLC6946 and TLC6948 devices also have a smart
power-save mode that sets the total current consumption to 1 mA (typ) when all outputs are off.
1.2 Features
• Power Supply Voltage Range
– VCC Voltage Range: 3 V to 5.5 V
– VLED Voltage Range: up to VCC+0.3 V
• 16 Constant-Current-Sink Channels
– 0.3 mA to 25 mA (3 V ≤VCC ≤5.5 V)
– Channel-to-Channel Current Deviation: ±1% (typ), ±3% (max)
– Device-to-Device Current Deviation: ±1% (typ), ±3% (max)
– Low Knee Voltage: 0.3 V (typ) at 10 mA
• 7-Bit (128 Steps) Global Brightness Control (BC)
• 16-Bit (65,536 Steps) Enhanced Spectrum PWM Grayscale Control
• Built-In 16K-bit Memory Supports 32-Multiplexing (TLC6946)
• Built-In 24K-bit Memory Supports 48-Multiplexing (TLC6948)
• LED Display Performance Enhancement
– Low-Grayscale Uniformity Improvement
– Low-Grayscale Coupling-Issue Elimination
– Ghosting Removal
– Caterpillar Elimination
• High-Speed Serial-Data Interface
– Data Transfer Rate: 33 MHz (max)

DATA
SCLK
LAT
GSCLK
OUT0 OUT15

SIN
SCLK
LAT
GCLK
IREF GND
VCC
SOUT
TLC6946
Device 1
RIREF
VCC
OUT0 OUT15

SIN
SCLK
LAT
GCLK
IREF GND
VCC
SOUT
TLC6946
Device 2
RIREF
VCC
3
DATA BACK
VLED
VLED
VLED



OUT0 OUT15

SIN
SCLK
LAT
GCLK
IREF GND
VCC
SOUT
TLC6946
Device 3
RIREF
VCC








Line 0
Line n
Line 31
Controller
SW 0
SW n
SW 31
Applications www.ti.com
8SLVUBF4A–February 2018–Revised June 2019
Submit Documentation Feedback
Copyright © 2018–2019, Texas Instruments Incorporated
Introduction
TI Information — Selective Disclosure
– Grayscale Control Clock: 33 MHz (max)
– Extended Grayscale Control Rate: 50 MHz (max)
• Diagnostics and Protection
– LED-Open Detection (LOD)
– IREF-Resistor Short Protection (ISP)
– Thermal Shutdown (TSD)
• Intelligent Power-Save Mode
1.3 Applications
• Mono-Color, Multi-Color, Full-Color LED Displays
• High-Refresh-Rate LED Video Displays
• High-Density, Fine-Pitch LED-Matrix Displays
1.4 Typical Application Schematic
Figure 1-1. Typical Application Schematic of TLC6946 With 32-Multiplexing

DATA
SCLK
LAT
GSCLK
OUT0 OUT15

SIN
SCLK
LAT
GCLK
IREF GND
VCC
SOUT
TLC6948
Device 1
RIREF
VCC
OUT0 OUT15

SIN
SCLK
LAT
GCLK
IREF GND
VCC
SOUT
TLC6948
Device 2
RIREF
VCC
3
DATA BACK
VLED
VLED
VLED



OUT0 OUT15

SIN
SCLK
LAT
GCLK
IREF GND
VCC
SOUT
TLC6948
Device 3
RIREF
VCC








Line 0
Line n
Line 47
Controller
SW 0
SW n
SW 47
www.ti.com Typical Application Schematic
9
SLVUBF4A–February 2018–Revised June 2019
Submit Documentation Feedback Copyright © 2018–2019, Texas Instruments Incorporated
Introduction
TI Information — Selective Disclosure
Figure 1-2. Typical Application Schematic of TLC6948 With 48-Multiplexing

SIN
SCLK SOUT
16-bit
This data latch pulse is generated when
the WRTFC command is received.
16-bit
Common Shift Register
Function Control Registers
Grayscale (GS) Memory Units
16-bit
This data latch pulse is generated when the WRTGS command is
received. Memory unit is selected by internal counters.
GS Bit 15GS Bit 14GS Bit 13GS Bit 12GS Bit 2 GS Bit 3GS Bit 1GS Bit 0
MSBLSB
«
FC4 Bit 15FC4 Bit 14FC4 Bit 13FC4 Bit 12FC4 Bit 2 FC4 Bit 3FC4 Bit 1FC4 Bit 0
MSBLSB
«
FC4
FC3 Bit 15FC3 Bit 14FC3 Bit 13FC3 Bit 12FC3 Bit 2 FC3 Bit 3FC3 Bit 1FC3 Bit 0
MSBLSB
«
FC3
FC2 Bit 15FC2 Bit 14FC2 Bit 13FC2 Bit 12FC2 Bit 2 FC2 Bit 3FC2 Bit 1FC2 Bit 0
MSBLSB
«
FC2
FC1 Bit 15FC1 Bit 14FC1 Bit 13FC1 Bit 12FC1 Bit 2 FC1 Bit 3FC1 Bit 1FC1 Bit 0
MSBLSB
«
FC1
Common Data
Bit 15
Common Data
Bit 14
Common Data
Bit 13
Common Data
Bit 12
Common Data
Bit 2 Common Data Bit 3
Common Data
Bit 1
Common Data
Bit 0
MSBLSB
«
Common Shift Register
10 SLVUBF4A–February 2018–Revised June 2019
Submit Documentation Feedback
Copyright © 2018–2019, Texas Instruments Incorporated
Function Control
TI Information — Selective Disclosure
Chapter 2
SLVUBF4A–February 2018–Revised June 2019
Function Control
2.1 Function-Control Registers
Function-control registers are used to store the configuration information which controls the TLC694x
operating mode. There are four function-control register groups integrated in the TLC694x device, FC1,
FC2, FC3, and FC4. The following sections give detailed description of each function-control register
group, and how to write function-control data into each function-control register group.
2.1.1 Write Function-Control Data Through a Common Shift Register
The common shift register is 16 bits long and is used to shift data from the SIN pin into the TLC694x
device. The data shifted into the register can be latched into the grayscale (GS) memory unit or latched
into the function-control (FC) registers, depending on the command received.
Figure 2-1 shows the configuration of the common shift register and the data latches.
Figure 2-1. Common Shift Register and Data Latch Configuration

www.ti.com Function-Control Registers
11
SLVUBF4A–February 2018–Revised June 2019
Submit Documentation Feedback Copyright © 2018–2019, Texas Instruments Incorporated
Function Control
TI Information — Selective Disclosure
2.1.2 Function-Control Register 1 (FC1)
Function-control register 1 (FC1) is used to set the LED-open detection (LOD) threshold voltage, LOD
caterpillar-removal function, and low-grayscale enhancement function.
Complex bit access types are encoded to fit into small table cells. Table 2-1 shows the codes that are
used for access types in this section.
Table 2-1. FC1 Access Type Codes
Access Type Code Description
Read Type
R R Read
Write Type
W W Write
Reset or Default Value
-nValue after reset or the default
value
Table 2-2 shows the bit assignments for the FC1 register.
Figure 2-2. FC1 Register
15 14 13 12 11 10 9 8
REVERSE INTERFERENCE
R/W-0110b R/W-0110b
76543210
LGSE LODRM_EN LODVTH LGSE_E
R/W-0000b R/W-1b R/W-00b R/W-0b
Table 2-2. FC1 Register Field Descriptions
Bit Field Type Reset Description
15–12 REVERSE R/W 0110b Set the reverse voltage level at OUTn. The OUTn voltage level
decreases with register data settings from 0000b to 1111b.
0000b = Highest level
…
0110b = Medium level
…
1111b = Lowest level
11–8 INTERFERENCE R/W 0110b Set the interference improvement level at OUTn. The OUTn
interference-improvement level increases with register data setting
from 0000b to 1111b.
0000b = Lowest improvement
…
0110b = Medium improvement
…
1111b = Highest improvement
7–4 LGSE R/W 0000b Set the low-grayscale uniformity enhancement level. LGSE level
increases with register data setting from 0000b to 1111b.
0000b = Lowest enhancement
…
1111b = Highest enhancement
3 LODRM_EN R/W 1b Set the LED-open caterpillar-removal function.
0b = LOD removal function is disabled.
1b = LOD removal function is enabled.

Function-Control Registers www.ti.com
12 SLVUBF4A–February 2018–Revised June 2019
Submit Documentation Feedback
Copyright © 2018–2019, Texas Instruments Incorporated
Function Control
TI Information — Selective Disclosure
Table 2-2. FC1 Register Field Descriptions (continued)
Bit Field Type Reset Description
2–1 LODVTH R/W 00b Set the LED-open detection (LOD) threshold voltage.
00b = 0.2 V
01b = 0.5 V
10b = 0.9 V
11b = 1.2 V
0 LGSE_E R/W 0b Set the enhanced LGSE function.
0b = Default LSGE
1b = Enhanced LGSE
2.1.3 Function-Control Register 2 (FC2)
Function-control register 2 (FC2) is used to set the PWM operating mode, precharge function, power-save
mode, and delay time.
Table 2-3 shows the bit assignments for the FC2 register.
Figure 2-3. FC2 Register
15 14 13 12 11 10 9 8
LGSC1 RESERVED PCHG_DIS LOW_KNEE
R/W-010b R-000b R/W-0b R/W-0b
76543210
PWM_SEL PWM_ALIGN GCLK_EDGE PSM_EN RESERVED RESERVED TD0
R/W-0b R/W-0b R/W-0b R/W-0b R-0b R-0b R/W-01b
Table 2-3. FC2 Register Field Descriptions
Bit Field Type Reset Description
15–13 LGSC1 R/W 010b Set the low-grayscale coupling improvement 1 level. The LGSC1
function requires some GCLK periods during each display sub-
period.
See Table 2-4 for the details about LSGC1 GCLK periods.
12–10 RESERVED R 000b Reserved
9 PCHG_DIS R/W 0b Set the precharge function.
0b = Precharge function is enabled.
1b = Precharge function is disabled.
8 V_KNEE R/W 0b Set the knee voltage level.
0b = V(KNEE) is 0.3 V at 10 mA , and channel current ranges from 0.3
mA to 20 mA
1b = V(KNEE) is 0.5 V at 10 mA , and channel current ranges from 0.3
mA to 25 mA
7 PWM_SEL R/W 0b Set the PWM operating mode.
0b = 8+8 ES PWM mode
1b = 7+9 ES PWM mode
6 PWM_ALIGN R/W 0b Set the PWM alignment mode.
0b = All PWM leading edges aligned at the beginning of each sub-
period
1b = All PWM trailing edges aligned at the end of each sub-period
5 GCLK_EDGE R/W 0b Set the GCLK edge for PWM operation
0b = GCLK rising-edge operating mode
1b = Dual-edge (both rising- and falling-edge) operating mode
4 PSM_EN R/W 0b Set the mode of the power-save function.
0b = Power-save function is disabled.
1b = Power-save function is enabled.

www.ti.com Function-Control Registers
13
SLVUBF4A–February 2018–Revised June 2019
Submit Documentation Feedback Copyright © 2018–2019, Texas Instruments Incorporated
Function Control
TI Information — Selective Disclosure
Table 2-3. FC2 Register Field Descriptions (continued)
Bit Field Type Reset Description
3 RESERVED R 0b Reserved
2 RESERVED R 0b Reserved
1–0 TD0 R/W 01b Set the td(0) delay time.
00b = td(0) from SCLK↑to SOUT data change is 5 ns.
01b = td(0) from SCLK↑to SOUT data change is 10 ns.
10b = td(0) from SCLK↑to SOUT data change is 20 ns.
11b = td(0) from SCLK↓to SOUT data change is 10 ns.
Table 2-4 shows the details about the required GCLK number for each sub-period.
Table 2-4. LGSC1 GCLK Period
LGSC1 GCLK NUMBER
BIT 15 BIT 14 BIT 13 PWM_SEL = 0 (8+8 ES PWM
MODE) PWM_SEL = 1 (7+9 ES PWM MODE)
0 0 0 14 GCLK periods 8 GCLK periods
0 0 1 20 GCLK periods 10 GCLK periods
0 1 0 34 GCLK periods (Default) 18 GCLK periods (Default)
0 1 1 54 GCLK periods 28 GCLK periods
1 0 0 72 GCLK periods 36 GCLK periods
1 0 1 90 GCLK periods 46 GCLK periods
1 1 0 108 GCLK periods 54 GCLK periods
1 1 1 124 GCLK periods 62 GCLK periods
2.1.4 Function-Control Register 3 (FC3)
Function-control register 3 (FC3) is used to set the BC, scan line number, and middle-grayscale
enhancement.
Table 2-5 shows the bit assignments for the FC3 register.
Figure 2-4. FC3 Register
15 14 13 12 11 10 9 8
BC SCAN_LINE_4
8
R/W-011 0110b R/W-0b
76543210
SCAN_LINE RESERVED RESERVED
R/W-0 0000b R-01b R-0b
Table 2-5. FC3 Register Field Descriptions
Bit Field Type Reset Description
15–9 BC R/W 011 0110b Set the global brightness control data for all channels.
See Section 2.3.1.1 for details about the global brightness control
and current setting.
8 SCAN_LINE_48 R/W 0b Set the number of TLC6948 scan lines.
See Table 2-7 for details about setting the number of TLC6948 scan
lines.
This bit is reserved LOW in TLC6946 device.

Function-Control Registers www.ti.com
14 SLVUBF4A–February 2018–Revised June 2019
Submit Documentation Feedback
Copyright © 2018–2019, Texas Instruments Incorporated
Function Control
TI Information — Selective Disclosure
Table 2-5. FC3 Register Field Descriptions (continued)
Bit Field Type Reset Description
7–3 SCAN_LINE R/W 0 0000b Set the scan line number.
See Table 2-6 for the details about setting the number of TLC6946
scan lines.
See Table 2-7 for the details about setting the number of TLC6948
scan lines.
2–1 RESERVED R 01b Reserved
0 RESERVED R 0b Reserved
Table 2-6 shows the details about the number setting of TLC6946 scan lines.
Table 2-6. Number of TLC6946 Scan Lines
SCAN_LINE NUMBER OF TLC6946 SCAN LINES
BIT 7 BIT 6 BIT 5 BIT 4 BIT 3
0 0 0 0 0 1 (Default)
0 0 0 0 1 2
0 0 0 1 0 3
... ... ... ... ... ...
0 1 1 1 1 16
... ... ... ... ... ...
1 1 1 0 1 30
1 1 1 1 0 31
1 1 1 1 1 32
Table 2-7 shows the details about the number setting of TLC6948 scan lines.
Table 2-7. Number of TLC6948 Scan Lines
SCAN_LINE_48 SCAN_LINE NUMBER OF TLC6948 SCAN LINES
BIT 8 BIT 7 BIT 6 BIT 5 BIT 4 BIT 3
0 0 0 0 0 0 1 (Default)
0 0 0 0 0 1 2
0 0 0 0 1 0 3
... ... ... ... ... ... ...
0 0 1 1 1 1 16
... ... ... ... ... ... ...
0 1 1 1 0 1 30
0 1 1 1 1 0 31
0 1 1 1 1 1 32
... ... ... ... ... ... ...
1 0 1 1 0 1 46
1 0 1 1 1 0 47
1 0 1 1 1 1 48
2.1.5 Function-Control Register 4 (FC4)
Function-control register 4 (FC4) is used to set the precharge and one-shot operating modes.
Table 2-8 shows the bit assignments for the FC4 register.

www.ti.com Function-Control Registers
15
SLVUBF4A–February 2018–Revised June 2019
Submit Documentation Feedback Copyright © 2018–2019, Texas Instruments Incorporated
Function Control
TI Information — Selective Disclosure
Figure 2-5. FC4 Register
15 14 13 12 11 10 9 8
RESERVED PWM_ALIGN2 RESERVED RESERVED RESERVED RESERVED RESERVED
R-0b R/W-0b R-0b R-0b R-0b R-0b R-0b
76543210
RESERVED RESERVED LGSE2 LGSE2 RESERVED
R-0b R-0b R/W-0b R/W-0b R-0000b
Table 2-8. FC4 Register Field Descriptions
Bit Field Type Reset Description
15 RESERVED R 0b Reserved
14 PWM_ALIGN2 R/W 0b Set the PWM alignment mode in LGSC1 time.
0b = All PWM leading edges aligned at the beginning of each
LGSC1 time
1b = All PWM trailing edges aligned at the end of each LGSC1 time
13-6 RESERVED R 00000000b Reserved
5-4 LGSE2 R/W 00b Set the low-grayscale de-coupling enhancement level. LGSE level
increases with register data setting from 00b to 11b.
00b = Lowest de-coupling enhancement
…
11b = Highest de-coupling enhancement
3-0 RESERVED R 0000b Reserved

1 2 14 15
SIN
SCLK
LAT
FC1
Bit 15 FC1 Bit 14 FC1 Bit 5 FC1 Bit 4 FC1 Bit 2 FC1 Bit 1
FC1
Bit 3 FC1 Bit 0
1 2 11 12 16151413
FC1 Old FC1 Data New FC1 Data
Other FCx
(x = 2, 3, 4) FCx Data
Write FC1 Register:
WRTFC_EN
(15 SCLK rising edges) WRTFC1 (5 SCLK rising edges)
Function-Control Commands www.ti.com
16 SLVUBF4A–February 2018–Revised June 2019
Submit Documentation Feedback
Copyright © 2018–2019, Texas Instruments Incorporated
Function Control
TI Information — Selective Disclosure
2.2 Function-Control Commands
2.2.1 Write Function-Control Register
The TLC694x device uses the WRTFC_EN and WRTFCx command (x = 1, 2, 3, 4) to latch the common
shift register data into the function-control registers. These commands are distinguished by the number of
the SCLK rising edges included in the LAT pulse.
Table 2-9 describes more about these commands.
Table 2-9. Description of Commands to Write Function-Control Data
COMMAND NAME NUMBER OF SCLK RISING EDGES WHEN LAT IS
HIGH DESCRIPTION
WRTFC_EN 15 Enable the write-function-control-data command. This WRTFC_EN command must always be input before writing function-control data. Otherwise, the device
ignores the WRTFCx commands.
WRTFC1 5 Command to write function-control data to the FC1 register. The 16-bit function-control data in the common shift register are copied to the FC1
register.
WRTFC2 7 Command to write function-control data to the FC2 register. The 16-bit function-control data in the common shift register are copied to the FC2
register.
WRTFC3 9 Command to write function-control data to the FC3 register. The 16-bit function-control data in the common shift register are copied to the FC3
register.
WRTFC4 11 Command to write function-control data to the FC4 register. The 16-bit function-control data in the common shift register are copied to the FC4
register.
Note that the WRTFC_EN command must be received before WRTFCx commands. Otherwise, the
TLC694x device ignores the WRTFCx commands.
Figure 2-6 to Figure 2-9 show the detailed timing diagrams of the function-control-register write operations.
Figure 2-6. WRTFC_EN Command and WRTFC1 Command

1 2 14 15
SIN
SCLK
LAT
FC4
Bit 15 FC4 Bit 14 FC4 Bit 11 FC4 Bit 10 FC4 Bit 1
FC4
Bit 9 FC4 Bit 0
1 2 5 6 16157
FC4
Other FCx
(x = 1, 2, 3) FCx Data
Write FC4 Register:
Old FC4 Data New FC4 Data
WRTFC4
(11 SCLK rising edges)
WRTFC_EN
(15 SCLK rising edges)
1 2 14 15
SIN
SCLK
LAT
FC3
Bit 15 FC3 Bit 14 FC3 Bit 9 FC3 Bit 8 FC3 Bit 1
FC3
Bit 7 FC3 Bit 0
1 2 7 8 16159
FC3
Other FCx
(x = 1, 2, 4) FCx Data
Write FC3 Register:
Old FC3 Data New FC3 Data
WRTFC3
(9 SCLK rising edges)
WRTFC_EN
(15 SCLK rising edges)
1 2 14 15
SIN
SCLK
LAT
FC2
Bit 15 FC2 Bit 14 FC2 Bit 7 FC2 Bit 6 FC2 Bit 1
FC2
Bit 5 FC2 Bit 0
1 2 9 10 161511
FC2
FCx Data
Old FC2 Data New FC2 Data
Write FC2 Register:
Other FCx
(x = 1, 3, 4)
WRTFC2
(7 SCLK rising edges)
WRTFC_EN
(15 SCLK rising edges)
www.ti.com Function-Control Commands
17
SLVUBF4A–February 2018–Revised June 2019
Submit Documentation Feedback Copyright © 2018–2019, Texas Instruments Incorporated
Function Control
TI Information — Selective Disclosure
Figure 2-7. WRTFC_EN Command and WRTFC2 Command
Figure 2-8. WRTFC_EN Command and WRTFC3 Command
Figure 2-9. WRTFC_EN Command and WRTFC4 Command
2.2.2 Read Function-Control Register
The TLC694x device also provides the method to read back the function-control data from internal
registers. Similar to function-control data-write operation, the TLC694x device uses the number of SCLK
rising edges when LAT is HIGH to distinguish the function-control data-read command. Table 2-10
describes the read function-control data commands.
Once any of the function-control data-read commands is received, the 16-bit data in the corresponding
function-control register are copied to the common shift register at the falling edge of the LAT signal. Then
the data loaded in the common shift register can be read out from SOUT, synchronized with SCLK rising
edge.
Figure 2-10 to Figure 2-13 show the timing diagrams of function-control data-read commands.

SIN
Read FC2 Register:
1 2 7 8 1 2 11 12 16151413
16-bit FC2 Data
FC2 Bit 15
READFC2
FC2
Bit 14 FC2 Bit 13 FC2
Bit 4 FC2 Bit 3 FC2 Bit 2 FC2 Bit 1 FC2 Bit 0
SCLK
LAT
FC2
SOUT
16-bit FC2 data are copied to 16-bit common shift register at the LAT falling
edge (8 SCLK rising edges must be input while LAT is high)
1 2 5 6
SIN
SCLK
LAT
1 2 11 12 16151413
FC1 16-bit FC1 Data
SOUT FC1 Bit 15
Read FC1 Register:
READFC1
FC1
Bit 14 FC1 Bit 13 FC1
Bit 4 FC1 Bit 3 FC1 Bit 2 FC1 Bit 1 FC1 Bit 0
16-bit FC1 data are copied to 16-bit common shift register at the LAT falling
edge (6 SCLK rising edges must be input while LAT is high)
Function-Control Commands www.ti.com
18 SLVUBF4A–February 2018–Revised June 2019
Submit Documentation Feedback
Copyright © 2018–2019, Texas Instruments Incorporated
Function Control
TI Information — Selective Disclosure
Table 2-10. Description of Commands to Read Function-Control Data
COMMAND NAME NUMBER OF SCLK RISING EDGES WHEN LAT IS
HIGH DESCRIPTION
READFC1 6 Command to read function-control data from the FC1 register. The 16-bit data
in the FC1 data latch are copied to the common shift register at the falling edge
of the LAT signal. The loaded data can be read out from SOUT synchronized
with the SCLK rising edge.
READFC2 8 Command to read function-control data from the FC2 register. The 16-bit data
in the FC2 data latch are copied to the common shift register at the falling edge
of the LAT signal. The loaded data can be read out from SOUT synchronized
with the SCLK rising edge.
READFC3 10 Command to read function-control data from the FC3 register. The 16-bit data
in the FC3 data latch are copied to the common shift register at the falling edge
of the LAT signal. The loaded data can be read out from SOUT synchronized
with the SCLK rising edge.
READFC4 12 Command to read function-control data from the FC4 register. The 16-bit data
in the FC4 data latch are copied to the common shift register at the falling edge
of the LAT signal. The loaded data can be read out from SOUT synchronized
with the SCLK rising edge.
Figure 2-10. READFC1 Command
Figure 2-11. READFC2 Command

SIN
Read FC4 Register:
1 2 11 12 1 2 11 12 16151413
16-bit FC4 Data
FC4 Bit 15
READFC4
FC4
Bit 14 FC4 Bit 13 FC4
Bit 4 FC4 Bit 3 FC4 Bit 2 FC4 Bit 1 FC4 Bit 0
SCLK
LAT
FC4
SOUT
16-bit FC4 data are copied to 16-bit common shift register at the LAT falling
edge (12 SCLK rising edges must be input while LAT is high)
SIN
Read FC3 Register:
1 2 9 10 1 2 11 12 16151413
16-bit FC3 Data
FC3 Bit 15
READFC3
FC3
Bit 14 FC3 Bit 13 FC3
Bit 4 FC3 Bit 3 FC3 Bit 2 FC3 Bit 1 FC3 Bit 0
SCLK
LAT
FC3
SOUT
16-bit FC3 data are copied to 16-bit common shift register at the LAT falling
edge (10 SCLK rising edges must be input while LAT is high)
www.ti.com Function-Control Commands
19
SLVUBF4A–February 2018–Revised June 2019
Submit Documentation Feedback Copyright © 2018–2019, Texas Instruments Incorporated
Function Control
TI Information — Selective Disclosure
Figure 2-12. READFC3 Command
Figure 2-13. READFC4 Command

IREF IREF
IREF OLCmax OLCmax
V (V) V (V) 1 BC
R (k ) Gain 32
I (mA) I (mA) 8 144
§ ·
: u u u 
¨ ¸
© ¹
Function-Control Description www.ti.com
20 SLVUBF4A–February 2018–Revised June 2019
Submit Documentation Feedback
Copyright © 2018–2019, Texas Instruments Incorporated
Function Control
TI Information — Selective Disclosure
2.3 Function-Control Description
2.3.1 Global Brightness Control and Current Setting
2.3.1.1 Global Brightness Control (BC)
The TLC694x device is able to adjust the output current of all constant-current outputs simultaneously.
This function is called global brightness control (BC). The global BC for all outputs is programmed with a
7-bit word, thus all output currents can be adjusted in 128 steps from 12.5% to 100.69% for a given
current-programming resistor, RIREF (See Table 2-11). BC data can be set through the serial interface.
When the BC data changes, the output current also changes immediately. When the device is powered
on, the default BC data in the function-control register is set to 36h as the initial value.
Table 2-11. Global BC Data vs Constant-Current Ratio and Set Current Value
BC DATA GAIN RATIO OF GAIN
/ GAIN_MAX (AT
MAX BC)
IOUT (mA) (IOLCmax= 25
mA, TYP) IOUT (mA) (IOLCmax= 2.4 mA, TYP)
BINARY DECIMAL HEX
000 0000 0 00 4 12.5% 3.13 0.3
000 0001 1 01 4.22 13.19% 3.3 0.32
000 0010 2 02 4.44 13.88% 3.47 0.33
... ... ... ... ... ... ...
011 0101 53 35 15.78 49.31% 12.33 1.18
011 0110
(Default) 54 (Default) 36 (Default) 16 50% 12.5 1.2
011 0111 55 37 16.22 50.69% 12.67 1.22
... ... ... ... ... ... ...
111 1101 125 7D 31.78 99.31% 24.83 2.38
111 1110 126 7E 32 100% 25 2.40
111 1111 127 7F 32.22 100.69% 25.17 2.42
2.3.1.2 Select RIREF for Maximum Channel Current
The maximum current per channel, IOLCmax, is determined by resistor RIREF, placed between the IREF and
GND pins. The voltage on IREF is typically 0.8 V. RIREF can be calculated by Equation 1.
where
• VIREF is the internal reference voltage on IREF (0.8 V, typical)
• IOLCmax is the maximum current for each channel (see Table 2-11)
• Gain is the current gain at each BC (See Table 2-12) (1)
RIREF must be between 1.02 kΩand 10.7 kΩin order to hold the channel sink current IOLC between 25 mA
(typ) and 0.3 mA (typ). Otherwise, the output may be unstable.
Table 2-12. Maximum Constant Current vs External Resistor RIREF
IOLCmax (mA) RIREF (kΩ, typ)
25 1.02
20 1.28
15 1.71
10 2.56
5 5.12
2.4 10.7