Texas Instruments TPS54521EVM-607 User manual

User’s Guide
TPS54521 Step-Down Converter Evaluation Module User's
Guide
Table of Contents
1 Introduction.............................................................................................................................................................................3
1.1 Background........................................................................................................................................................................ 3
1.2 Performance Specification Summary.................................................................................................................................3
1.3 Modifications...................................................................................................................................................................... 4
2 Test Setup and Results.......................................................................................................................................................... 5
2.1 Input / Output Connections................................................................................................................................................ 5
2.2 Efficiency............................................................................................................................................................................6
2.3 Output Voltage Load Regulation........................................................................................................................................ 7
2.4 Output Voltage Line Regulation......................................................................................................................................... 7
2.5 Load Transients..................................................................................................................................................................8
2.6 Loop Characteristics.......................................................................................................................................................... 8
2.7 Output Voltage Ripple........................................................................................................................................................ 9
2.8 Input Voltage Ripple........................................................................................................................................................... 9
2.9 Powering Up.....................................................................................................................................................................10
2.10 Hiccup Overcurrent Mode Operation..............................................................................................................................11
2.11 Thermal Characteristics..................................................................................................................................................11
3 Board Layout.........................................................................................................................................................................13
3.1 Layout.............................................................................................................................................................................. 13
3.2 Estimated Circuit Area..................................................................................................................................................... 14
4 Schematic and Bill of Materials...........................................................................................................................................15
4.1 Schematic........................................................................................................................................................................ 15
4.2 Bill of Materials.................................................................................................................................................................17
5 Revision History................................................................................................................................................................... 17
List of Figures
Figure 2-1. TPS54521EVM-607 Efficiency.................................................................................................................................. 6
Figure 2-2. TPS54521EVM-607 Low Current Efficiency..............................................................................................................6
Figure 2-3. TPS54521EVM-607 Load Regulation....................................................................................................................... 7
Figure 2-4. TPS54521EVM-607 Line Regulation........................................................................................................................ 7
Figure 2-5. TPS54521EVM-607 Transient Response................................................................................................................. 8
Figure 2-6. TPS54521EVM-607 Loop Response........................................................................................................................ 8
Figure 2-7. TPS54521EVM-607 Output Ripple........................................................................................................................... 9
Figure 2-8. TPS54521EVM-607 Input Ripple.............................................................................................................................. 9
Figure 2-9. TPS54521EVM-607 Start-Up Relative to VIN .........................................................................................................10
Figure 2-10. TPS54521EVM-607 Start-Up Relative to Enable..................................................................................................10
Figure 2-11. TPS54521EVM-607 Overcurrent Hiccup Mode..................................................................................................... 11
Figure 2-12. TPS54521EVM-607 Thermal Image......................................................................................................................11
Figure 2-13. TPS54521EVM-607 Junction Temperature vs Load Current................................................................................ 12
Figure 3-1. TPS54521EVM-607 Top-Side Layout (Top View)....................................................................................................13
Figure 3-2. TPS54521EVM-607 Layer 2 (X-Ray Top View).......................................................................................................13
Figure 3-3. TPS54521EVM-607 Layer 3 (X-Ray Top View).......................................................................................................14
Figure 3-4. TPS54521EVM-607 Bottom-Side Layout (Bottom View)........................................................................................ 14
Figure 3-5. TPS54521EVM-607 Top-Side Assembly.................................................................................................................14
Figure 4-1. TPS54521EVM-607 Schematic...............................................................................................................................16
List of Tables
Table 1-1. Input Voltage and Output Current Summary...............................................................................................................3
Table 1-2. TPS54521EVM-607 Performance Specification Summary.........................................................................................3
Table 1-3. Output Voltages Available...........................................................................................................................................4
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Table 2-1. EVM Connectors and Test Points............................................................................................................................... 5
Table 4-1. TPS54521EVM-607 Bill of Materials.........................................................................................................................17
Trademarks
All trademarks are the property of their respective owners.
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1 Introduction
This user's guide contains background information for the TPS54521, as well as support documentation for
the TPS54521EVM-607 evaluation module (HPA607). Also included are the performance specifications, the
schematic, and the bill of materials for the TPS54521EVM-607.
1.1 Background
The TPS54521 dc/dc converter is designed to provide up to a 5 A output. The TPS54521 implements split input
power rails with separate input voltage inputs for the power stage and control circuitry. The power stage input
(PVIN) is rated for 1.6 V to 17 V while the control input (VIN) is rated for 4.5 to 17 V. The TPS54521EVM-607
provides both inputs but is designed and tested using the PVIN connected to VIN. Rated input voltage and
output current range for the evaluation module are given in Table 1-1. This evaluation module demonstrates a
low cost design that may be achieved when designing with the TPS54521 regulator. The switching frequency
is externally set at a nominal 480 kHz. The high-side and low-side MOSFETs are incorporated inside the
TPS54521 package along with the gate drive circuitry. The compensation components are external to the
integrated circuit (IC), and an external divider allows for an adjustable output voltage. Additionally, the TPS54521
provides adjustable slow start, tracking and undervoltage lockout inputs. The absolute maximum input voltage is
20 V for the TPS54521EVM-607.
Table 1-1. Input Voltage and Output Current Summary
EVM INPUT VOLTAGE RANGE OUTPUT CURRENT RANGE
TPS54521EVM-607 VIN = 8 V to 17 V (VIN start voltage = 6.806 V) 0 A to 5 A
1.2 Performance Specification Summary
A summary of the TPS54521EVM-607 performance specifications is provided in Table 1-2. Specifications
are given for an input voltage of 12 V and an output voltage of 3.3 V, unless otherwise specified. The
TPS54521EVM-607 is designed and tested for VIN = 8 V to 17 V with the VIN and PVIN pins connected together
with the JP1 jumper. The ambient temperature is 25°C for all measurements, unless otherwise noted.
Table 1-2. TPS54521EVM-607 Performance Specification Summary
SPECIFICATION TEST CONDITIONS MIN TYP MAX UNIT
VIN voltage range (PVIN = VIN) 8 12 17 V
VIN start voltage 6.806 V
VIN stop voltage 4.824 V
Output voltage set point 3.3 V
Output current range VIN = 8 V to 17 V 0 5 A
Line regulation IO = 5 A, VIN = 8 V to 17 V ±0.04%
Load regulation VIN = 12 V, IO = 0 A to 5 A ±0.05%
Load transient response
IO = 2 A to 4 A Voltage change 150 mV
Recovery time 6 μs
IO = 4 A to 2 A Voltage change 125 mV
Recovery time 6 μs
Loop bandwidth VIN = 12 V, IO = 5 A 42 kHz
Phase margin VIN = 12 V , IO = 5 A 62 °
Input ripple voltage VIN = 12 V, IO = 5 A 500 mVPP
Output ripple voltage VIN = 12 V, IO = 5 A 75 mVPP
Output rise time 3.5 ms
Operating frequency 480 kHz
Maximum efficiency TPS54521EVM-607, VIN = 8 V, IO = 1.1 A 94.5%
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1.3 Modifications
These evaluation modules are designed to provide access to the features of the TPS54521. Some modifications
can be made to this module.
1.3.1 Output Voltage Set Point
The output voltage is set by the resistor divider network of R8 and R9. R9 is fixed at 10 kΩ. To change the output
voltage of the EVM, it is necessary to change the value of resistor R8. Changing the value of R8 can change the
output voltage above 0.8 V. The value of R8 for a specific output voltage can be calculated using Equation 1.
( )
OUT
10 kΩ V - 0.8 V
R8 =
0.8 V
(1)
Table 1-3 lists the R8 values for some common output voltages. Note that VIN must be in a range so that the
minimum on-time is greater than 135 ns, and the maximum duty cycle is less than 95%. In addition, different
output voltages may require different frequency compensation, which will require changes to the values of R4,
C4, C6, and C11. The values given in Table 1-3 are standard values, not the exact value calculated using
Equation 1.
Table 1-3. Output Voltages Available
OUTPUT
VOLTAGE (V)
R8 VALUE (kΩ)
1.8 12.4
2.5 21.5
3.3 31.6
5 52.3
1.3.2 Slow-Start Time
The slow-start time can be adjusted by changing the value of C7. Use Equation 2 to calculate the required value
of C7 for a desired slow-start time.
Tss(ms) Iss( A)
C7(nF) = Vref(V)
´ m
(2)
The EVM is set for a slow start time of 3.5 msec using C7 = 0.01 μF.
1.3.3 Track In
The TPS54521 can track an external voltage during start up. The J5 connector is provided to allow connection
to that external voltage. Ratio-metric or simultaneous tracking can be implemented using resistor divider R5 and
R6. See the TPS54521 4.5-V to 17-V Input, 5-A Synchronous Step-Down Converter Data Sheet for details.
1.3.4 Adjustable UVLO
The under voltage lock out (UVLO) can be adjusted externally using R1 and R2. The EVM is set for a start
voltage of 6.806 V and a stop voltage of 4.824 V using R1 = 511 kΩ and R2 = 100 kΩ. Use Equation 3 and
Equation 4 to calculate required resistor values for different start and stop voltages.
1
æ ö -
ç ÷
è ø
æ ö
- +
ç ÷
è ø
ENFALLING
START STOP
ENRISING
ENFALLING
p h
ENRISING
V
V V
V
R1 = V
I I
V
(3)
( )
´
- + +
ENFALLING
STOP ENFALLING p h
R1 V
R2 = V V R1 I I
(4)
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1.3.5 Input Voltage Rails
The EVM is designed to accommodate different input voltage levels for the power stage and control logic. During
normal operation, the PVIN and VIN inputs are connected together using a jumper across JP1. The single input
voltage is supplied at J1. If desired, these two input voltage rails may be separated by removing the jumper
across JP1. Two input voltages must then be provided at both J1 and J2. C1 is provided for adding additional
input capacitance for the PVIN input, if desired.
2 Test Setup and Results
This section describes how to properly connect, set up, and use the TPS54521EVM-607 evaluation module.
The section also includes test results typical for the evaluation module and covers efficiency, output voltage
regulation, load transients, loop response, output ripple, input ripple, and start-up.
2.1 Input / Output Connections
The TPS54521EVM-607 is provided with input/output connectors and test points as shown in Table 2-1. A power
supply capable of supplying 3 A must be connected to J1 through a pair of 20 AWG wires. The jumper across
JP1 must be in place. See Section 1.3.5 for split input voltage rail operation. The load must be connected to
J3 through a pair of 20 AWG wires. The maximum load current capability must be 5 A. Wire lengths must be
minimized to reduce losses in the wires. Test-point TP1 provides a place to monitor the VIN input voltages with
TP2 providing a convenient ground reference. TP8 is used to monitor the output voltage with TP9 as the ground
reference.
Table 2-1. EVM Connectors and Test Points
REFERENCE
DESIGNATOR
FUNCTION
J1 PVIN input voltage connector. See Table 1-1 for VIN range.
J2 VIN input voltage connector. Not normally used
J3 VOUT, 3.3 V at 5-A maximum
J4 2-pin header for tracking output and ground
J5 2-pin header for tracking voltage input and ground
JP1 PVIN to VIN jumper. Normally closed to tie VIN to PVIN for common rail voltage operation
JP2 2-pin header for enable. Connect EN to ground to disable, open to enable.
TP1 PVIN test point at PVIN connector
TP2 GND test point at PVIN connector
TP3 VIN test point at VIN connector
TP4 GND test point at VIN connector
TP5 PH test point
TP6 Slow start / track in test point
TP7 Test point between voltage divider network and output. Used for loop response measurements.
TP8 Output voltage test point at VOUT connector
TP9 GND test point at VOUT connector
TP10 PWRGD test point
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2.2 Efficiency
The efficiency of this EVM peaks at a load current of about 1.1 A and then decreases as the load current
increases towards full load. Figure 2-1 shows the efficiency for the TPS54521EVM-607 at an ambient
temperature of 25°C.
0 1 2 3 4 5
I - Output Current - A
O
60
65
70
75
80
85
90
95
100
Efficiency - %
V = 15 V
IV = 17 V I
V = 10 V
I
V = 12 V
I
V = 8 V
I
Figure 2-1. TPS54521EVM-607 Efficiency
Figure 2-2 shows the efficiency for the TPS54521EVM-607 at lower output currents below 0.10 A at an ambient
temperature of 25°C.
0
10
20
30
40
50
60
70
80
90
100
0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09 0.1
Efficiency - %
I - Output Current - A
O
V = 12 V
I
V = 8 V
I
V = 15 V
I
V = 17 V
I
V = 10 V
I
Figure 2-2. TPS54521EVM-607 Low Current Efficiency
The efficiency may be lower at higher ambient temperatures, due to temperature variation in the drain-to-source
resistance of the internal MOSFETs.
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2.3 Output Voltage Load Regulation
Figure 2-3 shows the load regulation for the TPS54521EVM-607.
0.05
0.04
0.03
0.02
0.01
0
-0.01
-0.02
-0.03
-0.04
-0.05
I - Output Current - A
O
Load Regulation - %
V = 8 V
I
V = 12 V
I
V = 15 V
I
V = 10 V
I
V = 17 V
I
5
3
21 4
0
Figure 2-3. TPS54521EVM-607 Load Regulation
Measurements are given for an ambient temperature of 25°C.
2.4 Output Voltage Line Regulation
Figure 2-4 shows the line regulation for the TPS54521EVM-607.
-0.05
-0.04
-0.03
-0.02
-0.01
0
0.01
0.02
0.03
0.04
0.05
8 9 10 11 12 13 14 15 16 17
V - Input Voltage - V
I
Line Regulation - %
I = 2.5 A
O
I = 5 A
O
I = 0 A
O
Figure 2-4. TPS54521EVM-607 Line Regulation
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2.5 Load Transients
Figure 2-5 shows the TPS54521EVM-607 response to load transients. The current step is from 2 A to 4 A at 12
V input. Total peak-to-peak voltage variation is as shown, including ripple and noise on the output.
Time = 10 μsec / div
Vout = 100 mV / div (AC coupled)
Iout = 2 A / div (2A to 4 A load step)
Vin = 12 V
Figure 2-5. TPS54521EVM-607 Transient Response
2.6 Loop Characteristics
Figure 2-6 shows the TPS54521EVM-607 loop-response characteristics. Gain and phase plots are shown for VIN
voltage of 12 V. Load current for the measurement is 5 A.
-60
-50
-40
-30
-20
-10
0
10
20
30
40
50
60
Frequency - Hz
-180
-150
-120
-90
-60
-30
0
30
60
90
120
150
180
Gain - dB
100
1000
10000 100000 1000000
Phase - Deg
Phase
Gain
Vin = 12 V
Load = 5 A
Figure 2-6. TPS54521EVM-607 Loop Response
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2.7 Output Voltage Ripple
Figure 2-7 shows the TPS54521EVM-607 output voltage ripple. The output current is the rated full load of 5 A
and VIN = 12 V. The ripple voltage is measured directly across the output capacitors.
Time = 1 μsec / div
Vout = 50 mV / div (AC coupled)
PH = 10 V / div
Inductor Current = 2 A / div
Figure 2-7. TPS54521EVM-607 Output Ripple
2.8 Input Voltage Ripple
Figure 2-8 shows the TPS54521EVM-607 input voltage ripple. The output current is the rated full load of 5 A and
VIN = 12 V. The ripple voltage is measured directly across the input capacitors.
Time = 1 μsec / div
Vout = 200 mV / div (AC coupled)
PH = 10 V / div
Inductor Current = 2 A / div
Figure 2-8. TPS54521EVM-607 Input Ripple
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2.9 Powering Up
Figure 2-9 and Figure 2-10 show the start-up waveforms for the TPS54521EVM-607. In Figure 2-9, the output
voltage ramps up as soon as the input voltage reaches the UVLO threshold as set by the R1 and R2 resistor
divider network. In Figure 2-10, the input voltage is initially applied and the output is inhibited by using a jumper
at J2 to tie EN to GND. When the jumper is removed, EN is released. When the EN voltage reaches the
enable-threshold voltage, the start-up sequence begins and the output voltage ramps up to the externally set
value of 3.3 V. The input voltage for these plots is 12 V and the load is 0.66 Ω.
Time = 2 msec / div
Vin = 10 V / div
Vout = 2 V / div
SS/TR = 1 V / div
EN = 2 V / div
Figure 2-9. TPS54521EVM-607 Start-Up Relative to VIN
Time = 2 msec / div
Vin = 10 V / div
Vout = 2 V / div
SS/TR = 1 V / div
EN = 2 V / div
Figure 2-10. TPS54521EVM-607 Start-Up Relative to Enable
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2.10 Hiccup Overcurrent Mode Operation
Figure 2-11 shows the TPS54521EVM-607 operating in a near shorted output (0.1 Ω load) condition. If the
current in the high-side MOSFET reaches the current limit for 512 switching cycles in a row, the TPS54521
enters hiccup overcurrent protection and stops switching (hiccups) for the next 16384 cycles.
Time = 20 msec / div
Vout = 2 V / div
SS/TR = 1 V / div
PH = 10 V / div
Inductor Current =10 A / div
Vin = 12 V
Load = 0.1 Ω
Figure 2-11. TPS54521EVM-607 Overcurrent Hiccup Mode
2.11 Thermal Characteristics
This section shows a thermal image of the TPS54521EVM-607 running at 12 V input and 5 A load and a graph
showing the junction temperature vs. output current of the EVM circuit. There is no air flow and the ambient
temperature is 25°C. The peak temperature of the IC (91.9°C) is below the maximum recommended operating
condition listed in the data sheet of 125°C.
Figure 2-12. TPS54521EVM-607 Thermal Image
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25
50
75
100
125
0 0.5 1 1.5 2 2.5 3
Load Current - A
T - Junction Temperature - °C
J
VIN = 12V
Vout = 3.3V
Fsw = 480kHz
Ta = room temperature
no airflow
3.5 4 4.5 5
Figure 2-13. TPS54521EVM-607 Junction Temperature vs Load Current
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3 Board Layout
This section provides a description of the TPS54521EVM-607, board layout, and layer illustrations.
3.1 Layout
The board layout for the TPS54521EVM-607 is shown in Figure 3-1 through Figure 3-5. The topside layer of the
EVM is laid out in a manner typical of a user application. The top, bottom and internal layers are 2-oz. copper.
The top layer contains the main power traces for PVIN, VIN, VOUT, and VPHASE. Also on the top layer are
connections for the remaining pins of the TPS54521 and a large area filled with ground. The bottom and internal
ground layers contain ground planes only. The top side ground traces are connected to the bottom and internal
ground planes with multiple vias placed around the board including two vias directly under the TPS54521 device
to provide a thermal path from the top-side ground plane to the bottom-side ground plane.
The input decoupling capacitors (C2, and C3) and bootstrap capacitor (C5) are all located as close to the IC
as possible. In addition, the voltage set-point resistor divider components are also kept close to the IC. The
voltage divider network ties to the output voltage at the point of regulation, the copper VOUT trace at the J3
output connector. For the TPS54521, an additional input bulk capacitor may be required, depending on the EVM
connection to the input supply. Critical analog circuits such as the voltage setpoint divider, frequency set resistor,
slow start capacitor and compensation components are terminated to ground using a wide ground trace separate
from the power ground pour.
Figure 3-1. TPS54521EVM-607 Top-Side Layout
(Top View)
Figure 3-2. TPS54521EVM-607 Layer 2 (X-Ray Top
View)
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Figure 3-3. TPS54521EVM-607 Layer 3 (X-Ray Top
View)
Figure 3-4. TPS54521EVM-607 Bottom-Side Layout
(Bottom View)
Figure 3-5. TPS54521EVM-607 Top-Side Assembly
3.2 Estimated Circuit Area
The estimated printed circuit board area for the components used in this design is 246 in2 (0.38 mm2). This area
does not include test point or connectors.
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4 Schematic and Bill of Materials
This section presents the TPS54521EVM-607 schematic and bill of materials.
4.1 Schematic
Figure 4-1 is the schematic for the TPS54521EVM-607.
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+
Figure 4-1. TPS54521EVM-607 Schematic
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4.2 Bill of Materials
Table 4-1 presents the bill of materials for the TPS54521EVM-607.
Table 4-1. TPS54521EVM-607 Bill of Materials
COUNT REFDES VALUE DESCRIPTION SIZE PART NUMBER MFR
1 C2 10 µF Capacitor, Ceramic, 25 V, X5R, 20% 1210 Std Std
1 C3 4.7 µF Capacitor, Ceramic, 25 V, X5R, 10% 0805 Std Std
1 C4 5600 pF Capacitor, Ceramic, 50 V, X7R, 10% 0603 Std Std
1 C5 0.1 µF Capacitor, Ceramic, 16 V, X7R, 10% 0603 Std Std
1 C6 560 pF Capacitor, Ceramic, 50 V, C0G, 5% 0603 Std Std
1 C7 0.01 µF Capacitor, Ceramic, 10 V, X7R, 10% 0603 Std Std
1 C8 10 µF Capacitor, Ceramic, 10 V, X5R, 10% 0805 Std Std
1 C9 330 µF Capacitor, Alum Electrolytic 6.3 V, 125
mΩ ESR, ±20%
6.30 mm Dia EKZE6R3ELL331
MF11D
Chemi-con
1 L1 3.3 µH Inductor, 12mΩ DCR, 7.5 A, ± 20% 0.300 Dia. inch DR0608-332L Coilcraft
1 R1 511 K Resistor, Chip, 1/16W, 1% 0603 Std Std
2 R2, R3 100 K Resistor, Chip, 1/16W, 1% 0603 Std Std
1 R4 38.3 K Resistor, Chip, 1/16W, 1% 0603 Std Std
1 R7 51.1 Resistor, Chip, 1/16W, 1% 0603 Std Std
1 R8 31.6 K Resistor, Chip, 1/16W, 1% 0603 Std Std
1 R9 10.0 K Resistor, Chip, 1/16W, 1% 0603 Std Std
1 U1 TPS54521RHL IC, 17V Input, 5-A Output, Sync. Step-
Down Switcher With Integrated FET
QFN14 TPS54521RHL TI
5 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision * (August 2010) to Revision A (August 2021) Page
• Updated the numbering format for tables, figures, and cross-references throughout the document. ................3
• Updated the user's guide title............................................................................................................................. 3
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STANDARD TERMS FOR EVALUATION MODULES
1. Delivery: TI delivers TI evaluation boards, kits, or modules, including any accompanying demonstration software, components, and/or
documentation which may be provided together or separately (collectively, an “EVM” or “EVMs”) to the User (“User”) in accordance
with the terms set forth herein. User's acceptance of the EVM is expressly subject to the following terms.
1.1 EVMs are intended solely for product or software developers for use in a research and development setting to facilitate feasibility
evaluation, experimentation, or scientific analysis of TI semiconductors products. EVMs have no direct function and are not
finished products. EVMs shall not be directly or indirectly assembled as a part or subassembly in any finished product. For
clarification, any software or software tools provided with the EVM (“Software”) shall not be subject to the terms and conditions
set forth herein but rather shall be subject to the applicable terms that accompany such Software
1.2 EVMs are not intended for consumer or household use. EVMs may not be sold, sublicensed, leased, rented, loaned, assigned,
or otherwise distributed for commercial purposes by Users, in whole or in part, or used in any finished product or production
system.
2Limited Warranty and Related Remedies/Disclaimers:
2.1 These terms do not apply to Software. The warranty, if any, for Software is covered in the applicable Software License
Agreement.
2.2 TI warrants that the TI EVM will conform to TI's published specifications for ninety (90) days after the date TI delivers such EVM
to User. Notwithstanding the foregoing, TI shall not be liable for a nonconforming EVM if (a) the nonconformity was caused by
neglect, misuse or mistreatment by an entity other than TI, including improper installation or testing, or for any EVMs that have
been altered or modified in any way by an entity other than TI, (b) the nonconformity resulted from User's design, specifications
or instructions for such EVMs or improper system design, or (c) User has not paid on time. Testing and other quality control
techniques are used to the extent TI deems necessary. TI does not test all parameters of each EVM.
User's claims against TI under this Section 2 are void if User fails to notify TI of any apparent defects in the EVMs within ten (10)
business days after delivery, or of any hidden defects with ten (10) business days after the defect has been detected.
2.3 TI's sole liability shall be at its option to repair or replace EVMs that fail to conform to the warranty set forth above, or credit
User's account for such EVM. TI's liability under this warranty shall be limited to EVMs that are returned during the warranty
period to the address designated by TI and that are determined by TI not to conform to such warranty. If TI elects to repair or
replace such EVM, TI shall have a reasonable time to repair such EVM or provide replacements. Repaired EVMs shall be
warranted for the remainder of the original warranty period. Replaced EVMs shall be warranted for a new full ninety (90) day
warranty period.
WARNING
Evaluation Kits are intended solely for use by technically qualified,
professional electronics experts who are familiar with the dangers
and application risks associated with handling electrical mechanical
components, systems, and subsystems.
User shall operate the Evaluation Kit within TI’s recommended
guidelines and any applicable legal or environmental requirements
as well as reasonable and customary safeguards. Failure to set up
and/or operate the Evaluation Kit within TI’s recommended
guidelines may result in personal injury or death or property
damage. Proper set up entails following TI’s instructions for
electrical ratings of interface circuits such as input, output and
electrical loads.
NOTE:
EXPOSURE TO ELECTROSTATIC DISCHARGE (ESD) MAY CAUSE DEGREDATION OR FAILURE OF THE EVALUATION
KIT; TI RECOMMENDS STORAGE OF THE EVALUATION KIT IN A PROTECTIVE ESD BAG.

www.ti.com
2
3Regulatory Notices:
3.1 United States
3.1.1 Notice applicable to EVMs not FCC-Approved:
FCC NOTICE: This kit is designed to allow product developers to evaluate electronic components, circuitry, or software
associated with the kit to determine whether to incorporate such items in a finished product and software developers to write
software applications for use with the end product. This kit is not a finished product and when assembled may not be resold or
otherwise marketed unless all required FCC equipment authorizations are first obtained. Operation is subject to the condition
that this product not cause harmful interference to licensed radio stations and that this product accept harmful interference.
Unless the assembled kit is designed to operate under part 15, part 18 or part 95 of this chapter, the operator of the kit must
operate under the authority of an FCC license holder or must secure an experimental authorization under part 5 of this chapter.
3.1.2 For EVMs annotated as FCC – FEDERAL COMMUNICATIONS COMMISSION Part 15 Compliant:
CAUTION
This device complies with part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) This device may not
cause harmful interference, and (2) this device must accept any interference received, including interference that may cause
undesired operation.
Changes or modifications not expressly approved by the party responsible for compliance could void the user's authority to
operate the equipment.
FCC Interference Statement for Class A EVM devices
NOTE: This equipment has been tested and found to comply with the limits for a Class A digital device, pursuant to part 15 of
the FCC Rules. These limits are designed to provide reasonable protection against harmful interference when the equipment is
operated in a commercial environment. This equipment generates, uses, and can radiate radio frequency energy and, if not
installed and used in accordance with the instruction manual, may cause harmful interference to radio communications.
Operation of this equipment in a residential area is likely to cause harmful interference in which case the user will be required to
correct the interference at his own expense.
FCC Interference Statement for Class B EVM devices
NOTE: This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to part 15 of
the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential
installation. This equipment generates, uses and can radiate radio frequency energy and, if not installed and used in accordance
with the instructions, may cause harmful interference to radio communications. However, there is no guarantee that interference
will not occur in a particular installation. If this equipment does cause harmful interference to radio or television reception, which
can be determined by turning the equipment off and on, the user is encouraged to try to correct the interference by one or more
of the following measures:
•Reorient or relocate the receiving antenna.
•Increase the separation between the equipment and receiver.
•Connect the equipment into an outlet on a circuit different from that to which the receiver is connected.
•Consult the dealer or an experienced radio/TV technician for help.
3.2 Canada
3.2.1 For EVMs issued with an Industry Canada Certificate of Conformance to RSS-210 or RSS-247
Concerning EVMs Including Radio Transmitters:
This device complies with Industry Canada license-exempt RSSs. Operation is subject to the following two conditions:
(1) this device may not cause interference, and (2) this device must accept any interference, including interference that may
cause undesired operation of the device.
Concernant les EVMs avec appareils radio:
Le présent appareil est conforme aux CNR d'Industrie Canada applicables aux appareils radio exempts de licence. L'exploitation
est autorisée aux deux conditions suivantes: (1) l'appareil ne doit pas produire de brouillage, et (2) l'utilisateur de l'appareil doit
accepter tout brouillage radioélectrique subi, même si le brouillage est susceptible d'en compromettre le fonctionnement.
Concerning EVMs Including Detachable Antennas:
Under Industry Canada regulations, this radio transmitter may only operate using an antenna of a type and maximum (or lesser)
gain approved for the transmitter by Industry Canada. To reduce potential radio interference to other users, the antenna type
and its gain should be so chosen that the equivalent isotropically radiated power (e.i.r.p.) is not more than that necessary for
successful communication. This radio transmitter has been approved by Industry Canada to operate with the antenna types
listed in the user guide with the maximum permissible gain and required antenna impedance for each antenna type indicated.
Antenna types not included in this list, having a gain greater than the maximum gain indicated for that type, are strictly prohibited
for use with this device.

www.ti.com
3
Concernant les EVMs avec antennes détachables
Conformément à la réglementation d'Industrie Canada, le présent émetteur radio peut fonctionner avec une antenne d'un type et
d'un gain maximal (ou inférieur) approuvé pour l'émetteur par Industrie Canada. Dans le but de réduire les risques de brouillage
radioélectrique à l'intention des autres utilisateurs, il faut choisir le type d'antenne et son gain de sorte que la puissance isotrope
rayonnée équivalente (p.i.r.e.) ne dépasse pas l'intensité nécessaire à l'établissement d'une communication satisfaisante. Le
présent émetteur radio a été approuvé par Industrie Canada pour fonctionner avec les types d'antenne énumérés dans le
manuel d’usage et ayant un gain admissible maximal et l'impédance requise pour chaque type d'antenne. Les types d'antenne
non inclus dans cette liste, ou dont le gain est supérieur au gain maximal indiqué, sont strictement interdits pour l'exploitation de
l'émetteur
3.3 Japan
3.3.1 Notice for EVMs delivered in Japan: Please see http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_01.page 日本国内に
輸入される評価用キット、ボードについては、次のところをご覧ください。
http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_01.page
3.3.2 Notice for Users of EVMs Considered “Radio Frequency Products” in Japan: EVMs entering Japan may not be certified
by TI as conforming to Technical Regulations of Radio Law of Japan.
If User uses EVMs in Japan, not certified to Technical Regulations of Radio Law of Japan, User is required to follow the
instructions set forth by Radio Law of Japan, which includes, but is not limited to, the instructions below with respect to EVMs
(which for the avoidance of doubt are stated strictly for convenience and should be verified by User):
1. Use EVMs in a shielded room or any other test facility as defined in the notification #173 issued by Ministry of Internal
Affairs and Communications on March 28, 2006, based on Sub-section 1.1 of Article 6 of the Ministry’s Rule for
Enforcement of Radio Law of Japan,
2. Use EVMs only after User obtains the license of Test Radio Station as provided in Radio Law of Japan with respect to
EVMs, or
3. Use of EVMs only after User obtains the Technical Regulations Conformity Certification as provided in Radio Law of Japan
with respect to EVMs. Also, do not transfer EVMs, unless User gives the same notice above to the transferee. Please note
that if User does not follow the instructions above, User will be subject to penalties of Radio Law of Japan.
【無線電波を送信する製品の開発キットをお使いになる際の注意事項】 開発キットの中には技術基準適合証明を受けて
いないものがあります。 技術適合証明を受けていないもののご使用に際しては、電波法遵守のため、以下のいずれかの
措置を取っていただく必要がありますのでご注意ください。
1. 電波法施行規則第6条第1項第1号に基づく平成18年3月28日総務省告示第173号で定められた電波暗室等の試験設備でご使用
いただく。
2. 実験局の免許を取得後ご使用いただく。
3. 技術基準適合証明を取得後ご使用いただく。
なお、本製品は、上記の「ご使用にあたっての注意」を譲渡先、移転先に通知しない限り、譲渡、移転できないものとします。
上記を遵守頂けない場合は、電波法の罰則が適用される可能性があることをご留意ください。 日本テキサス・イ
ンスツルメンツ株式会社
東京都新宿区西新宿６丁目２４番１号
西新宿三井ビル
3.3.3 Notice for EVMs for Power Line Communication: Please see http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_02.page
電力線搬送波通信についての開発キットをお使いになる際の注意事項については、次のところをご覧ください。http:/
/www.tij.co.jp/lsds/ti_ja/general/eStore/notice_02.page
3.4 European Union
3.4.1 For EVMs subject to EU Directive 2014/30/EU (Electromagnetic Compatibility Directive):
This is a class A product intended for use in environments other than domestic environments that are connected to a
low-voltage power-supply network that supplies buildings used for domestic purposes. In a domestic environment this
product may cause radio interference in which case the user may be required to take adequate measures.