Texas Instruments THS7001 User manual

THS7001
ProgrammableĆGain Amplifier
Evaluation Module
December 1999 Mixed-Signal Products
User’s Guide
SLOU057

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Copyright 1999, Texas Instruments Incorporated

iii
Chapter Title—Attribute Reference
Preface
Related Documentation From Texas Instruments
J THS7001 Programmable-Gain Amplifier (literature number
SLOS214) This is the data sheet for the THS7001 amplifier
integrated circuit used on the EVM.
J PowerPAD  Thermally Enhanced Package (literature number
SLMA002) This is the technical brief for the special PowerPAD
package in which the THS7001 amplifier IC is supplied.
FCC Warning
This equipment is intended for use in a laboratory test environment only. It
generates, uses, and can radiate radio frequency energy and has not been
testedforcompliancewiththelimitsofcomputingdevicespursuanttosubpart
Jofpart 15ofFCCrules,which aredesignedtoprovidereasonableprotection
against radio frequency interference. Operation of this equipment in other
environments may cause interference with radio communications, in which
case the user at his own expense will be required to take whatever measures
may be required to correct this interference.
Trademarks
TI is a trademark of Texas Instruments Incorporated.
PowerPAD is a trademark of Texas Instruments Incorporated.

iv

Running Title—Attribute Reference
v
Chapter Title—Attribute Reference
Contents
1 General Information 1-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.1 Features 1-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.2 Description 1-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.3 Programmable Gain Amplifier Gain Control 1-6. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.4 EVM DIP Switch Functionality 1-8. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.5 EVM Circuit Configuration 1-9. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.6 Using The THS7001 EVM 1-10. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.7 THS7001 EVM Performance 1-11. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.8 General High-Speed Amplifier Design Considerations 1-14. . . . . . . . . . . . . . . . . . . . . . . . . .
1.9 General PowerPAD t Design Considerations 1-15. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.10 THS7001 EVM Specifications 1-18. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2 Reference 2-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.1 THS7001 Programmable-Gain Amplifier EVM Parts List 2-2. . . . . . . . . . . . . . . . . . . . . . . . .
2.2 THS7001 EVM Board Layouts 2-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Running Title—Attribute Reference
vi
Figures
1–1 THS7001 Evaluation Module 1-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1–2 THS7001 EVM Schematic Diagram 1-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1–3 Simplified PGA Section of the THS7001 1-7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1–4 THS7001 Evaluation Module Block Diagram 1-9. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1–5 THS7001 EVM Preamplifier Response, VCC = ±15 V 1-11. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1–6 THS7001 EVM Preamplifier Response, VCC = ±5 V 1-11. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1–7 THS7001 EVM PGA Response, VCC = ±15 V 1-12. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1–8 THS7001 EVM PGA Response, VCC = ±5 V 1-12. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1–9 THS7001 EVM Preamplifier + PGA Response, VCC = ±15 V 1-13. . . . . . . . . . . . . . . . . . . . . .
1–10 THS7001 EVM Preamplifier + PGA Response, VCC = ±5 V 1-13. . . . . . . . . . . . . . . . . . . . . . .
1–11 PowerPAD PCB Etch and Via Pattern 1-15. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1–12 Maximum Power Dissipation vs. Free-Air Temperature 1-16. . . . . . . . . . . . . . . . . . . . . . . . . . . .
2–1 THS7001 EVM PC Board: Top Assembly 2-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2–2 THS7001 EVM PC Board: Top Layer 2-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2–3 THS7001 EVM PC Board: Bottom Layer 2-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Tables
1–1 THS7001 EVM PGA Nominal Gain/Attenuation 1-6. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1–2 EVM DIP Switch Functionality 1-8. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1–3 THS7001 EVM Jumper Settings 1-10. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1–4 THS7001 EVM DIP Switch Settings 1-10. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2–1 THS7001 Programmable-Gain Amplifier EVM Parts List 2-2. . . . . . . . . . . . . . . . . . . . . . . . . . . .

1-1
General Information
General
Information
This chapter details the Texas Instruments (TI) THS7001
programmable-gainamplifierevaluationmodule(EVM),SLOP250.Itincludes
a list of EVM features, a brief description of the module illustrated with a
pictorial and schematic diagrams, EVM specifications, details on configuring,
connecting,andusingtheEVM,andadiscussiononhigh-speedamplifier and
PowerPAD package design considerations.
Topic Page
1.1 Features 1–2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.2 Description 1–2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.3 Programmable Gain Amplifier Gain Control 1–6. . . . . . . . . . . . . . . . . . . . .
1.4 EVM DIP Switch Functionality 1–8. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.5 EVM CIrcuit Configuration 1–9. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.6 Using the THS7001 EVM 1–10. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.7 THS7001 EVM Performance 1–11. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.8 General High-Speed Amplifier Design Considerations 1–14. . . . . . . . .
1.9 General PowerPADDesign Considerations 1–15. . . . . . . . . . . . . . . . . .
1.10 THS7001 EVM Specifications 1–18. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Chapter 1

Features
1-2
General Information
1.1 Features
THS7001 programmable-gain amplifier EVM features include:
J Multiple Input Configurations Set Via On Board Jumpers
J DIP Switches Allow Quick and Easy Adjustment of Gain, Shut Down,
Reference Voltage, and Output Clamping
J Standard BNC Connector Inputs and Outputs
J ±5-V to ±15-V Operation With 5-V Reference Input
J Nominal 50-ΩImpedance Inputs and Outputs
J Includes Test Points for Easy Digital Control of EVM Circuit Gain and
Operating Parameters
J Good Example of PowerPAD Package and High-Speed Amplifier
Design and Layout
1.2 Description
The TI THS7001 programmable-gain amplifier evaluation module (EVM) is a
complete low-noise receiver and a highly configurable programmable-gain
amplifiercircuit.ItconsistsoftheTITHS7001programmable-gainamplifierIC
and a number of passive parts, all mounted on a multilayer circuit board
(Figure 1–1).
Although the THS7001 IC was developed primarily for xDSL receiver
front-ends, a large number of different circuits can benefit from the many
features incorporated into the THS7001. This EVM illustrates a universal
design and can be used for numerous system configurations.
The EVM uses standard BNC connectors for inputs and outputs and also
includes test points for user connections and testing. It is completely
assembled, fully tested, and ready to use—just connect it to power, a signal
source, and a load (if desired).

Description
1-3
General Information
Figure 1–1.THS7001 Evaluation Module
PGA – A
Output
C21L2C5C4L1
+VCC GND +5 V–VCC
Pre-AmpA
Output
JP3
J9
C15
R9
Input
J6
J5
R24
R26
R28
R30
R32
C18, C10
C19, C9
R42
R44
R18 R5
U1
G2
(3)
G1
(2)
G0
(1)
S1
VH
S/D
(4)
AVREF
(5)
VL
(6)
C17
JP1
R6
C6
R20
C7
C12
R2
R41
R23
R25
R27
R29
R31
JP2
C8
1999
Texas Instruments
J4J3
J2
J1
SLOP250 THS7001 EVM Board
+++
R8
GND
1
R7
C1
C3
R1
A
C13
C14
InputpowerisappliedtotheEVMthroughbananajacksJ1,J2,J3, and J4. An
LCfilteroneachpowerbusisolatestheEVMcircuitsfromtheexternalsupply.
J4 provides a reference point for numerous circuit functions and draws
relativelylittlecurrent.TheschematicfortheEVMamplifiersappearsinFigure
1–2.

Description
1-4
General Information
R9 49.9 Ω
J6
Input A 3
2
JP2
+ –
5
64
R1 TBD
R2
TBD
C3
TBD
C8, TBD
R8
499 Ω
R7
499 Ω
3 2
1
R5
49.9 ΩJ5
Pre-amp A Output
JP1
C6, TBD
R6
0 Ω
R20
TBD C17
TBD
G2
G1
G0
VREF
SID
–Vcc VCC
VH
VL
VO
GND
VIN
18
20
13
19
C18, 0.1 µF–15 V
17
14
R29 330 ΩR18
49.9 Ω
R30
3.3 kΩ
5 V
S1:D S1:E
VREF TP8
S/D
TP7
C19, 0.1 µF
+15 V
R23, 330Ω
R25, 330Ω
R27, 330Ω
R24, 3.3 kΩ R26, 3.3 kΩ R28, 3.3 kΩ3
2
1
TP5
VH
R41
49.9 ΩR42
4.7 kΩ
R31
49.9 ΩR32
4.7 kΩ
R44
100 ΩJ9
PGA-A Output
VL
TP6
S1:F
–15 V
5 V+15 VJP3
G2, TP3
C17, 0.1 µF
5 V
12 16
15
3
2
1
TP2, G0 TP4, G1
U1:B
Figure 1–2.THS7001 EVM Schematic Diagram
–15 V
L1
0.22 µHC4
6.8 µF
+15 V
J1
+VCC
+
J2
GND
+
J3
–VCC
+
J4
+5 V
5 V
L2
0.22 µH
C5
6.8 µFC21
6.8 µF
TP1
C13
0.1 µFC14
0.1 µF
1
C11
0.1 µF
C12
0.1 µF
+15 V
–15 V
U1:A
PREAMPLIFIER
S1:A
S1:B
S1:C
C15
0.1 µF
C9, 0.1 µF
C10, 0.1 µF
PGA
7
8

Description
1-5
General Information
The THS7001 EVM is equipped with BNC input and output connectors. The
input is terminated with a 50-Ωresistor to provide correct line impedance
matching(Figure1–3).Notethatusingasourcewitha50-Ωoutputimpedance
will create a voltage divider at the EVM inputs. Thus, accurate knowledge of
the source output characteristics is required to determine proper input signal
amplitudes.
The output of the preamplifier stage is routed through a 50-Ωresistor to
provide proper cable impedance matching and termination impedance
matching. One of the drawbacks of using this type of impedance matching is
that it places an equivalent 100-Ωload on the output of the preamplifier.
Although the preamplifier section has a large output current capability, the
programmable gain amplifier (PGA) section has a limited current drive
capability. It is recommended that the total impedance placed on the output of
the PGA section is at least 500 Ω.
The THS7001 IC is a voltage feedback amplifier. It follows the classic
operational amplifier gain equations:
Inverting Gain +*
RF
RG
Noninverting Gain + 1 )
RF
RG
The gain of the preamplifier can easily be changed to support different
applications by changing the resistor ratios. Although any of the components
on the EVM board can be replaced with different values, it is imperative that
the THS7001 preamplifier gain be kept to a minimum of +2 or –1 for stability
purposes.Also,componentpadshavebeenplacedinconvenientlocationson
thePCB(shownas components with the value
TBD inthe schematic) to allow
numerous modifications to the basic EVM configuration. However, care must
be taken because the surface-mount solder pads on the board are somewhat
fragileandwillnotsurvivealargenumberofsoldering/desolderingoperations.
Forindependentevaluationofthepreamplifier,aBNCconnectordirectlyatthe
preamplifier output pin (J5) allows the user to investigate the preamplifier
independently of the PGA section.
The shutdown feature of the THS7001 IC is implemented on this EVM. The
shutdownsignalislowfornormalTHS7001operation.Whentheshutdownpin
is high (5 V), the preamplifier and the PGA section are turned off. Shutdown
on the EVM is controlled by switch S1:D, or by applying an external shutdown
signal to test point TP7 with the switch set to OFF. An isolation resistor on the
THS7001ICshutdowncontrolinputpinisusedtominimizesurgesintheEVM
environment and can be omitted in a final system design.
(1)
(2)

Programmable Gain Amplifier Gain Control
1-6
General Information
1.3 Programmable Gain Amplifier Gain Control
TheTHS7001ICisprovidedwiththreedigitalcontrolinputsforsettingthegain
of the PGA stage (G0 – G2). Standard TTL or CMOS Logic signals operate
thesecontrolinputs.Thegaincontrolinputsarenotlatchedandrespondtothe
controlsignalsinrealtime.Therefore,thecontrolsignalsontheseinputsmust
remain constant if the PGA gain is to remain constant. For stand-alone
evaluation of this function, onboard DIP switches (S1:A to S1:C) are used to
controlthegainofthePGA.NotethatallDIPswitchgaincontrolelementsmust
be set to OFF if gain is to be set by digital control signals. For convenience,
testpoints(TP2–TP4)areplacedoneachoftheselinestoalloweasyexternal
connections. There are 330-Ωisolation resistors in series with each IC gain
control input pins. These were added only for surge suppression and are not
required for actual system design. Nominal gain/attenuation is shown in
Table 1–1.
Table 1–1.THS7001 EVM PGA Nominal Gain/Attenuation
G2 G1 G0 PGA Gain (dB) PGA Gain (V/V)
0 0 0 –22 0.08
0 0 1 –16 0.16
0 1 0 –10 0.32
0 1 1 –4 0.63
1 0 0 2 1.26
1 0 1 8 2.52
1 1 0 14 5.01
1 1 1 20 10
One aspect of the THS7001 PGA signal input that must be considered is that
there are internal variable resistors (RFand RG) that set the gain. The
resistanceofRGchangesfromabout270Ω(gain=+20dB)toabout3kΩ(gain
= –22 dB). Therefore, any source impedance at the input to the PGA amplifier
will cause a gain error to be seen at the output. A buffer/amplifier is highly
recommended to directly drive the input of the PGA section to help minimize
this effect.
Anotherconsiderationisthatwhenthe amplifierVREFisconnectedtoground,
the internal RGresistor is connected to a virtual ground. Therefore, if a
terminationresistorisusedonthesourceside,thetotalterminatingresistance
is the parallel combination of the terminating resistance and the internal RG
resistor. This, in conjunction with the series impedance problem mentioned
previously, can potentially cause a voltage mismatch between the output of a
50-Ωsource and the expected PGA output voltage.
These points are illustrated by the following formula and in the simplified
diagram of the THS7001 PGA section shown in Figure 1–3.
RTOTALTERMINATION +
RTERMINATION (RSOURCE ) RG)
RTERMINATION ) (RSOURCE ) RG)(3)

Programmable Gain Amplifier Gain Control
1-7
General Information
Figure 1–3.Simplified PGA Section of the THS7001
+
–PGA
VOUT
No Source Impedance
VIN
RGRF
PGA
G0G1G2
PGA
–VIN
Negative
Clamp VL
Positive
Clamp VH
THS7001 IC
PGA
VREF
RTERMINATION
RSOURCE
ThePGAVREFterminalisalsoaccessibleviatestpointTP8.Typically,theDIP
switches are used to keep this point at ground. If a voltage is applied to this
terminal, then the output of the PGA section will amplify the applied reference
voltage by one plus the selected gain. Thus, the output gain due only to VREF
will be from +0.6 dB to +21 dB according to the following formula:
ǒ
VOUT
VREF
Ǔ+
20 Log10
ƪ
1 )ǒ PGA Gain(V ń V
ǓǓƫ
Typically, the output of the PGA will directly drive an A/D converter. Because
of the limited linear input range and saturation characteristics of most ADCs,
the PGA output incorporates a voltage clamp. These clamps are typically
connected to the power supply pins to allow a full output range. However, by
setting switch S1:F to OFF and setting jumper JP3 to the 1–2 position, the
outputswillbeclampedtoeither+Vccor+5V(dependingonJP3)andground.
The output can be further limited by applying an external reference voltage to
test points TP5 (VH) and TP6 (VL). The accuracy of this clamp is dependant
on the amount of current flowing through the internal clamping diodes. As is
typical with all diodes, the voltage drop across this diode increases with
current. Therefore, the accuracy of the clamp is highly dependant upon the
output voltage, the clamping voltage differences, and the output current. The
50-Ωseries resistors are placed on this EVM only for surge suppression. In
a final system layout, these resistors are not required for proper operation.
(4)

EVM DIP Switch Functionality
1-8
General Information
1.4 EVM DIP Switch Functionality
The THS7001 can be fully evaluated without any external digital control
signalsapplied.ThisisaccomplishedthroughtheuseofaDIPswitch.TheDIP
switch incorporates six SPST switches labeled A through F. The functionality
of each switch is described in Table 1–2.
Table 1–2.EVM DIP Switch Functionality
SWITCH LABEL POSITION DESCRIPTION
S1:A
AG0
0PGA Gain Bit 0 (LSB): Value = 0 (Low)
S1
:
A
A
–
G0
1PGA Gain Bit 0 (LSB): Value = 1 (High)
S1:B
AG1
0PGA Gain Bit 1: Value = 0 (Low)
S1
:
B
A
–
G1
1PGA Gain Bit 1: Value = 1 (High)
S1:C
AG2
0PGA Gain Bit 2 (MSB): Value = 0 (Low)
S1
:
C
A
–
G2
1PGA Gain Bit 2 (MSB): Value = 1 (High)
S1:D
A S/D
0Shutdown Control: Value = 0 (Low) — Active
S1
:
D
A
–
S/D
1Shutdown Control: Value = 1 (High) — Shutdown
S1:E
A VREF
0VREF Floating (Connect TP8 to Ext. Ref.)
S1
:
E
A
–
VREF
1VREF Connected to Ground
S1:F
VL
0Low Side Clamp Ground (Connect TP6 to Ext Ref)
S1
:
F
VL
1Low Side Clamp Connected to –Vcc

EVM Circuit Configuration
1-9
General Information
1.5 EVM Circuit Configuration
The THS7001 EVM design allows evaluation of each section of the THS7001
amplifier IC separately. Configuration of the EVM is accomplished through
jumpers mounted on the module PCB. Each jumper is a three-pin header that
acts as an SPDT switch when a shunt is placed across two of the three pins
to select either of two signal routes (Figure 1–4).
Figure 1–4.THS7001 Evaluation Module Block Diagram
2
JP2
3
–
+
J6
THS7001
THS7001
U1: B
Input A
J5
J9
U1:A
1
JP1
21
3
PGA
PGA A
Output
Preamp A
Output
Preamp
JP3
VH Clamp
15 V
5 V 1
3
2
- Jumper JP1:
J 1–2—Connectsthe input of the PGA(U1:B) to the input A BNC(J6),
bypassing the THS7001 preamplifier (U1:A)
J 2–3 — Connects the input of A-channel PGA (U1: B) to the output of
the A-channel preamplifier (U1:A)
- Jumper JP2:
J 1–2—Connectstheinvertinginputterminalofthepreamplifier(U1:A)
to the input A BNC (J6). In order to use this functionality, components
R1,R2,andC3mustbeselectedandinstalledontheEVMbytheuser
J 2–3 — Connects the noninverting input terminal of the preamplifier
(U1:A) to the input A BNC (J6)
- Jumper JP3:
J 1–2 — Connects the THS7001 IC positive clamp input pin (VH) to
+VCC
J
2–3—ConnectstheTHS7001ICpositiveclampinputpin(VH)to+5V
For example, to use the preamplifier as a buffer and gain:
1) Set JP1 to 2–3
2) Set JP2 to 2–3
3) Set JP3 to 2–3
4) Apply the input to input A (J6)

Using the THS7001 EVM
1-10
General Information
1.6 Using the THS7001 EVM
The THS7001 EVM operates from a split power supply with voltages ranging
from ±5 V to ±15 V. It also uses 5 volt logic control signals to configure the
operation of the EVM when the DIP switches are used. The use of a single
supply for this EVM is not recommended. As shipped, the preamplifier is set
to a gain of 2 and the preamplifier directly drives the PGA stage. An
oscilloscope is typically used to view and analyze the EVM output signals.
1) Ensurethatallpowersuppliesaresetto
OFF beforemakingpowersupply
connections to the THS7001 EVM.
2) Select the operating voltage for the EVM and connect appropriate split
powersuppliestothebananajacks on the module marked +V
CC
(J1)and
–V
CC
(J3).
3) Connect a 5-V power supply to the banana jack marked
+5 V (J4).
4) Connect all power supply grounds to the banana jack marked GND (J2).
5) Connect an oscilloscope probe to the PGA–A amplifier output BNC (J9).
ConnectingdirectlytoJ9witha50-Ωnominalimpedancecableandprobe
isnotrecommended.TheoutputdrivecapabilityofthePGAisverylimited.
Such a connection will load the output excessively, reducing the output
voltage range of the amplifier and is not a true measurement of the
amplifier performance.
6) Set EVM jumpers as shown in Table 1–3.
Table 1–3.THS7001 EVM Jumper Settings
JP1 JP2 JP3
2–3 2–3 2–3
7) Set DIP switch S1 as shown in Table 1–4.
Table 1–4.THS7001 EVM DIP Switch Settings
SWITCH S1 LABEL POSITION
S1:A G0 0
S1:B G1 0
S1:C G2 1
S1:D S/D 0
S1:E VREF 1
S1:F VL 1
8) Set the power supplies to ON .
9) Connect a signal input to the INPUT A BNC (J6).
Note that each input connector on this EVM is terminated with a 50-Ωresistor
to ground. With a 50-Ωsource impedance, the voltage seen by the THS7001
amplifierIContheEVMwill be ½ thesourcesignal voltageappliedtotheEVM
input connector.
10) Verifytheoutputsignalontheoscilloscopeusingahigh-impedanceprobe
— a voltage gain of approximately 2.5 to 1 should be observed.

THS7001 EVM Performance
1-11
General Information
1.7 THS7001 EVM Performance
Figure 1–5 shows the typical frequency and phase response the THS7001
EVM preamplifier with ±15-V supplies and Figure 1–6 shows the typical
frequency and phase response of the THS7001 EVM preamplifier with ±5-V
supplies. Typical –3 dB bandwidth of the preamplifier with a ±15-V power
supply is 100 MHz and 90 MHz with a ±5-V power supply.
Figure 1–5.THS7001 EVM Preamplifier Response, V
CC
= ± 15 V
f – Frequency – Hz
100k 1M 10M 100M
6
4
2
7
5
3
1
500M
VO= 0.4 Vp–p
RL= 150 Ω
Output Amplitude – dB
0
Phase
Amplitude
–1
–60
–120
–30
30
0
–90
–150
–180
Output Phase – °
60
Figure 1–6.THS7001 EVM Preamplifier Response, V
CC
= ± 5 V
f – Frequency – Hz
100k 1M 10M 100M
6
4
2
7
5
3
1
500M
VO= 0.4 Vp–p
RL= 150 Ω
Output Amplitude – dB
0
Phase
Amplitude
–1
–60
–120
–30
30
0
–90
–150
–180
Output Phase – °
60

THS7001 EVM Performance
1-12
General Information
Figure 1–7 shows the typical frequency and phase response of the THS7001
EVM PGA with ±15-V supplies and Figure 1–8 shows the typical frequency
andphase response of theTHS7001 EVM PGAwith ±5-V supplies. Thisdata
was collected with the gain set to +2 dB. Typical –3 dB bandwidth is 70 MHz
with a ±5-V power supply and 80 MHz with a ±15-V power supply.
Figure 1–7.THS7001 EVM PGA Response, V
CC
= ± 15 V
f – Frequency – Hz
100k 1M 10M 100M
3
1
–1
4
2
0
–2
500M
VO= 0.4 Vp–p
RL= 150 Ω
Output Amplitude – dB
–3
Phase
Amplitude
–4
180
90
225
315
270
135
45
0
Output Phase – °
360
Figure 1–8.THS7001 EVM PGA Response, V
CC
= ± 5 V
f – Frequency – Hz
100k 1M 10M 100M
3
1
–1
4
2
0
–2
500M
VO= 0.4 Vp–p
RL= 150 Ω
Output Amplitude – dB
–3
Phase
Amplitude
–4
180
90
225
315
270
135
45
0
Output Phase – °
360

THS7001 EVM Performance
1-13
General Information
Figure 1–9 shows the typical frequency and phase response of the THS7001
EVM preamplifier + PGA with ±15-V supplies and Figure 1–10 shows the
typical frequency and phase response of the THS7001 EVM preamplifier +
PGA with ±5-V supplies. This data was collected with the preamplifier directly
driving the PGA input. The PGA was set to a gain of +2 dB. Typical –3 dB
bandwidth is 70 MHz with a ±5-V power supply and 80 MHz with a ±15-V
power supply.
Figure 1–9.THS7001 EVM Preamplifier + PGA Response, V
CC
= ± 15 V
f – Frequency – Hz
100k 1M 10M 100M
9
7
5
10
8
6
4
500M
VO= 0.4 Vp–p
RL= 500 Ω
Output Amplitude – dB
3
180
90
225
315
270
135
45
0
Output Phase – °
Phase
Amplitude
Figure 1–10. THS7001 EVM Preamplifier + PGA Response, V
CC
= ± 5 V
f – Frequency – Hz
100k 1M 10M 100M
9
7
5
10
8
6
4
500M
VO= 0.4 Vp–p
RL= 500 Ω
Output Amplitude – dB
3
180
90
225
315
270
135
45
0
Output Phase – °
Phase
Amplitude

General High-Speed Amplifier Design Considerations
1-14
General Information
1.8 General High-Speed Amplifier Design Considerations
The THS7001 EVM layout has been designed and optimized for use with
high-speedsignalsandcanbeusedasanexamplewhendesigningTHS7001
applications. Careful attention has been given to component selection,
grounding,powersupplybypassing,andsignalpathlayout.Disregardofthese
basic design considerations could result in less than optimum performance of
the THS7001 IC.
Surface-mountcomponents were selected because of the extremelylow lead
inductance associated with this technology. Also, because surface mount
components are physically small, the layout can be very compact. This helps
minimize both stray inductance and capacitance.
Tantalum power supply bypass capacitors (C4, C5, and C21) at the power
inputpads help supply currentsfor rapid, large signalchanges at the amplifier
output.The0.1µFpowersupplybypasscapacitors (C11,C12,C18,andC19)
were placed as close as possible to the IC power input pins in order to keep
the PCB trace inductance to a minimum. This improves high-frequency
bypassing and reduces harmonic distortion.
A proper ground plane on both sides of the PCB should always be used with
high-speedcircuit design. This provides low-inductiveground connections for
return current paths. In the area of the preamplifier input pins, however, the
ground plane was removed to minimize stray capacitance and reduce ground
plane noise coupling into these pins. This is especially important for the
invertingpinwhiletheamplifierisoperatinginthenoninvertingmode.Because
the voltage at this pin swings directly with the noninverting input voltage, any
stray capacitance would allow currents to flow into the ground plane, causing
possible gain error and/or oscillation. Capacitance variations at the amplifier
IC input pin of less than 1 pF can significantly affect the response of the
amplifier.
In general, it is always best to keep signal lines as short and as straight as
possible. Sharp 90 _ corners should generally be avoided — round corners or
a series of 45 _ bends should be used, instead. Stripline techniques should
alsobeincorporatedwhensignallinesaregreaterthan1inchinlength.These
traces should be designed with a characteristic impedance of either 50 Ωor
75Ω, as required by the application. Such signal lines should also be properly
terminated with an appropriate resistor.
Finally,properterminationofallinputsandoutputsshouldbeincorporatedinto
the layout. Unterminated lines, such as coaxial cable, can appear to be a
reactive load to the amplifier IC. By terminating a transmission line with its
characteristic impedance, the amplifier’s load then appears to be purely
resistive, and reflections are absorbed at each end of the line. Another
advantage of using an output termination resistor is that capacitive loads are
isolated from the amplifier output. This isolation helps minimize the reduction
in amplifier phase-margin and improves the amplifier stability for improved
performance such as reduced peaking and settling times.