Texas Instruments TLC5540 User manual

TLC5540/TLC5510/TLC5510A/
TLV5540/TLV5510
Evaluation Module
1999 Mixed-Signal Products
User’s Guide
SLAU007C

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TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TIdeemsnecessarytosupport thiswarranty. Specifictestingof allparametersofeachdevice isnotnecessarily
performed, except those mandated by government requirements.
CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF
DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL
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In order to minimize risks associated with the customer’s applications, adequate design and operating
safeguards must be provided by the customer to minimize inherent or procedural hazards.
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Copyright 1999, Texas Instruments Incorporated

Information About Cautions and Warnings
iii
Read This First
Preface
Read This First
About This Manual
The purpose of this user’s guide is to serve as a reference book for the
TLC5540/TLC5510/TLC5510A/TLV5510/TLV5540 devices. This document
providesinformation to assistmanagers and hardware/softwareengineers in
application development.
How to Use This Manual
This document contains the following chapters:
- Chapter 1 Overview
- Chapter 2 Circuit Description
- Chapter 3 Physical Description
Information About Cautions and Warnings
This book may contain cautions and warnings.
This is an example of a caution statement.
A caution statement describes a situation that could potentially
damage your software or equipment.
This is an example of a warning statement.
A warning statement describes a situation that could potentially
cause harm to you.
The information in a caution or a warning is provided for your protection.
Please read each caution and warning carefully.

Related Documentation From Texas Instruments
iv
Related Documentation From Texas Instruments
ThefollowingdocumentsmaybeorderedbycontactingtheTexasInstruments
Product Information Center at one of the numbers listed on the next page, or,
they may be downloaded at:
http://www–s.ti.com/sc/docs/psheets/pids2.htm
TLC5510/TLC5510A Data Sheet (literature number SLAS095) contains
electrical specifications, available temperature options, general over-
view of the device, and application information.
TLC5540 Data Sheet (literature number SLAS105) contains electrical
specifications, available temperature options, general overview of the
device, and application information.
TLV5510 Data Sheet (literature number SLAS124) contains electrical
specifications, available temperature options, general overview of the
device, and application information.
TLV5540 Data Sheet (literature number SLAS192) contains electrical
specifications, available temperature options, general overview of the
device, and application information.
CE/FCC Warnings
Thisequipmentisintendedforuseinalaboratorytestenvironmentonly.Itgen-
erates,uses,andcanradiate radio frequency energy and has notbeentested
for compliance with the limits of computing devices pursuant to subpart J of
part15ofFCCrules.Thisdevicehas beentestedandfoundtocomplywiththe
limits for a CISPRII Group 1 and the following directives: EMC Directive
89/336/EEC amending directive 92/31/EEC and 93/68/EEC as per
ENV50204:1995, EN55011: 1995 Class A, EN61000–4–4: 1995, and
EN6100–4–3: 1993. Operation of this equipment in other environments may
cause interference with radio communications, in which case the user at his
own expense will be required to take whatever measures may be required to
correct this interference.

Running Title—Attribute Reference
v
Chapter Title—Attribute Reference
Contents
1 Overview 1-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.1 Purpose 1-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.2 Power Supply Requirements 1-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2 Circuit Description 2-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.1 EVM Analog Input 2-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.1.1 Direct Input 2-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.1.2 Amplifier Input, DC Coupled 2-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.1.3 Amplifier Input, AC Coupled 2-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.1.4 Input Bias Operational Range 2-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.1.5 Test Points 2-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.1.6 User Supplied Input Circuit 2-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.2 Digital Output 2-5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.3 Clock Circuit 2-6. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.4 Board Schematic 2-7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3 Physical Description 3-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.1 Board Layout 3-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.2 Board Layers 3-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.3 Part Descriptions 3-6. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Running Title—Attribute Reference
vi
Figures
2–1 Board Schematic 2-8. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3–1 EVM Board Layout 3-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3–2 EVM Board Layer 1 3-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3–3 EVM Board Layer 2 3-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3–4 EVM Board Layer 3 3-5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3–5 EVM Board Layer 4 3-6. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Tables
1–1 Power Supplies 1-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2–1 Amplifier Input Coupling 2-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2–2 Input Voltage Setting 2-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2–3 Test Points 2-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3–1 Part Descriptions 3-7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

1-1
Overview
Overview
This chapter gives an overview of the TLC5540/TLC5510/TLC5510A/
TLV5540/TLV5510 evaluation module (EVM).
Topic Page
1.1 Power Supply Requirements 1–2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.2 EVM Analog Input 1–3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Chapter 1

Purpose
1-2
Overview
1.1 Purpose
The TLC5540/TLC5510/TLC5510A/TLV5540/TLV5510 evaluation module
(EVM) provides a platform for lab prototype evaluation of the Texas Instru-
ments TLC5540/TLC5510/TLC5510A/TLV5540/TLV5510 8-bit, high-speed
analog-to-digital converters.
Since practical operation can be acheived in excess of 40 MHz, the circuit
layout is critical and does not lend itself to classic breadboarding techniques.
In fact, proper operation requires use of surface-mount components.

Power Supply Requirements
1-3
Overview
1.2 Power Supply Requirements
The TLC5540/TLC5510/TLC5510A/TLV5540/TLV5510 EVM is designed to
be powered by regulated lab power supplies. Three lab supplies are required
for the best performance.
Table 1–1.Power Supplies
If Amp Used By-pass Amp
Connector Supply TLC5540/5510/
5510A TLV5540/5510 TLC5510/ 5540/5510A TLV5510/5540
J2 Positive analog supply 5 V ±10% 3.6 V MIN 5 V ±10% 3.6 V – 2.7 V
J3 Negative analog supply –5 V ±10% –3.6 MIN N/A N/A
J8 Digital supply 5 V ±10% 3.6 V – 3.3 V 5 V ±10% 3.6 V – 2.7 V
The5V/3.6Vand–5 V/–3.6 V analogsuppliesshareananaloggroundplane.
The digital supply uses an isolated ground plane.
The two ground planes can be easily connected by soldering jumpers from
E21 to E22 or from E13 to E14. This allows the user to adapt the EVM to
various grounding conditions that can exist in an evaluation circuit interface.

1-4
Overview

2-1
Circuit Description
Circuit
Description
This chapter describes the EVM circuit and its operation.
Topic Page
2.1 EVM Analog Input 2–2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.2 Digital Output 2–5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.3 Clock Circuit 2–6. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.4 Board Schematic 2–7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Chapter 2

EVM Analog Input
2-2
Circuit Description
2.1 EVM Analog Input
The EVM analog input signal is applied to BNC connector J4 by one of four
methods:
- Direct
- Amplifier input (dc coupled)
- Amplifier input (ac coupled)
- User supplied input
2.1.1 Direct Input
To route the signal directly to the TLC5540/TLC5510/TLC5510A/
TLV5540/TLV5510 input, solder jumpers from E7 to E8 and from E23 to E12.
Thisprovidesa50-Ohmload(R5)atinputconnectorJ4.Theinputsignalmust
be dc biased to the specifications defined by the data sheet. The
TLC5540/TLC5510/TLC5510A/TLV5540/TLV5510 is connected using its in-
ternalbiasresistors.JumperJ6bypassesoneoftheinternalbiasresistorsand
thus alters the input bias range required by the input signal. With J6 installed,
the voltage range of the TLC5540/TLC5510 is 0 V – 2.28 V and
TLV5540/TLV5510 is 0 V – 2.74 V (at 3.3 VDDA).
The TLC5510A uses only the center internal bias resistor with an externally-
applied regulated 4-V reference to generate the device reference voltage.
Hence the input signal range applied to J4 can be between 0 V – 4 V.
The input signal is bandlimited to 12 MHz by the LC filter consisting of FB5,
R15, and C5. For a bandwidth of 20 MHz, select a value for C5 in the 15 pF
to 33 pF range.

EVM Analog Input
2-3
Circuit Description
2.1.2 Amplifier Input, DC Coupled
ATHS3001high-speedtransconductanceoperationalamplifierprovidesbuff-
eringfordc-coupledamplifier-inputsignals.Theamplifiercircuitprovidesaflat
response to 300 MHz with a gain of two. It can drive a low impedance load.
The values of R6 and R8 set the amplifier gain to two.
The gain can be reduced to one by removing R6. Since the inverting input is
a low-impedance current-controlled input, R8 must remain in the circuit, and
its value must be changed to 1 kΩ. This resistance value is critical because it
controls the high frequency response of the circuit. The TLC5510A amplifier
gain is set to one.
The output roll-off filter, consisting of R4 and C14, provides a small amount of
filtering against frequencies in excess of 20 MHz (fs/2). The value of C14 can
bealtered to changethe filter characteristics, orC14 can beremoved entirely.
Inmostcases,R4shouldberetainedto lower the direct capacitiveloadonthe
operational amplifier, thereby avoiding high frequency peaking of the output
signal.
Resistor R7 also provides isolation against a direct capacitive load (such as
a scope probe) on the test point terminal.
The amplifier output circuit is connected to the TLC5540/TLC5510/
TLC5510A/TLV5540/TLV5510 by soldering a jumper between terminals E10
and E12.
The amplifier input can be either dc coupled or ac coupled to the input.
Table 2–1 shows the jumpers required to select either input coupling method.
Table 2–1.Amplifier Input Coupling
Coupling Jumper Terminals
dc E3 to E4
ac E1 to E2
2.1.3 Amplifier Input, AC Coupled
Potentiometer R2 controls the dc input bias for amplifier ac-coupled inputs.
This allows the bias to be varied from near ground to near 5 V/3.6 V (analog).
Withanamplifiergainoftwo, theoutputapproachesthepositivepowersupply
whenthebiaspotentiometerapproaches2.5VfortheTLC5510/TLC5560and
1.8 V for the TLV5510/TLV5540.
For a 4-V input and a gain of 1 (R6 removed and R8 set to 1 kΩfor optimum
settlingtimeandminimumringing)biaspotentiometerR2isadjustedsuchthat
E1isat2Vandtheamplifieroutputswingis0Vto4VatTP2.Withanamplifier
supplyvoltage of +5 V the output positive peakwill be distortedslightly; there-
fore, it is necessary to adjust the 5-V supply to 5.56 V in order to prevent clip-
ping of the amplifier output voltage.

EVM Analog Input
2-4
Circuit Description
The low frequency response pole is dominated by the 4.7-µF capacitor (C6)
and the resistance setting of the potentiometer.
2.1.4 Input Bias Operational Range
JumperJ6determinesthesignalinputrange(0tofullscale)attheanaloginput
of the TLC5540/TLC5510/TLC5510A/TLV5570/TLV5540. Table 2–2 shows
the effects of J6.
Table 2–2.Input Voltage Setting
Jumper J6
TLC5540/TLC5510
Input Voltage
Range
@ 5 VDDA
TLV5540/TLV5510
Input Voltage
Range
@ 3.3 VDDA
TLC5510A
Input Voltage Range
@ 5 VDDA
Removed 0.6 V to 2.6 V 0.66 V to 2.87 V 0 V to 4 V (J11 and J16
installed)
Installed 0 V to 2.28 V 0 V to 2.74 V 0 V to 4 V (J11 and J16
installed)
Other output ranges can be configured. See the TLC5540/TLC5510/
TLC5510A/TLV5540/TLV5510 data sheets.
2.1.5 Test Points
Test points TP1 and TP2 provide an oscilloscope connection to monitor the
output of the analog input conditioning amplifier stage as follows:
Table 2–3.Test Points
Test Point Connection
TP1 Analog ground
TP2 Analog output of THS3001
2.1.6 User Supplied Input Circuit
A breadboarding area allows the use of custom input filters or other signal
conditioning circuits. To route the input signal to the breadboarding area
(terminal E24), solder a jumper between terminals E5 and E6.
To route the signal from the breadboard area (terminal E25) to the
TLC5540/TLC5510/TLC5510A/TLV5540/TLV5510 input, solder a jumper
between terminals E11 and E12.
Only one of the above configurations should be used at one time to prevent
excessivecapacitanceonthesignalpath.Thisexcessivecapacitancecande-
grade the input signal quality at high frequencies.

Digital Output
2-5
Circuit Description
2.2 Digital Output
Anoctalhigh-speedlatch(U4) provides buffereddigitaldata.Thefactorycon-
figurationusesthislatchasabuffertodrivethe22-ohmlinedampingresistors.
Pin24ontheoutputconnector(J5)canbeusedtodrivetheU4outputtoahigh
impedance(3-state)allowingabus interface toexternalcircuitry.To doso,the
jumper between terminals E17 and E18 must be removed to remove the
ground connection. Logic 1 applied to J5 pin 24 makes the latch output a
3-state output.
This latch can be transparent by using external circuitry to drive the strobe
input (pin 11). The jumper at E19 and E20 must be removed and the external
drivebe connected toE19. A logic0 on thisinput captures andholds the input
data on the output. A logic 1 allows the outputs to follow the inputs.

Clock Circuit
2-6
Circuit Description
2.3 Clock Circuit
An external clock of up to 40 MHz is required for operation. The clock source
is required to drive the 50-ohm BNC input J1. If the clock signal comes from
a DSP or microcontroller, resistor R1 should be removed from the circuit. The
clock is buffered by inverters (U1) and provides a true (noninverted) output to
the TLC5540/TLC5510/TLC5510A/TLV5540/TLV5510 and a true equivalent
output at pin 22 of the output connector J5. This provides the user a buffered
reference clock output for external circuitry.

Board Schematic
2-7
Circuit Description
2.4 Board Schematic
Figure 2–1 shows the EVM board schematic.

Board Schematic
2-8
Figure 2–1.Board Schematic
19 14 15 18 16 17 23 22 20 21
12 3 4 5 6 7 8 9 10
1 11 13 2 24
ANALOG IN CLOCK VDDA VDDA VDDA REFTS REFT REFB REFBS AGND AGND
D1 D2 D3 D4 D5 D6 D7 D8
OE
VDD VDD
DGND DGND
C23C24C20C21
C26C22
+
C25
C18
+
C17C10
+
FB1 FB2 FB3
E12
E10
E11
E23
+
C14
R4
R7 TP2
TP1
ANALOG OUT
GND
_ +6
7 4
3 2
C7
C8
5 VA
R8
C16
C19 R6
–5 VA
R12
R2 POT
+
C6
E1 E2 E3 E4 E5 E6 E7 E8
R5
J4
BNC
ANALOG
IN
5 VA R11
Breadboard
Area
E24 E25
5 VA
U1F
U1E
74AC11004B
74AC11004B
U1A 912
1011
1
C4
5 VD
20
J1
BNC
R1
CLOCK IN
C12
+5 VD
9 8 7 6 5 4 3
2
D8 D7 D6 D5 D4 D3 D2 D1
Q8 Q7 Q6 Q5 Q4 Q3 Q2 Q1
C OC
11
1
C15
U4
74AC573
12 13 14 15 16 17 18 19 20
VCC
10
GND 1
2 3 4 5 6 7 8 9
10
11
12 13 14 15 16 17 18 19 20 21 22 23 24
D1 GND D2 GND D3 GND D4 GND
X X
89 710 611 512 413 314 215 116
R13H
E20 E19
5 VD
R13G
R13F
R13E
R13D R13C
R13B R13A
D1 D2 D3 D4 D5 D6 D7 D8
D5 GND D6 GND D7 GND D8 GND GND GND CLOCK OUT GND GND OE
J5
R10
1
2
J8 +
5 V dc
GND
5 VD
C27
1
2
J2
5 V dc
GND
5 VA
C1
1
2
J3
GND
–5 V dc C27
+
–5 VA
E13 E14 E21 E22
U3
TLC5540/TLC5510/TLC5510A/
TLV5540/TLV5510
U2 THS3001
4567
15 16
74AC11004B
GND
10
1
2
See Note 4
E15 E16
1
2
See Note 4
5 VD
E17 E18
1
2
See Note 4
See Note 3
JP3 JP4
J12
1 2
FB5
R3
R9
R14
J7
1 2U5
FB4 4 V
C9
R15
JP1
C5
See Option Table
U1B
74AC11004B
219
J13
1 2
E27
U1C
74AC11004B
318
J14
1 2
E30
U1D
74AC11004B
813
J15
1 2
E33
See Note 5 See Note 5 See Note 5
J6-1 J6-2
1
2
See Note 4
J11 J16
J10
J9
1
1
See Note C
JP2
See Note 3
Notes: 1) Unless otherwise specified capacitors are in µF, ±20%, 50 Vdc.
2) Unless otherwise specified resistors are in ohms, ±5%. 3) JP1, JP2, JP3, JP4 are jumper wires that are installed at the factory. 4) (J6-1–J6-2), (E15-E16), (E17-E18), and (E19-E20) are 1” center headers with removable jumpers. 5) E-26, E28, and E30 inverter inputs should be tied to J13-2, J14-2, and J15-2, respectively, if not being used. 6) FB5, R15 and C5 are optional LP filter components.
DEVICE INSTALL
TLC5510
TLV5510 JP1, JP2, JP3, JP4, (J6-1–J6-2), J13, J14, J15,
(E15–E16), (E17–E18), (E19–E20),J10, J11, C24, C23
TLC5540
TLV5540 JP1, JP2, JP3, JP4, (J6-1–J6-2), J13, J14, J15,
(E15–E16), (E17–E18), (E19–E20), J10, J11, C24, C23
TLC5510A JP1, JP2, JP3, JP4, (J6-1–J6-2), J13, J14, J15,
(E15–E16), (E17–E18), (E19–E20), J11, J7, J12, R14, R9, R3, U5, J9 AND J16
OPTION TABLE
++ 1
+
+
– +
See Note 6
C13 C11

3-1
Physical Description
Physical Description
ThischapterdescribesthephysicalcharacteristicsandPCBlayoutoftheEVM
and lists the components used on the module.
Topic Page
3.1 Board Layout 3–2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.2 Board Layers 3–3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.3 Part Descriptions 3–7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Chapter 3

Board Layout
3-2
Physical Description
3.1 Board Layout
Figure 3–1 shows the EVM board layout.
Figure 3–1.EVM Board Layout