Texas Instruments LM5181-Q1 User manual

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LM5180-Q1 Dual-Output EVM User's Guide
User's Guide
SNVU609B–October 2018–Revised April 2020
LM5180-Q1 Dual-Output EVM User's Guide
With input voltage range and current capability as specified in Table 1, the family of PSR flyback DC/DC
converters from TI provides flexibility, scalability, and optimized solution size for a range of applications.
Using an 8-pin WSON package with 4-mm × 4-mm footprint and 0.8-mm pin pitch, these converters
enable isolated DC/DC solutions with high density and low component count.
Table 1. PSR Flyback DC/DC Converter Family
PSR FLYBACK
CONVERTER INPUT VOLTAGE RANGE PEAK SWITCH CURRENT (TYP) MAXIMUM LOAD CURRENT, VOUT = 12 V, NPS = 1
VIN = 4.5 V VIN = 13.5 V VIN = 24 V
LM5181-Q1 4.5 V to 65 V 0.75 A 90 mA 180 mA 225 mA
LM5180-Q1 4.5 V to 65 V 1.5 A 180 mA 360 mA 450 mA
LM25180-Q1 4.5 V to 42 V 1.5 A 180 mA 360 mA 450 mA
LM25183-Q1 4.5 V to 42 V 2.5 A 300 mA 600 mA 750 mA
LM25184-Q1 4.5 V to 42 V 4.1 A 500 mA 1 A 1.25 A
The LM5180EVM-DUAL evaluation module (EVM) is a flyback DC/DC converter that employs primary-side
regulation (PSR) based on sampling of the primary winding voltage of the transformer to achieve high
conversion efficiency in a small footprint. It operates over a wide input voltage range of 10 V to 65 V and
delivers dual isolated outputs of 15 V and –7.7 V at 200-mA rated load current. Operating without an
optocoupler or transformer auxiliary winding, the converter provides an output voltage with better than
±2% load regulation. The flyback transformer has a turns ratio of 1 : 1: 0.52 (PRI : SEC1 : SEC2) and
provides 1500 VRMS primary-to-secondary isolation.
The EVM design uses the LM5180-Q1 PSR flyback converter with wide input voltage (wide VIN) range. An
integrated 100-V, 1.5-A power MOSFET provides ample margin for line transients and switch (SW) node
voltage spikes related to transformer parasitic leakage inductance. Load regulation errors related to
transformer secondary winding resistance are avoided by virtue of the quasi-resonant boundary
conduction mode (BCM) control scheme.
Additional features includes current-mode control with internal compensation, hiccup-mode fault
protection, low input quiescent current, programmable soft-start, and optional output voltage temperature
compensation. UVLO protects the converter at low input voltage conditions, and the EN/UVLO pin
supports adjustable input UVLO with user-defined hysteresis for application specific power-up and power-
down requirements.
The LM5180 and LM5180-Q1 are available in a 8-pin WSON package with 4-mm × 4-mm footprint and
0.8-mm pin pitch to enable isolated DC/DC solutions with high density and low component count. Wettable
flank pins provide a visual indicator of solderability, which reduces the inspection time and manufacturing
costs in high-reliability industrial and automotive applications. See the LM5180 and LM5180-Q1 device
data sheets for more information.
Use the LM5180-Q1 with WEBENCH®Power Designer to create a custom regulator design. Furthermore,
the user can download the LM5180 Quickstart Calculator to optimize component selection and examine
predicted efficiency performance across line and load ranges.

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LM5180-Q1 Dual-Output EVM User's Guide
Contents
1 High Density EVM Description............................................................................................. 3
2 EVM Performance Characteristics......................................................................................... 4
3 Application Circuit Diagram................................................................................................. 5
4 EVM Photo.................................................................................................................... 5
5 Test Setup and Procedure.................................................................................................. 6
6 Test Data and Performance Curves....................................................................................... 8
7 EVM Documentation....................................................................................................... 15
8 Device and Documentation Support..................................................................................... 20
List of Figures
1 LM5180 PSR Flyback Dual-Output Schematic .......................................................................... 5
2 Dual-Output EVM Photo, 55 mm × 38 mm............................................................................... 5
3 EVM Test Setup ............................................................................................................. 6
4 Conversion Efficiency (Linear Scale), Outputs Loaded Symmetrically ............................................... 8
5 Conversion Efficiency (Log Scale), Outputs Loaded Symmetrically .................................................. 8
6 Load Regulation (Linear Scale), Sum of VOUT1 and VOUT2 Measured, Outputs Loaded Symmetrically............ 9
7 Load Regulation (Log Scale), Sum of VOUT1 and VOUT2 Measured, Outputs Loaded Symmetrically............... 9
8 SW Node Voltage, IOUT1 = –IOUT2 = 200 mA, VIN = 24 V ................................................................ 10
9 SW Node Voltage, IOUT1 = –IOUT2 = 200 mA, VIN = 48 V ................................................................ 10
10 Flyback Diode Voltages, IOUT1 = –IOUT2 = 200 mA, VIN = 24 V ......................................................... 11
11 Flyback Diode Voltages, IOUT1 = –IOUT2 = 200 mA, VIN = 48 V ......................................................... 11
12 Output 1 Load Transient, 50 mA to 200 mA at 100mA/µs, IOUT2 = –200 mA, VIN = 24 V.......................... 12
13 Output 2 Load Transient, 50 mA to 200 mA at 100mA/µs, IOUT1 = 200 mA, VIN = 24 V ........................... 12
14 Start-Up, VIN = 24 V, IOUT1 = –IOUT2 = 200 mA Resistive................................................................ 13
15 Enable On, VIN = 24 V, IOUT1 = –IOUT2 = 200 mA Resistive ............................................................. 13
16 Short Circuit Recovery, VIN = 24 V, IOUT1 = –IOUT2 = 200 mA Resistive............................................... 14
17 EVM Schematic ............................................................................................................ 15
18 Top Copper (Top View) ................................................................................................... 17
19 Bottom Copper (Top View)................................................................................................ 17
20 Top Assembly............................................................................................................... 18
21 Bottom Assembly........................................................................................................... 18
22 Layout Design Tips for a Dual-output PSR Flyback Converter ...................................................... 19
List of Tables
1 PSR Flyback DC/DC Converter Family................................................................................... 1
2 Electrical Performance Characteristics ................................................................................... 4
3 EVM Connections............................................................................................................ 6
4 Bill of Materials ............................................................................................................. 16
Trademarks
WEBENCH is a registered trademark of Texas Instruments.
All other trademarks are the property of their respective owners.

www.ti.com High Density EVM Description
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LM5180-Q1 Dual-Output EVM User's Guide
1 High Density EVM Description
The LM5180EVM-DUAL EVM is designed to use a regulated or non-regulated high-voltage input rail
ranging from 10 V to 65 V to produce a tightly-regulated, isolated output voltages of 15 V and –7.7 V at
load currents up to 200 mA. This wide VIN range isolated DC/DC solution offers outsized voltage rating
and operating margin to withstand supply rail voltage transients.
The power-train passive components selected for this EVM, including flyback transformer, flyback
rectifying diodes, and ceramic input and output capacitors, are available from multiple component vendors.
Transformers with functional or basic grade isolation are available with isolation voltages of 1.5 kV and
greater.
1.1 Typical Applications
•Automotive HEV/EV powertrain systems
• Sub-AM band automotive body electronics
•Traction inverters: IGBT and SiC gate drivers
•Isolated field transmitters and field actuators
•Building automation HVAC systems
• Isolated bias power rails
1.2 Features and Electrical Performance
• Tightly-regulated, isolated output voltages of 15 V and –7.7 V with better than ±2% load regulation
from 1% to 100% load
• Wide input voltage operating range of 10 V to 65 V
• Full load current of 200 mA, both outputs
• Maximum switching frequency of 350 kHz remains below the AM band for automotive applications
• High efficiency across wide load current range
– Full load efficiency of 88% and 87.5% at VIN = 24 V and 48 V, respectively
– 88.5% efficiency at half-rated load, VIN = 24 V
• 1.4-mA and 1.1-mA no-load supply current at VIN = 24 V and 48 V, respectively
• Ultra-low conducted and radiated EMI signatures
– Optimized for CISPR 25 class 5 requirements
– Soft switching avoids diode reverse recovery
– Input π-stage EMI filter with damping from electrolytic capacitor ESR
• Boundary conduction mode (BCM) control architecture provides fast line and load transient response
– Peak current-mode control
– Quasi-resonant switching for reduced power loss
– Internal loop compensation
• Integrated 100-V flyback power MOSFET
– Provides large headroom for input voltage transients
• Cycle-by-cycle overcurrent protection (OCP)
• Monotonic prebias output voltage start-up
• User-adjustable soft-start time set to 8 ms by 47-nF capacitor connected between SS/BIAS and GND
– Option for external bias using transformer auxiliary winding connected to SS/BIAS
• Resistor-programmable input voltage UVLO with customizable hysteresis for applications with wide
turn-on and turn-off voltage difference
– Input UVLO set to turn on and off at VIN of 9 V and 7 V, respectively
• Low transformer primary-to-secondary (interwinding) capacitance to accommodate high dv/dt
secondary-side common-mode swings
• Fully assembled, tested, and proven PCB layout with 55-mm × 38-mm total footprint

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2 EVM Performance Characteristics
(1) The default output voltages of this EVM are 15 V and –7.7 V. Efficiency and other performance metrics can change based on
operating input voltage, load currents, externally-connected output capacitance(s), and other parameters.
(2) The output power delivered by the LM5180-Q1 PSR flyback converter increases with input voltage.
(3) The selected transformer provides functional isolation.
Table 2. Electrical Performance Characteristics
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
INPUT CHARACTERISTICS
Input voltage range, VIN Operating 10 48 65
V
Input voltage turnon, VIN(ON) Adjusted using EN/UVLO divider resistors 9
Input voltage turnoff, VIN(OFF) 7
Input voltage hysteresis, VIN(HYS) 2
Input current, no load, IIN(NL) IOUT1 = IOUT2 = 0 mA VIN = 24 V 1.4 mA VIN = 48 V 1.1
VIN = 65 V 1
Input current, disabled, IIN(OFF) VEN = 0 V VIN = 24 V 10 µA
OUTPUT CHARACTERISTICS
Output voltage, VOUT1 (1) IOUT1/2 = 5 mA to 200 mA 14.7 15.0 15.3 V
Output voltage, VOUT2 (1) –7.5 –7.7 –7.9 V
Output current, IOUT1 , –IOUT2(2) VIN = 12 V 0 180
mA
VIN = 24 V 0 220
VIN = 48 V 0 300
VIN = 70 V 0 350
Output voltage regulation, ΔVOUT Load regulation, VIN = 24 V IOUT = 5 mA to 200 mA 1%
Line regulation, IOUT = 100 mA VIN = 10 V to 65 V 1%
Output voltage ripple, VOUT(AC) VIN = 24 V, IOUT1 = IOUT2 = 200 mA 100 mVrms
Output overcurrent protection, IOCP VIN = 24 V 250 mA
Soft-start time, tSS CSS = 47 nF 8 ms
SYSTEM CHARACTERISTICS
Switching frequency, FSW(nom) VIN = 24 V, IOUT1 = IOUT2 = 100 mA 350 kHz
Half-load efficiency, ηHALF (1) IOUT1 = IOUT2 = 100 mA VIN = 12 V 88.5%
VIN = 24 V 88.5%
VIN = 48 V 86%
VIN = 65 V 85%
Full load efficiency, ηFULL IOUT1 = IOUT2 = 200 mA VIN = 24 V 88% VIN = 48 V 87.5%
VIN = 65 V 87%
Isolation rating(3) Functional insulation 1500 V
LM5180 junction temperature, TJ–40 150 °C

IOUT1 = 0.2 A
CIN
2 x
10 F
4.7 F
T1
VIN = 10 V...65 V
1 : 1 : 0.52
RSET
12.1 k:
RFB
154 k:
DCLAMP
DF
RTC
301 k:
CSS
47 nF
Copyright © 2018, Texas Instruments Incorporated
RUV1
RUV2
68.1 k:
DOUT1
18 V
30PH
VOUT1 = 15 V
2 x
10 F
DOUT2
8.2 V
SW
FB
VIN
EN/UVLO
TC
GND
SS/BIAS
RSET
LM5180
DFLY1
COUT1
COUT2
DFLY2 IOUT2 = ±0.2 A
VOUT2 = ±7.7 V
340 k:24 V
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LM5180-Q1 Dual-Output EVM User's Guide
3 Application Circuit Diagram
Figure 1 shows the schematic of an LM5180-based flyback converter (EMI filter stage not shown). Soft
start (SS), temperature compensation (TC), and UVLO (EN/UVLO) components are shown that are
configurable as required by the specific application. The transformer turns ratio is 1 : 1: 0.52 and the
primary-referred magnetizing inductance is 30 µH.
Figure 1. LM5180 PSR Flyback Dual-Output Schematic
4 EVM Photo
Figure 2. Dual-Output EVM Photo, 55 mm × 38 mm

ACOM
Ammeter 3
V
Voltmeter 3
COM
V
Voltmeter 2
COM
Oscilloscope
+
-
Power Supply
ACOM
Ammeter 1
+
-
A
COM
Ammeter 2 E-Load 2
V
Voltmeter 1
COM
+ -
E-Load 1
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5 Test Setup and Procedure
5.1 Test Setup
Table 3. EVM Connections
LABEL DESCRIPTION
VIN+ Positive input voltage power and sense connection
VIN– Negative input voltage power and sense connection
VOUT1 Output #1 power and sense connection
VOUT2 Output #2 power and sense connection
S-GND Output return and sense connection
EN ENABLE input – tie to GND to disable converter
SS/BIAS External BIAS input
SW SW node connection
Referencing the EVM connections described in Table 3, the recommended test setup to evaluate the
LM5180EVM-DUAL is shown in Figure 3. Working at an ESD-protected workstation, make sure that any
wrist straps, boot straps, or mats are connected and referencing the user to earth ground before power is
applied to the EVM.
Figure 3. EVM Test Setup
SPACER
CAUTION
Refer to the LM5180 and LM5180-Q1 data sheets, LM5180 Quickstart
Calculator, and WEBENCH® Power Designer for additional guidance pertaining
to component selection and converter operation.

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5.2 Test Equipment
Voltage Source: The input voltage source VIN must be a 0–65-V variable DC source.
Multimeters:
•Voltmeter 1: Input voltage at VIN+ to VIN–. Set voltmeter to an input impedance of 100 MΩ.
•Voltmeter 2: Output voltage at VOUT1 to SGND. Set voltmeter to an input impedance of 100 MΩ.
•Voltmeter 3: Output voltage at VOUT2 to SGND. Set voltmeter to an input impedance of 100 MΩ.
•Ammeter 1: Input current. Set ammeter to 1-second aperture time.
•Ammeter 2: Load current, output #1. Set ammeter to 1-second aperture time.
•Ammeter 3: Load current, output #2. Set ammeter to 1-second aperture time.
Electronic Loads: The loads must be electronic constant-resistance (CR) or constant-current (CC) mode
load capable of 0 Adc to 300 mAdc up to 15 V. For a no-load input current measurement, disconnect the
electronic load as it may draw a small residual current.
Oscilloscope: With the scope set to 20-MHz bandwidth and AC coupling, measure the output voltage
ripple directly across an output capacitor with a short ground lead normally provided with the scope probe.
Place the oscilloscope probe tip on the positive terminal of the output capacitor, holding the ground barrel
of the probe through the ground lead to the negative terminal of the capacitor. TI does not recommend
using a long-leaded ground connection because this may induce additional noise given a large ground
loop. To measure other waveforms, adjust the oscilloscope as needed.
Safety: Always use caution when touching any circuits that may be live or energized.
5.3 Recommended Test Setup
5.3.1 Input Connections
• Prior to connecting the DC input source, set the current limit of the input supply to 100 mA maximum.
Ensure the input source is initially set to 0 V and connected to the VIN+ and VIN– connection points as
shown in Figure 3. An additional input bulk capacitor is recommended to provide damping if long input
lines are used.
• Connect voltmeter 3 at VIN+ and VIN– connection points to measure the input voltage.
• Connect ammeter 3 to measure the input current and set to at least 1-second aperture time.
5.3.2 Output Connections
• Connect electronic loads to VOUT1, VOUT2, and SGND connections as shown in Figure 3. Set the
load to constant-resistance mode or constant-current mode at 0 A before applying input voltage.
• Connect voltmeters 1 and 2 at VOUT1, VOUT2, and SGND connection points to measure the output
voltages.
• Connect ammeters 1 and 2 to measure the output currents.
5.4 Test Procedure
5.4.1 Line and Load Regulation, Efficiency
• Set up the EVM as described above.
• Set load to constant resistance or constant current mode and to sink 10 mA.
• Increase input source from 0 V to 24 V; use voltmeter 3 to measure the input voltage.
• Increase the current limit of the input supply to 500 mA.
• Using voltmeters to measure the respective output voltages, vary both loads from 10 mA to 200 mA
DC; VOUT1 and VOUT2 must remain within the load regulation specification.
• Set the load currents to 100 mA (50% rated load) and vary the input source voltage from 10 V to 65 V;
VOUT1 and VOUT2 must remain within the line regulation specification.
• Decrease loads to 10 mA. Decrease input source voltage to 0 V.

Output Current (mA)
Efficiency (%)
1 10 100 300300
30
40
50
60
70
80
90
100
VIN = 12V
VIN = 24V
VIN = 36V
VIN = 48V
VIN = 65V
Output Current (mA)
Efficiency (%)
0 50 100 150 200 250 300
50
55
60
65
70
75
80
85
90
95
100
VIN = 12V
VIN = 24V
VIN = 36V
VIN = 48V
VIN = 65V
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6 Test Data and Performance Curves
Figure 4 through Figure 16 present typical performance curves for the LM5180EVM-DUAL Because actual
performance data can be affected by measurement techniques and environmental variables, these curves
are presented for reference and can differ from actual field measurements.
6.1 Efficiency and Regulation
Figure 4. Conversion Efficiency (Linear Scale), Outputs Loaded Symmetrically
Figure 5. Conversion Efficiency (Log Scale), Outputs Loaded Symmetrically

Output Current (mA)
Output Voltage (V)
1 10 100 400400
22
22.4
22.8
23.2
23.6
24
VIN = 12V
VIN = 24V
VIN = 36V
VIN = 48V
VIN = 65V
Output Current (mA)
Output Voltage (V)
0 50 100 150 200 250 300 350 400
22
22.2
22.4
22.6
22.8
23
23.2
23.4
VIN = 12V
VIN = 24V
VIN = 36V
VIN = 48V
VIN = 65V
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Figure 6. Load Regulation (Linear Scale), Sum of VOUT1 and VOUT2 Measured, Outputs Loaded
Symmetrically
Figure 7. Load Regulation (Log Scale), Sum of VOUT1 and VOUT2 Measured, Outputs Loaded Symmetrically

1 Ps/DIV
SW 20V/DIV
1 Ps/DIV
SW 20V/DIV
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6.2 Operating Waveforms
6.2.1 Switching
Figure 8. SW Node Voltage, IOUT1 = –IOUT2 = 200 mA, VIN = 24 V
Figure 9. SW Node Voltage, IOUT1 = –IOUT2 = 200 mA, VIN = 48 V