Texas Instruments ADS1x48EVM User manual

User’s Guide
ADS1x48EVM Evaluation Module
ABSTRACT
The ADS1x48 evaluation module (EVM) allows users to evaluate the functionality of the Texas Instruments'
16-bit ADS1148 or the 24-bit ADS1248. ADS1x48 refers to what is common to both devices and EVMs.
Any differences in operation between the devices or EVMs are listed separately. The ADS1x48 devices are
highly integrated delta-sigma ADCs that include a programmable gain amplifier, a 2.048-V voltage reference,
an internal oscillator, dual current sources (IDACs), and several system-monitoring features. Each ADS1x48
device has inputs that can be configured as seven single-ended or four differential inputs. All of these features
integrated into the ADS1x48 devices enable precision measurement for many types of analog temperature
sensors including thermocouples, resistance temperature detectors (RTDs), and thermistors. This user’s guide
describes both the EVM hardware platform and the graphical user interface (GUI) software used to configure
and operate the device. This user’s guide also includes the EVM schematic diagram, board layout, and bill
of materials. The EVM platform eases the evaluation of the ADS1x48 device with hardware, software, and
computer connectivity through the universal serial bus (USB) interface.
Throughout this document, the abbreviation EVM and the term evaluation module are synonymous with the
ADS1x48EVM.
ADS1x48 Evaluation Module (ADS1248EVM Shown)
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Table of Contents
1 Introduction.............................................................................................................................................................................5
2 Getting Started With the ADS1x48EVM................................................................................................................................ 6
3 ADS1x48EVM Overview......................................................................................................................................................... 7
3.1 Analog and Digital Power Supplies.................................................................................................................................... 7
3.2 Voltage Reference Options................................................................................................................................................ 9
3.3 Clock Options...................................................................................................................................................................10
3.4 Digital Interface.................................................................................................................................................................11
3.5 Analog Input Connections................................................................................................................................................ 12
4 ADS1x48EVM GUI................................................................................................................................................................. 28
4.1 Home................................................................................................................................................................................28
4.2 Data Capture....................................................................................................................................................................31
4.3 Register Map....................................................................................................................................................................33
5 Bill of Materials, Printed Circuit Board Layout, and Schematic.......................................................................................36
5.1 Bill of Materials.................................................................................................................................................................36
5.2 Printed Circuit Board Layout............................................................................................................................................ 38
5.3 Schematic........................................................................................................................................................................ 41
6 Revision History................................................................................................................................................................... 42
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List of Figures
Figure 1-1. ADS1x48EVM Functional Block Diagram................................................................................................................. 5
Figure 2-1. Connecting the ADS1x48EVM to the PAMB Board...................................................................................................6
Figure 3-1. LED Indicators D1 and D5.........................................................................................................................................7
Figure 3-2. Jumper (JP1) Selects AVDD on the ADS1x48EVM.................................................................................................. 8
Figure 3-3. ADS1x48EVM VREF Options (Yellow) and Test Points (Red).................................................................................. 9
Figure 3-4. ADC Clock Options on the ADS1x48EVM.............................................................................................................. 10
Figure 3-5. ADS1x48EVM-to-PAMBoard Connections.............................................................................................................. 11
Figure 3-6. ADS1x48EVM Analog Input Terminal Blocks (J5, Left; J6, Right)...........................................................................12
Figure 3-7. Thermocouple Input Structure on the ADS1x48EVM..............................................................................................13
Figure 3-8. Using REF5025 (input J5:3) to Bias a Thermocouple............................................................................................. 13
Figure 3-9. Thermistor Input Structure on the ADS1x48EVM....................................................................................................15
Figure 3-10. Connecting a Thermistor to the J5 Terminal Block on the ADS1x48EVM.............................................................15
Figure 3-11. PCB Layout for J5 Terminal Block Showing Copper Pours for CJC Measurement............................................... 16
Figure 3-12. RTD Input Structure on the ADS1x48EVM............................................................................................................17
Figure 3-13. Connection Diagram for a 2-Wire RTD Using a Low-Side RREF .......................................................................... 19
Figure 3-14. Connection Diagram for a 2-Wire RTD Using a High-Side RREF ..........................................................................20
Figure 3-15. Connection Diagram for a 3-Wire RTD Using One IDAC and a Low-Side RREF ..................................................21
Figure 3-16. Connection Diagram for a 3-Wire RTD Using One IDAC and a High-Side RREF ................................................. 22
Figure 3-17. Connection Diagram for a 3-Wire RTD Using Two IDACs and a Low-Side RREF ................................................ 23
Figure 3-18. Connection Diagram for a 3-Wire RTD Using Two IDACs and a High-Side RREF ................................................24
Figure 3-19. Connection Diagram for a 4-Wire RTD Using a Low-Side RREF .......................................................................... 25
Figure 3-20. Connection Diagram for a 4-Wire RTD Using a High-Side RREF ..........................................................................26
Figure 3-21. Using the TC± Inputs on J5 as General-Purpose Signal Inputs............................................................................27
Figure 4-1. Browser Extension and TI Cloud Agent Installation................................................................................................ 28
Figure 4-2. ADS1x48EVM GUI Home Page.............................................................................................................................. 29
Figure 4-3. Connected Hardware Information........................................................................................................................... 29
Figure 4-4. File Menu.................................................................................................................................................................30
Figure 4-5. Data Capture Window............................................................................................................................................. 31
Figure 4-6. Capture Settings Slide-Out......................................................................................................................................31
Figure 4-7. Capture Statistics.................................................................................................................................................... 32
Figure 4-8. Time Domain Plot....................................................................................................................................................32
Figure 4-9. Histogram Plot.........................................................................................................................................................33
Figure 4-10. Register Map......................................................................................................................................................... 34
Figure 4-11. Register Read and Write Controls.........................................................................................................................34
Figure 4-12. Auto Read Options................................................................................................................................................ 35
Figure 4-13. Register Write Options.......................................................................................................................................... 35
Figure 5-1. Composite PCB Layout........................................................................................................................................... 38
Figure 5-2. Top Silkscreen......................................................................................................................................................... 39
Figure 5-3. Top Layer.................................................................................................................................................................39
Figure 5-4. Internal Ground Layer 1.......................................................................................................................................... 39
Figure 5-5. Internal Ground Layer 2.......................................................................................................................................... 39
Figure 5-6. Bottom Layer........................................................................................................................................................... 40
Figure 5-7. Bottom Silkscreen................................................................................................................................................... 40
Figure 5-8. ADS1x48EVM Schematic........................................................................................................................................41
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List of Tables
Table 1-1. Related Documentation.............................................................................................................................................. 5
Table 3-1. Summary of ADS1x48EVM VREF Options.................................................................................................................9
Table 3-2. ADS1x48EVM Header Pinout and Description......................................................................................................... 11
Table 3-3. ADS1x48EVM Terminal Block Input Description (J5 and J6)....................................................................................12
Table 3-4. ADS1x48EVM Terminal Block (J6) to ADC Connections..........................................................................................17
Table 3-5. ADS1x48EVM Settings for Different RTD Types...................................................................................................... 26
Table 5-1. Bill of Materials..........................................................................................................................................................36
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1 Introduction
The ADS1x48EVM is a fully assembled evaluation platform designed to highlight the ADS1x48 features and
modes of operation that make this device suitable for measuring analog temperature sensors. The EVM sits
on top of an accompanying precision ADC motherboard (PAMBoard) used as a USB-to-PC GUI communication
bridge. This board combination also serves as an example implementation of connecting a microcontroller
(MCU) to communicate with the ADS1x48 device through a serial-peripheral interface (SPI). Figure 1-1 shows a
functional block diagram for the ADS1x48EVM.
Note
The ADS1x48EVM requires an external controller to evaluate the ADS1x48 device.
The PAMBoard is controlled by commands received from the ADS1x48EVM GUI, and returns data to the GUI
for display and analysis. If the PAMBoard is not used, the EVM plug-in module format allows for an alternative
external host to communicate with the ADS1x48 through the pin headers J1 through J4. Header connections are
identified in Section 5.2 and listed in Table 3-2.
The combined ADS1x48EVM and PAMBoard incorporate the following features:
• ADS1x48, a 16- or 24-bit delta-sigma ADC with eight input channels
• Input terminal block and jumper configurations that enable easy measurement of many types of analog
temperature sensors
• Analog voltage (AVDD) selection of 3.3-V or 5-V operation for the ADS1x48
• Multiple voltage reference options: 2.048-V reference integrated into the ADS1x48, discrete REF5025,
ratiometric reference for RTD measurements, or external reference supplied via the input terminal blocks
• Internal or external clock selection
• SPI for communication and configuration
Analog Header and
Terminal Block
Analog Inputs
and RC Filter ADC
Analog Power
Source
PAMBboard
Digital Interface
PAMBoard
Power
EEPROM
Device ID
SPI /
GPIO I2C
AVDD
3.3 V
5 V
DVDD
REF5025 2.5 VREF
Figure 1-1. ADS1x48EVM Functional Block Diagram
Table 1-1 lists documents related to the ADS1x48EVM.
Table 1-1. Related Documentation
Device Literature Number
ADS1248 SBAS426
ADS1148 SBAS453
REF5025 SBOS410
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2 Getting Started With the ADS1x48EVM
The following list of steps provides an overview to quickly get the ADS1x48EVM setup and operational. The
subsequent sections in this document expand on each step in order to explain in detail the available features on
the ADS1x48EVM and the corresponding GUI. Links are provided to navigate from this quick-start guide to the
appropriate section at each step, where applicable.
1. Remove the ADS1x48EVM, PAMBoard, and USB cable from the ADS1x48EVM box.
2. If necessary, connect the ADS1x48EVM to the PAMBoard as shown in the left image in Figure 2-1.
3. Set the ADS1x48EVM jumpers to the desired location:
a. Power
b. Clock
c. RTD connections (if applicable)
4. Connect the micro-USB-to-USB cable from the PAMBoard directly to a USB port on the computer. Do not
connect the cable through a USB hub.
5. Open up the web-based GUI available on the EVM landing page (ADS1148EVM-PDK or ADS1248EVM-
PDK).
a. First-time users may be prompted to download and install the browser extension for Firefox™ or
Chrome™ and the TI Cloud Agent Application. Installing the TI Cloud Agent is a one-time download
and installation.
6. Refresh the GUI such that a green signal displays and the Hardware Connected indicator shows in the
bottom status ribbon (see Figure 4-2).
7. Select the desired ADC reference voltage.
8. Connect your sensors or signals to the input terminal blocks (J5 and J6).
9. Capture and analyze data using the GUI.
Figure 2-1. Connecting the ADS1x48EVM to the PAMB Board
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3 ADS1x48EVM Overview
Various onboard components are used to provide power to, communicate with, and interface the analog input to
the ADS1x48 device.
3.1 Analog and Digital Power Supplies
The ADS1x48 supports a wide unipolar analog supply voltage (AVDD) range from 2.7 V to 5.5 V and a bipolar
AVDD of ±2.5 V. The ADS1x48EVM AVDD can be set to either 3.3 V or 5 V. Power is supplied from the USB 5-V
source to the PAMBoard. However, the USB power-supply voltage is not consistent from PC to PC. A DC/DC
converter on the PAMBoard increases the USB output to 5.5 V. A linear low-dropout (LDO) regulator uses this
5.5-V output to provide clean and stable 5-V and 3.3-V supplies from the PAMBoard to the ADS1x48EVM.
Two LEDs light up on the PAMBoard, as shown in Figure 3-1, when the USB cable is plugged into the computer.
The top LED (D1) indicates that the ADS1x48EVM is ready to communicate with the GUI. The bottom LED (D5)
indicates that the 5-V output is active.
Figure 3-1. LED Indicators D1 and D5
Jumper JP1 selects the ADS1x48 AVDD voltage. When jumper JP1 is in the left position (see Figure 3-2), AVDD
on the ADS1x48 is set to 5 V. When the jumper JP1 is set to the right position, AVDD is set to 3.3 V.
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Figure 3-2 also shows two diodes on the ADS1x48EVM that help indicate when power is valid. The top diode
(D1) denotes that the 3.3-V output is active. The bottom diode (D2) indicates that AVDD is active after the shunt
selection on jumper JP1 is made.
The ADS1x48 devices accept a digital supply voltage (DVDD) range from 2.7 V to 5.25 V. On the ADS1x48EVM,
the ADS1x48 DVDD is a fixed value of 3.3 V. As with AVDD, this 3.3-V DVDD is sourced from the USB
power-supply voltage and is used as the PAMBoard DVDD.
Figure 3-2. Jumper (JP1) Selects AVDD on the ADS1x48EVM
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3.2 Voltage Reference Options
The ADS1x48 is a highly flexible ADC that can accept multiple voltage reference (VREF) options. First, the
ADS1x48 integrates a low-noise, 2.048-V reference to help reduce overall component count. Moreover, this
internal VREF voltage is supplied externally via the ADS1x48 REFOUT pin and is available on terminal block J5.
The ADS1x48 also has two sets of differential VREF inputs defined as REFP0, REFN0 and REFP1, REFN1. All
of these options are selected via the MUX1 register in the ADS1x48.
The ADS1x48EVM supports four different VREF options to offer maximum flexibility. Table 3-1 details these four
options. Figure 3-3 shows the location of each VREF option (highlighted in yellow) as well as each VREF test
point (highlighted in red).
Table 3-1. Summary of ADS1x48EVM VREF Options
VREF Mode VREF Input
Channel Voltage Location Test Point Comment
Internal — 2.048 V U3 Output on J5
(REFOUT) —
External
REF5025 REFP0, REFN0 2.5 V U2 Output on J5
(REF5025) —
Ratiometric REFP1, REFN1 Variable R11 REFP1, REFN1 Used for RTD
measurements
User-provided REFP1, REFN1 Variable J6 (REFP1,
REFN1) REFP1, REFN1 Remove R11
Figure 3-3. ADS1x48EVM VREF Options (Yellow) and Test Points (Red)
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3.3 Clock Options
The ADS1x48 integrates a 4.096-MHz clock oscillator to provide the clock signal to the ADC. Additionally, the
ADS1x48 offers an external CLK input pin if an external clock signal is required. Choose between these flexible
clock options using the JP2 header on the ADS1x48EVM.
Enable the internal oscillator by connecting the shunt to the JP2-3 pin on the JP2 header. This pin is marked
GND on the ADS1x48EVM silkscreen. Enable an external clock by connecting the shunt to the JP2-1 pin on
the JP2 header. This pin is marked EXT_CLK on the ADS1x48EVM silkscreen. When the external clock option
is chosen, provide the external clock signal via the J4-40 pin on the J4 header. This pin and jumper JP2 are
highlighted in Figure 3-4.
Figure 3-4. ADC Clock Options on the ADS1x48EVM
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3.4 Digital Interface
The ADS1x48 devices support the digital SPI and functional modes as detailed in the 24-bit ADS1248 data
sheet or the 16-bit ADS1148 data sheet. As stated in Section 3.1, the PAMBoard operates at a 3.3-V logic level
provided by the host computer and the ADS1x48EVM board uses this same 3.3-V logic level for DVDD.
Digital interface connections from the ADS1x48EVM to the PAMBoard include power, I2C, SPI, and a GPIO
connection used to trigger an interrupt at the end of conversion that signifies new data are available. The digital
connections are highlighted in the silkscreen shown in Figure 3-5 and are described in detail in Table 3-2. Use
these connection points for troubleshooting the SPI communication with a logic analyzer or to attach an external
MCU to control the ADS1x48EVM without the PAMBoard.
Figure 3-5. ADS1x48EVM-to-PAMBoard Connections
Table 3-2. ADS1x48EVM Header Pinout and Description
Description Connector Connector Description Description Connector Connector Connector
3.3 V
J1:1 J3:21 5 V J4:40 J2:20
GND
J1:2 J3:22 GND J4:39 J2:19
J1:3 J3:23 J4:38 J2:18
J1:4 J3:24 RESET J4:37 J2:17
J1:5 J3:25 J4:36 J2:16
J1:6 J3:26 J4:35 J2:15 DIN
SPI SCLK J1:7 J3:27 J4:34 J2:14 DOUT/DRDY
J1:8 J3:28 START J4:33 J2:13
I2C SCL J1:9 J3:29 J4:32 J2:12 SPI CS
I2C SDA J1:10 J3:30 DRDY J4:31 J2:11 SPI CS
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3.5 Analog Input Connections
The ADS1x48EVM is designed for easy interface to external temperature sensors using the two screw terminal
blocks (J5 and J6). Connector J5 provides connections for thermocouples and thermistors as well as the 2.048-V
output voltage from the ADS1x48 integrated reference and the dedicated 2.5-V output from the REF5025.
Connector J6 includes a pair of differential reference inputs for connecting an external voltage reference source
to the ADC as well as three dedicated terminals for connecting a 2-, 3-, or 4-wire RTD. Table 3-3 summarizes
the channel input connections for J5 and J6. Both connectors are clearly labeled on the PCB silkscreen for easy
input connection identification. Figure 3-6 shows the input layout.
Table 3-3. ADS1x48EVM Terminal Block Input Description (J5 and J6)
Terminal Block Input Label Description
J5:1 TC+ Positive thermocouple, general-purpose input
J5:2 TC– Negative thermocouple, general-purpose input
J5:3 REF5025 2.5-V output from REF5025
J5:4 REFOUT 2.048-V output from ADS1x48 integrated VREF
J5:5 NTC+ Positive thermistor input
J5:6 NTC– Negative thermistor input
J6:1 REFP1 Positive external VREF input to ADC
J6:2 REFN1 Negative external VREF input to ADC
J6:3 RTD_A RTD connection point A
J6:4 RTD_B RTD connection point B
J6:5 RTD_C RTD connection point C
J6:6 GND Analog ground
Figure 3-6. ADS1x48EVM Analog Input Terminal Blocks (J5, Left; J6, Right)
The following sections describe how to connect each different analog temperature sensor to its respective
connector, beginning with terminal block J5.
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3.5.1 Connecting a Thermocouple to J5 on the ADS1x48EVM
Connect an external thermocouple directly to the J5:1 and J5:2 inputs on the J5 terminal block, which represent
the TC+ and TC– nets, respectively. The differential filter for this differential input pair has a cutoff frequency of
1.93 kHz. Additionally, each input has a common-mode filter with a cutoff frequency of 38.63 kHz. TC+ and TC–
are connected through the filter resistors to two analog inputs (AIN4 and AIN5, respectively) on the ADS1x48.
Figure 3-7 shows the portion of the ADS1x48EVM schematic with J5 and the thermocouple input structure.
10.0M
R24
DNP
AVDD
10.0M
R23
DNP
4.12k
R16
4.12k
R13
0.01uF
C10
1000pF
C3
1000pF
C4
1
2
3
4
5
6
J5
REFOUT
REF5025
TC+
TC-
NTC+
NTC-
TC+
TC-
AIN4
AIN5
GND
GND
Figure 3-7. Thermocouple Input Structure on the ADS1x48EVM
Although thermocouples are self-powered, these components must be biased in order to avoid floating beyond
the input range of the PGA integrated into the ADC. The ADS1x48EVM offers multiple ways to bias the
thermocouple so that the output voltage can be successfully read by the ADC.
The first method uses pullup and pulldown resistors, which are labeled in Figure 3-7 as R24 and R23,
respectively. These resistors are do not place (DNP) and therefore do not come installed on the EVM. To use
the pullup and pulldown resistor method, install 1-MΩ to 10-MΩ resistors in the aforementioned locations. With
these resistors installed, the thermocouple output voltage is centered at AVDD / 2, which puts the output voltage
in the middle of the common-mode range of the PGA integrated into the ADS1x48. Additionally, using pullup and
pulldown resistors enables continuous sensor break detection. If one of the thermocouple wires breaks, AIN4
is pulled to AVDD and AIN5 is pulled to GND, resulting in a full-scale input that can be detected in a separate
firmware routine.
The second thermocouple-biasing method supported by the ADS1x48EVM uses one of the two reference
voltage output pins to bias TC–. For example, Figure 3-8 shows that connecting an external jumper between the
TC– input (J5:2) and the REF5025 output (J5:3) biases the thermocouple voltage to 2.5 V.
REFOUT
REF5025
TC+
TC±
Thermocouple
External
Jumper
AIN4
AIN5
+2.5 V
+2.048 V
Figure 3-8. Using REF5025 (input J5:3) to Bias a Thermocouple
If AVDD = 5 V in the configuration shown in Figure 3-8, the thermocouple output voltage is now centered in the
middle of common-mode range of the PGA integrated in the ADS1x48. If AVDD is instead chosen to be 3.3 V,
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connect the external jumper between the REFOUT pin (J5:4) and the TC– input to bias the thermocouple output
voltage to 2.048 V. Although this voltage is not equal to AVDD / 2 = 1.65 V, connecting TC– to REFOUT when
AVDD = 3.3 V enables a wider PGA common-mode voltage swing compared to using the REF5025 output. An
external bias voltage can also be directly connected to TC–.
One challenge with the biasing scheme in Figure 3-8 is that this configuration does not offer continuous wire-
break detection. Instead, a separate diagnostic measurement can be made, or the pullup resistor (R24) in Figure
3-7 can be populated to help perform this function. To learn more about different thermocouple biasing schemes
as well as how to measure these sensors with precision ADCs, see the A Basic Guide to Thermocouple
Measurements application report. This document also discusses the need for cold junction compensation
(CJC), which is used in conjunction with the thermocouple voltage to derive the measured temperature. The
ADS1x48EVM includes provisions for a CJC measurement using a thermistor, which is discussed in more detail
in the next section.
The steps for setting up a thermocouple measurement with the ADS1x48EVM are summarized below:
1. Connect the sensor to the TC± terminals on J5
2. Select a biasing scheme:
a. For pullup and pulldown resistor biasing, populate R24 and R23, respectively
b. For constant voltage biasing:
i. Connect an external jumper between TC– and REF5025 or REFOUT
ii. Apply an external voltage to TC–
3. Choose the ADC measurement channels to be MUX_SP[2:0] = AIN4 and MUX_SN[2:0] = AIN5
4. Select the ADC reference source (REF5025, internal VREF, or external VREF)
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3.5.2 Connecting a Thermistor to J5 on the ADS1x48EVM
Unlike a thermocouple, thermistors are not self-powered and require a constant voltage or current source to
operate. Typically, constant voltage is preferred because the thermistor impedance can vary from hundreds of
ohms at low temperature to hundreds of thousands of ohms at high temperature (or vice versa for a thermistor
with a negative temperature coefficient). A resistor is then added in series with the thermistor to create a resistor
divider that can be measured by an ADC.
Connect an external thermistor directly to the J5:5 and J5:6 pins on the J5 terminal block, which represent the
NTC+ and NTC– nets, respectively. The differential filter for this differential input pair has a cutoff frequency
of 1.93 kHz. Additionally, each input has a common-mode filter with a cutoff frequency of 38.63 kHz. NTC+
and NTC– are connected through the filter resistors to two analog inputs (AIN6 and AIN7, respectively) on
the ADS1x48. Figure 3-9 shows the portion of the ADS1x48EVM schematic with J5 and the thermistor input
structure.
0.01uF
C12
1000pF
C7
1000pF
C8
4.12k
R21
4.12k
R22
1
2
3
4
5
6
J5
10.0k
R17
REFOUT
REF5025
NTC+
NTC-
NTC+
NTC-
TC+
TC-
AIN6
AIN7
10.0k
R14
DNP
GND
GND
10k
t°
RT1DNP
Figure 3-9. Thermistor Input Structure on the ADS1x48EVM
Figure 3-9 shows two DNP components: a thermistor (RT1) and a 10-kΩ linearization resistor (R14). RT1 can
be used for CJC for thermocouple measurements (see Section 3.5.2.1). R14 helps linearize the thermistor
output voltage over a smaller temperature range. See section 2.8.2 in the A Basic Guide to Thermocouple
Measurements application report to learn more about the benefits of using a linearization resistor when
measuring a thermistor. Finally, resistor R17 in Figure 3-9 is the bias resistor used in conjunction with the
external resistor to form a resistor divider. Resistor R17 is chosen to be 10 kΩ because 10 kΩ is a commonly-
used nominal thermistor impedance. Choosing both resistors to have the same nominal impedance balances the
resistor divider at 25°C.
As stated earlier in this section, thermistors are not self-powered and require a bias source to operate. As Figure
3-10 shows, connect the constant voltage output from REFOUT to NTC+ via an external jumper to bias the
sensor. Alternatively, NTC+ can be connected to the REF5025 output instead. In either case, ensure that the
reference output used to bias the resistor divider is the same reference selected for the ADC measurements.
External
Jumper
R17
NTC±
NTC+
REF5025
REFOUT
NTC
AIN6
AIN7
+2.5 V
+2.048 V
Figure 3-10. Connecting a Thermistor to the J5 Terminal Block on the ADS1x48EVM
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The steps for setting up a thermistor measurement with the ADS1x48EVM are summarized below:
1. Connect the sensor to the NTC± terminals on J5
2. Connect an external jumper between NTC+ and REF5025 or REFOUT
3. Populate R14 with a 10-kΩ resistor if necessary
4. Choose the ADC measurement channels to be MUX_SP[2:0] = AIN6 and MUX_SN[2:0] = AIN7
5. Select the ADC reference source to be the same constant voltage output from step #2
3.5.2.1 Using Thermistor RT1 for Thermocouple Cold Junction Compensation
The ADS1x48EVM board includes provisions for using a PCB-mounted thermistor to measure the cold junction
of a thermocouple connected to the TC+ and TC– inputs on J5. As Figure 3-11 shows, top- and bottom-layer
copper pours create an isothermal bridge between the NTC± and TC± inputs. This bridge helps ensure that
thermistor RT1 measures the same temperature as the thermocouple cold junction at inputs J5:1 and J5:2,
enabling a more accurate thermocouple measurement.
Figure 3-11. PCB Layout for J5 Terminal Block Showing Copper Pours for CJC Measurement
As discussed in Section 3.5.2 and in Figure 3-9, thermistor RT1 is not populated by default on the
ADS1x48EVM. Choose a 10-kΩ NTC thermistor in a 0603 package for this component. To measure the
thermistor voltage, follow the steps outlined at the end of Section 3.5.2, noting that step #1 (connect the
sensor) is satisfied by soldering the thermistor (RT1) to the PCB. Also, the ADS1x48 is a multiplexed ADC
and therefore can only measure one single-ended or differential input per conversion cycle. As a result, the
thermocouple and CJC measurements must be taken separately and then manipulated in software to determine
the resulting temperature. To learn more about CJC as well as how to use this value to determine the true
measured temperature, see the A Basic Guide to Thermocouple Measurements application report.
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3.5.3 Connecting an RTD to J6 on the ADS1x48EVM
The RTD input connections on J6 are J6:3, J6:4, and J6:5, which correspond to the RTD_A, RTD_B, and
RTD_C nets, respectively. Additionally, terminal block J6 provides a pair of differential reference inputs, REFP1
and REFN1, which correspond to inputs J6:1 and J6:2, respectively. The RTD_A, RTD_B and REFP1, REFN1
input pairs have a differential filter with a cutoff frequency of 1.93 kHz. Additionally, each of these inputs has
a common-mode filter with a cutoff frequency of 38.63 kHz. Figure 3-12 shows the RTD input structure on the
ADS1x48EVM, and Table 3-4 describes the mapping between the terminal block connections, schematic net
names, and the analog pins on the ADS1x48. Some nets may connect to multiple analog pins on the ADS1x48.
REFP1
REFN1
REFP1
REFN1
4.12k
R20
4.12k
R28
0.01uF
C18
1000pF
C21
1000pF
C11
AIN3
AIN2
680
R18 IEXC2
RTD_A
RTD_B
RTD_A
RTD_B
680
R29 IEXC1
RTD_C
AIN1
AIN0
RTD_C
0.01uF
C5
1000pF
C2
1000pF
C6
4.12k
R10
4.12k
R12
4.02k
R11
GND
GND
GND
1
2
3
4
5
6
J6
GND
GND
JP3
JP4
JP5
JP6
Figure 3-12. RTD Input Structure on the ADS1x48EVM
Table 3-4. ADS1x48EVM Terminal Block (J6) to ADC Connections
Connector Net Name ADS1x48 Input Connection Description
J6:1 REFP1 REFP1 External reference input (positive)
AIN1 Analog input 1
J6:2 REFN1 REFN1 External reference input (negative)
AIN0 Analog input 0
J6:3 RTD_A AIN2 Analog input 2
IEXC2 Excitation current source #2
J6:4 RTD_B AIN3 Analog input 3
IEXC1 Excitation current source #1
J6:5 RTD_C IEXC1 Excitation current source #1
J6:6 GND n/a Analog ground
In Figure 3-12, resistor R11 is the reference resistor (RREF) that is placed in series with the RTD and connected
to the ADS1x48 external reference inputs, as described in Table 3-4. An excitation current supplied by one of
the two IDACs integrated into the ADS1x48 flows through RREF and the RTD, creating a ratiometric relationship
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between the analog input and reference voltages. As a result, the absolute IDAC accuracy is less critical and
the system performance improves. However, choose the IDAC current magnitude and the total circuit impedance
to ensure that the ADC IDAC compliance voltage is met. For additional information regarding ratiometric
references, RTD measurement circuits using precision ADCs, and important specifications including compliance
voltage, see the A Basic Guide to RTD Measurements application report.
R11 is chosen to be 4.02 kΩ in order to accommodate high-impedance RTDs at high temperature ranges. For
example, a Pt1000 at 850°C has a typical impedance of approximately 3.9 kΩ. If a smaller measurement range
is required, replace R11 with a different resistor in an 0805 package or remove R11 and use an external resistor
connected between REFP1 and REFN1 on J6. Choose a high accuracy, low-drift resistor to ensure best system
performance.
All common RTD configurations can be measured with the ADS1x48EVM, including:
•2-wire RTD using a low-side RREF
•2-wire RTD using a high-side RREF
•3-wire RTD using one IDAC and a low-side RREF
•3-wire RTD using one IDAC and a high-side RREF
•3-wire RTD using two IDACs and a low-side RREF
•3-wire RTD using two IDACs and a high-side RREF
•4-wire RTD using a low-side RREF
•4-wire RTD using a high-side RREF
The ADS1x48EVM accomplishes maximum flexibility using jumpers JP3, JP4, JP5, and JP6 (see Figure 3-12)
in conjunction with different analog inputs and IDAC routing. The following subsections detail the appropriate
connections and settings to enable each RTD configuration using the ADS1x48EVM. Each subsection contains
a connection diagram where the red lines indicate how current flows in the circuit. Moreover, the red text
indicates which jumpers are populated and which current sources are biasing the RTD, and the blue text
indicates the measurement channels. This information is summarized in Section 3.5.3.9.
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3.5.3.1 Connecting a 2-Wire RTD Using a Low-Side RREF to J6 on the ADS1x48EVM
Figure 3-13 shows how to connect a 2-wire RTD using a low-side RREF configuration to J6.
AIN1
REFP1
REFN1
AIN0
REFP1
REFN1
RTD
RTD_A
RTD_B
RTD_C
IEXC1
AIN3
AIN2
JP3
JP4
JP5
IEXC2IEXC2
IDAC
JP6
Figure 3-13. Connection Diagram for a 2-Wire RTD Using a Low-Side RREF
Figure 3-13 also shows that for this RTD configuration, the RTD is connected to REFP1 and RTD_B.
Additionally, jumpers JP3 and JP4 are connected whereas jumpers JP5 and JP6 are disconnected. Finally, the
IEXC1 current source is enabled and the measurement is taken between AIN3 and AIN1. Table 3-5 summarizes
the necessary connections and ADC configuration settings.
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3.5.3.2 Connecting a 2-Wire RTD Using a High-Side RREF to J6 on the ADS1x48EVM
Figure 3-14 shows how to connect a 2-wire RTD using a high-side RREF configuration to J6.
REFP1
REFN1
AIN0
REFP1
REFN1
RTD
RTD_A
RTD_B
RTD_C
IEXC1
AIN3
AIN2
JP3
JP4
JP5
IEXC2IEXC2
AIN1
IDAC
JP6
Figure 3-14. Connection Diagram for a 2-Wire RTD Using a High-Side RREF
Figure 3-14 also shows that for this RTD configuration, the RTD is connected to REFN1 and RTD_B.
Additionally, jumpers JP4, JP5, and JP6 are connected whereas jumper JP3 is disconnected. Finally, the AIN1
pin on the ADS1x48 is configured to be a current source and the measurement is taken between AIN0 and AIN3.
Table 3-5 summarizes the necessary connections and ADC configuration settings.
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