Texas Instruments ADS8353EVM-PDK User manual

User's Guide
SBAU210A–June 2014–Revised August 2014
ADS8353EVM-PDK and ADS7853EVM-PDK
ADS8353EVM-PDK and ADS7853EVM-PDK
This user's guide describes the characteristics, operation and use of the ADS8353EVM and
ADS7853EVM performance demonstration kits (PDKs). These kits are evaluation platforms for the
ADS8353 and ADS7853, dual-channel, 16-bit and 14-bit, simultaneous sampling, successive
approximation register (SAR) analog-to-digital converters (ADCs) that support single-ended and pseudo-
differential analog inputs. These EVMs ease the evaluation of the ADS8353 and ADS7853 devices with
hardware and software for computer connectivity through universal serial bus (USB). This user's guide
includes a complete circuit descriptions, schematic diagrams, and bill of materials.
Throughout this document, the terms ADSxx53EVM-PDK, demonstration kit, evaluation board, evaluation
module are synonyms with the ADS8353EVM-PDK and ADS7853EVM-PDK.
The following related documents are available through the Texas Instruments web site at
http://www.ti.com.
Related Documentation
Device Literature Number
ADS8353 SBAS584
ADS7853 SBAS584
REF5025 SBOS410
OPA2350 SBOS099
OPA376 SBOS406
OPA836,OPA2836 SLOS712
TPS3836E18 SLVS292
TPS7A4700 SBVS204
REG71055 SBAS221
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Contents
1 Overview...................................................................................................................... 4
1.1 ADSxx53EVM Features............................................................................................ 4
1.2 ADSxx53EVM-PDK Features ..................................................................................... 4
2 EVM Analog Interface....................................................................................................... 4
2.1 Analog Input Range Settings...................................................................................... 6
2.2 Single-Ended or Pseudo-Differential Input Configuration ..................................................... 6
2.3 Bipolar Input-Signal Configuration................................................................................ 6
2.4 Unipolar Input-Signal Configuration .............................................................................. 7
2.5 ADSxx53EVM Onboard Reference and ADSxx53 Device Internal Reference ............................. 7
3 Digital Interface .............................................................................................................. 9
3.1 Serial Interface (SPI) ............................................................................................... 9
3.2 I2C Bus for Onboard EEPROM.................................................................................... 9
4 Power Supplies............................................................................................................. 10
5 ADSxx53EVM-PDK Initial Setup ......................................................................................... 11
5.1 Default Jumper Settings.......................................................................................... 11
5.2 Software Installation .............................................................................................. 12
6 ADSxx53EVM-PDK Kit Operation........................................................................................ 18
6.1 About the Simple Capture Card Controller Board............................................................. 18
6.2 Loading the ADSxx53EVM-PDK Software..................................................................... 18
6.3 ADSxx53EVM Settings ........................................................................................... 19
6.4 Device Registers .................................................................................................. 22
6.5 Capturing Data with the ADSxx53EVM-PDK.................................................................. 22
6.6 FFT Analysis ...................................................................................................... 25
6.7 Histogram Analysis................................................................................................ 27
6.8 Troubleshooting ................................................................................................... 27
7 Bill of Materials, PCB Layout, and Schematics......................................................................... 29
7.1 Bill of Materials .................................................................................................... 29
7.2 PCB Layout ........................................................................................................ 31
7.3 Schematics......................................................................................................... 32
List of Figures
1 ADSxx53EVM Analog Interface Input Connections .................................................................... 5
2 Single-Ended or Pseudo-Differential Input Configuration .............................................................. 6
3 Bipolar Input Signal Configuration with 2 × Vref range................................................................... 7
4 Unipolar Input Signal Configuration ....................................................................................... 7
5 REF5025 2.5-V External Reference Source and OPA2350 Reference Driver ..................................... 8
6 ADSxx53EVM Default Jumper Settings................................................................................. 11
7 Bottom View of Simple Capture Card Board with microSD Card Installed ........................................ 13
8 Bottom View of ADSxx53EVM Rev C with microSD Card Installed................................................. 13
9 Connecting the ADSxx53EVM Board to the Simple Capture Card Controller Board ............................. 14
10 LED Indicators on a Simple Capture Card Board...................................................................... 14
11 Welcome Screen and Destination Directory Screens ................................................................. 15
12 License Agreement and Start Installation Screens .................................................................... 15
13 Progress Bar and Installation Complete Screens...................................................................... 16
14 Windows 7 Driver Installation Warning.................................................................................. 16
15 Simple Capture Card Device Driver Installation........................................................................ 17
16 Simple Capture Card Device Driver Completion....................................................................... 17
17 GUI Display Prompt........................................................................................................ 18
18 Open the ADSxx53 EVM Settings Page ................................................................................ 19
19 Selecting the External Onboard Reference or the ADSxx53 Internal Dual Reference............................ 19
20 Programming the REFDAC Registers in the ADSxx53EVM.......................................................... 20
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21 Selecting 0 to Vref Range or 0 to 2 × Vref Range........................................................................ 20
22 Single-Ended or Pseudo-Differential Jumper Settings Description on the GUI.................................... 21
23 Bipolar or Unipolar Signal Jumper Settings Description on the GUI ................................................ 21
24 Device Registers Page .................................................................................................... 22
25 Open the Data Monitor Page on the GUI ............................................................................... 22
26 Data Monitor Page ......................................................................................................... 23
27 Saving Data to a Text File ................................................................................................ 24
28 FFT Performance Analysis Page......................................................................................... 25
29 Histogram Analysis......................................................................................................... 27
30 Open the GUI Settings Page ............................................................................................. 28
31 Set Capture Mode to SDCC Interface While Using the EVM Hardware............................................ 28
32 ADSxx53EVM PCB: Top Layer........................................................................................... 31
33 ADSxx53EVM PCB: Ground Layer ...................................................................................... 31
34 ADSxx53EVM PCB: Power Layer........................................................................................ 32
35 ADSxx53EVM PCB: Bottom Layer....................................................................................... 32
List of Tables
1 JP1 - JP2: Analog Interface Connections ................................................................................ 5
2 SMA Analog Interface Connections ....................................................................................... 5
3 Analog Input Range Jumpers .............................................................................................. 6
4 Connector J6 Pin Out ....................................................................................................... 9
5 Power-Supply Jumpers.................................................................................................... 10
6 Default Jumper Configuration............................................................................................. 11
7 ADSxx53EVM Bill of Materials ........................................................................................... 29
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Overview www.ti.com
1 Overview
The ADSxx53EVM-PDK is a platform for evaluation of the ADSxx53 analog-to-digital converter (ADC).
The evaluation kit combines the ADSxx53EVM board with a simple capture card controller board. The
simple capture card controller board consists of a TI Sitara embedded microcontroller (AM3352) and a
field programmable gate array (FPGA). The simple capture card board provides an interface from the
EVM to the computer through a universal serial bus (USB) port. The included software communicates with
the simple capture card controller board platform, and the simple capture card board provides the power
and digital signals used to communicate with the ADSxx53EVM board. These demonstration kits include
the ADSxx53EVM board, the simple capture card controller board, a microSD memory card, and an A-to-
micro-B USB cable.
1.1 ADSxx53EVM Features
• Contains support circuitry as a design example to match ADC performance
• 3.3-V slave serial peripheral interface (SPI™)
• Onboard 5-V analog Supply
• Onboard REF5025 (2.5-V) reference
• Voltage reference buffering with OPA2350
• Onboard OPA2836 (205-MHz BW, 1-mA quiescent current) ADC operational amplifier input drivers
1.2 ADSxx53EVM-PDK Features
• Jumper-selectable (0 to 1 × Vref range or 0 to 2 × Vref range.
• USB port for computer interfacing
• Easy-to-use evaluation software for Windows XP®, Windows 7®, Windows 8®operating systems
• Data collection to text files
• Built-in analysis tools including scope, FFT, and histogram displays
• Complete control of board settings
2 EVM Analog Interface
The ADSxx53 is a dual-channel, simultaneous-sampling ADC that supports single-ended and pseudo-
differential analog inputs. Each channel of the ADSxx53 uses a OPA2836 dual operational amplifier to
drive the inputs of the ADC. The positive input terminals of each ADC are driven by the OPA836
operational amplifier configured in the inverting configuration. The negative input terminals of each ADC
are driven by the OPA836 in the buffer configuration. The ADSxx53EVM is designed for easy interfacing
to multiple analog sources. SMA connectors allow the EVM to have input signals connected through
coaxial cables. In addition, header connectors JP1 and JP2 provide a convenient way to connect input
signals. Figure 1 illustrates the ADSxx53EVM analog interface input connections.
Windows XP, Windows 7, Windows 8, Excel are registered trademarks of Microsoft Corporation.
SPI is a trademark of Motorola Inc.
I2C is a trademark of NXP Semiconductors.
All other trademarks are the property of their respective owners.
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ADSxx53
AINM-A (Pin 2)
AINP-A (Pin 1)
AINM-B (Pin 7)
AINP-B (Pin 8)
OPA836
Inverting Configuration
SMA J1
Header JP1.2
AIN_A
AVDD
VCM
Optional voltage divider and
OPA836 Buffer
VREF
+
-
OPA836
Inverting Configuration
SMA J2
Header JP2.2
AIN_B
AVDD
VCM
Optional voltage divider and
OPA836 Buffer
VREF
+
-
JP7
JP8
www.ti.com EVM Analog Interface
Figure 1. ADSxx53EVM Analog Interface Input Connections
Table 1 summarizes the JP1 and JP2 analog interface connections.
Table 1. JP1 - JP2: Analog Interface Connections
Pin Number Signal Description
CHA inverted input. The signal is routed through an OPA836
JP1.2 AIN_A in the inverting configuration.
CHB inverted input. The signal is routed through an OPA836
JP2.2 AIN_B in the inverting configuration.
Table 2 lists the SMA analog inputs.
Table 2. SMA Analog Interface Connections
Pin Number Signal Description
Channel A inverted input. The signal is routed through an
J1 AIN_A OPA836 in the inverting configuration
Channel B inverted input. The signal is routed through an
J2 AIN_B OPA836 in the inverting configuration.
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FSR
0 V
AINP_x
AINM_x
Single-Ended Configuration
ADSxx53
FSR / 2
FSR
0 V
AINP_x
AINM_x
Pseudo-Differential Configuration
ADSxx53
FSR / 2
JP7/JP8:
Shunt 1-2 JP7/JP8:
Shunt 2-3
EVM Analog Interface www.ti.com
2.1 Analog Input Range Settings
The full-scale range (FSR) of the ADSxx53 device can be programmed to either from (0 to 1 × Vref) or (0 to
2 × Vref) range by setting bit B9 of the ADSxx53 configuration register. This register is common to both
ADCs in the device (ADC_A and ADC_B). Configure the full-scale range setting in the EVM by navigating
to the ADSxx53EVM Settings page on the grpahical user interface (GUI); see section Section 6.3 for more
information. Install jumpers JP3 and JP4 when supporting the 0 to 1 × Vref range, and remove jumpers JP3
and JP4 when supporting the 0 to 2 x Vref range, as shown in Table 3.
Table 3. Analog Input Range Jumpers
Jumper Number Default Position Description
JP3 Installed Install for FSR = 0 to 1 × Vref; remove for FSR = 0 to 2 × Vref.
JP4 Installed Install for FSR = 0 to 1 × Vref; remove for FSR = 0 to 2 × Vref.
2.2 Single-Ended or Pseudo-Differential Input Configuration
The ADSxx53 dual, simultaneous ADC supports single-ended or pseudo-differential analog input signals.
To support single-ended inputs, set bit B7 in the configuration (CFR) register to 0 (CFR.B7 = 0), and
connect ADC inputs AINM_A and AINM_B to GND. These devices can also be programmed to support
pseudo-differential inputs by setting bit B7 in the CFR register to 1 (CFR.B7 = 1). In this configuration,
AINM_A is connected to FSR_ADC_A / 2, and AINM_B is connected to FSR_ADC_B / 2. Note that bit
CFR.B7 is common to both ADCs. By configuring jumpers JP7 and JP8 on the ADSxx53EVM, the
negative inputs of the ADC can be connected to GND to support the single-ended configuration, or
connected to FSR/2 when programmed to support pseudo-differential inputs, as shown in Figure 2. See
Section 6.3 for more information.
Figure 2. Single-Ended or Pseudo-Differential Input Configuration
2.3 Bipolar Input-Signal Configuration
The ADSxx53EVM-PDK supports both bipolar or unipolar input signals on the J1 (JP1.2) and J2 (JP2.2)
analog interface connectors. When jumpers JP9 and JP10 are closed, the inverting amplifier (OPA836) is
biased at the appropiate common-mode voltage level to support bipolar signals on the analog interface
connectors. In this configuration, apply a bipolar input signal with 0-V common-mode voltage.
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AINP
AINN
8200 pF
10 
10 
+
-
1 k
OPA836
+2.5 V
0.2 V
+4.8 V 1 k
2.5 V 5 V
J1/J2
JP9/JP10 (OPEN)
0.2 V
4.8 V
2.5 V
Unipolar Input Signal
GND or
FSR/2
AINP
AINN
8200 pF
10 
10 
+
-
1 k
OPA836
+1.25 V
-2.3 V
+2.3 V 1 k
0 V 5 V
J1/J2
JP9/JP10 (CLOSED)
0.2 V
4.8 V
2.5 V
GND or
FSR/2
Bipolar Input Signal
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Figure 3 shows an example where the ADSxx53EVM is configured to support a bipolar input signal with 2
× Vref range at the J1 (JP1.2) and J2 (JP2.2) analog interface connectors.
Figure 3. Bipolar Input Signal Configuration with 2 × Vref range
2.4 Unipolar Input-Signal Configuration
When jumpers JP9 and JP10 are open, the inverting amplifier (OPA836) is biased at the appropiate
common-mode voltage level to support unipolar signals on the analog interface connectors. In this
configuration, apply a unipolar input signal with FSR / 2 common-mode voltage. Figure 4 shows an
example where the ADSxx53EVM is configured to support a unipolar input signal with 2 × Vref range at the
J1 (JP1.2) and J2 (JP2.2) analog interface connectors.
Figure 4. Unipolar Input Signal Configuration
2.5 ADSxx53EVM Onboard Reference and ADSxx53 Device Internal Reference
The ADSxx53 dual, simultaneous ADC operates with reference voltages VREF_A and VREF_B present
on pins REFIO_A and REFIO_B, respectively. The ADSxx53 device incorporates two internal individually-
programmable 2.5-V reference sources. Alternatively, the onboard 2.5-V reference, REF5025 (U5), can
also be selected. The reference voltage source is determined by setting bit B6 of the ADC configuration
register. Note that this bit is common to ADC_A and ADC_B. Configure the reference settings on the
ADSxx53EVM-PDK by navigating to the ADSxx53EVM Settings page on the GUI; see Section 6.3 for
more information. By default, the evaluation module is set up with the onboard external reference source,
with jumpers JP5 and JP6 installed, as shown in Figure 5. If the ADSxx53 must be configured with the
internal reference, make sure to remove jumpers JP5 and JP6 before enabling the internal reference.
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5V 0.22
+
-
+
1k
1µF
OPA2350
A/B
10µF
JP5/JP6
2.5V from
REF5025
REFIO-A/
REFIO-B
0.22
10µF
EVM Analog Interface www.ti.com
Figure 5. REF5025 2.5-V External Reference Source and OPA2350 Reference Driver
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www.ti.com Digital Interface
3 Digital Interface
Socket strip connector J6 provides the digital I/O connections between the ADSxx53EVM board and the
simple capture card board.
Table 4 summarizes the pin-outs for connector J6.
Table 4. Connector J6 Pin Out
Pin Number Signal Description
J6.2, J6.10, J6.15, J6.16, GND Ground connections
J6.18
J6.4 EVM PRESENT EVM present signal, active low
I2C bus; used only used to program the U7
J6.11, J6.12 I2C™ bus EEPROM on the EVM board
3.3V digital supply from the simple capture card
J6.13 DVDD controller board
J6.34 CS Chip select, active low
J6.36 SCLK Serial interface clock
J6.38 SDI Serial data input
J6.40 SDO_A Serial data output for channel A
J6.42 SDO_B Serial data output for channel B
3.1 Serial Interface (SPI)
The ADSxx53 digital output is available in SPI-compatible format, which makes interfacing with
microprocessors, digital signal processors (DSPs), and FPGAs easy. The ADSxx53EVM offers 47-Ω
resistors between the SPI signals and connector J6 to aid with signal integrity. Typically, in high-speed
SPI communication, fast signal edges can cause overshoot; these 47-Ωresistors slow down the signal
edges in order to minimize signal overshoot.
3.2 I2C Bus for Onboard EEPROM
The ADSxx53EVM has an I2C bus to communicate with the onboard EEPROM that records the board
name and assembly date. It is not used in any form by the ADSxx53 converter.
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Power Supplies www.ti.com
4 Power Supplies
The analog portion of the ADSxx53EVM-PDK requires a 5-V supply. The ADSxx53EVM-PDK is configured
at the factory using the onboard regulated analog 5-V supply (+VA); and an onboard 3.3-V digital supply.
Alternatively, set the AVDD analog supply voltage by connecting an external power source through two-
terminal connector (J5). Table 5 lists the configuration details for P3.
Table 5. Power-Supply Jumpers
Pin Number Pin Name Function
JP12 Shunt 2-3 (default) Onboard 5-V AVDD analog supply selected
Shunt 1-2 External 5-V AVDD connected through two-terminal
block J5
JP11 Open Onboard regulated AVDD supply set to 5.0 V
Closed Onboard regulated AVDD supply set to 5.2 V
CAUTION
The external AVDD supply applied to external two-terminal connector J5 must
not exceed 5.5 V or device damage may occur. The external AVDD supply
must be in the range of 5.0 V to 5.5 V for proper ADSxx53EVM operation.
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5 ADSxx53EVM-PDK Initial Setup
This section presents the steps required to set up the ADSxx53EVM-PDK kit before operation.
5.1 Default Jumper Settings
Figure 6 shows the silkscreen plot detailing the default jumper settings. Table 6 descibes the configuration
for these jumpers.
Figure 6. ADSxx53EVM Default Jumper Settings
Table 6. Default Jumper Configuration
Pin Number Default Position Switch Description
JP1 Open JP1.2 Header connector to inverted AINP-A input
JP2 Open JP2.2 Header connector to inverted AINP-B input
JP3 Closed Closed when configured in 0 to 1 × Vref range; open to support 0 to 2 × Vref range
JP4 Closed Closed when configured in 0 to 1 × Vref range; open to support 0 to 2 × Vref range
Closed to connect onboard 2.5-V reference to REFIO_A; open when using ADSxx53
JP5 Closed internal reference.
Closed to connect onboard 2.5-V reference to REFIO_B; open when using ADSxx53
JP6 Closed internal reference.
JP7 Shunt 1-2 Shunt 1-2 connects AINM-A(–) to GND; shunt 2-3 connects AINM-A(–) to FSR / 2.
JP8 Shunt 1-2 Shunt 1-2 connects AINM-B(–) to GND; shunt 2-3 connects AINM-B(–) to FSR / 2 .
JP9 Closed Open for channel A unipolar input signals at SMA connector; installed for channel A
bipolar input signals at SMA connector
JP10 Closed Open for channel B unipolar input signals at SMA connector; installed for channel B
bipolar input signals at SMA connector
JP11 Open Open: onboard AVDD set to +5 V; closed: onboard AVDD set to +5.2 V
Shunt 2-3 selects onboard regulated AVDD supply; shunt 1-2 selects external AVDD
JP12 Shunt 2-3 through J5
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ADSxx53EVM-PDK Initial Setup www.ti.com
5.2 Software Installation
This section presents the steps required to the install the software. Section 6 explains how to operate the
software to acquire data.
NOTE: The ADSxx53EVM-PDK with ADSxx53 PWB Board revision A includes (1) microSD card.
Ensure the microSD memory card included in the kit is installed in the microSD socket on the
back of the simple capture card board before connecting the EVM to the PC. Otherwise, as a
result of improper boot up, Windows cannot recognize the ADSxx53EVM-PDK as a
connected device.
The ADSxx53EVM-PDK with ADSxx53 PWB Board revision C includes (2) microSD cards.
Ensure both microSD memory cards that contain the software are installed in the microSD
sockets on the back of the simple capture card board and on the back of ADSxx53EVM
board respectively. Otherwise, as a result of improper boot up, Windows cannot recognize
the ADSxx53EVM-PDK as a connected device.
Complete the following steps to install the software:
Step 1. Verify the microSD memory card(s) are installed:
• ADSxx53EVM PWB revision A: This PDK kit version includes (1) microSD Card. Verify
the microSD memory card is installed on the simple capture card controller board.
• ADSxx53EVM PWB revision C: This PDK kit version includes (2) microSD Cards. Ensure
both microSD memory cards are installed in the microSD sockets on the back of the
simple capture card board and ADSxx53EVM board respectively.
Step 2. Verify jumpers are in the factory-default position and connect the hardware
Step 3. Install the ADSxx53EVM-PDK software.
Step 4. Complete the simple capture card device driver installation.
Each task is described in the following subsections.
5.2.1 Verify the microSD Memory Card is Installed on the Simple Capture Card Controller Board
The ADSxx53EVM-PDK includes the micro SD card(s) that contain the EVM software and simple capture
card controller board firmware required for the EVM operation.
NOTE: Ensure the microSD memory card is installed in the microSD socket (P6) on the back of the
simple capture card board.
Figure 7 illustrates the bottom view of the simple capture card controller board with the
microSD card installed.
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Figure 7. Bottom View of Simple Capture Card Board with microSD Card Installed
NOTE: ADSxx53EVM-PDK with ADSxx53EVM PWB Board revision C (only): This
ADSxx53EVM PWB version includes (2) microSD cards. Ensure both microSD memory
cards are installed in the microSD sockets on the back of the simple capture card board and
on the back of ADSxx53EVM, as shown on Figure 7 and Figure 8 respectively.
Figure 8. Bottom View of ADSxx53EVM Rev C with microSD Card Installed
The microSD card(s) is formatted from the factory with the necessary firmware files for the simple capture
card controller board to boot properly. In addition to the simple capture card firmware files ('app' and 'MLO'
files), the microSD card(s) contain the ADSxx53EVM-PDK software installation files inside the ADS835x
EVM V#.#.# folder. <V#.#.#> refers to the installation software version number, and increments with
software installer releases.
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ADSxx53EVM-PDK Initial Setup www.ti.com
5.2.2 Verify Jumpers are in the Factory-Default Position and Connect the Hardware
The ADSxx53EVM-PDK includes both the ADSxx53EVM and the simple capture card controller board;
however, the devices are shipped unconnected. Follow these steps to verify that ADSxx53EVM-PDK kit is
configured and connected properly.
Step 1. Verify the microSD card is installed on the back of the simple capture card board; see
Figure 7.
Step 2. Verify the ADSxx53EVM jumpers are configured; see Figure 6.
Step 3. Connect the ADSxx53EVM board to the simple capture card controller board as Figure 9
shows.
Figure 9. Connecting the ADSxx53EVM Board to the Simple Capture Card Controller Board
Step 4. Connect the simple capture card controller board to the PC through the micro USB cable.
Step 5. Verify that LED D5 Power Good indicator is illuminated. Wait approximately ten seconds and
verify that diode D2 blinks, indicating that USB communication with the host PC is functioning
properly. Figure 10 shows the location of the LED indicators in the simple capture card
controller board.
Figure 10. LED Indicators on a Simple Capture Card Board
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5.2.3 Install the ADSxx53EVM-PDK software
The ADS835x EVM V#.#.# software needs to be installed on the PC. This software supports the
ADSxx53EVM-PDK. The user must have Administrator privileges on the PC to be able to install the EVM
software. The following steps list the directions to install the software.
1. Open Windows explorer and find the microSD memory card in the browser as a storage device.
2. Navigate to the ...\ADS835x EVM Vx.x.x\Volume\ folder.
3. Run the installer by right-clicking the setup.exe and selecting Run as Administrator. This action installs
the EVM GUI software and the required simple capture card device driver components.
4. After the installer begins, a welcome screen displays. Click Next to continue.
5. A prompt appears with the destination directory; select the default directory under: ...\Program
Files(x86)\Texas Instruments\ads835xevm\, as shown in Figure 11.
Figure 11. Welcome Screen and Destination Directory Screens
6. One or more software license agreements appear. Select I Accept the License Agreement and click
Next.
7. The Start Installation screen appears. Click Next, as shown in Figure 12.
Figure 12. License Agreement and Start Installation Screens
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ADSxx53EVM-PDK Initial Setup www.ti.com
8. A progress bar appears; this step takes a few minutes.
9. The progress bar is followed by an installation complete notice, as shown in Figure 13.
Figure 13. Progress Bar and Installation Complete Screens
5.2.4 Simple Capture Card Device Driver Installation
During installation of the simple capture card device driver, a prompt may appear with the Windows
security message shown in Figure 14. Select Install this driver software anyway to install the driver
required for proper operation of the software. The drivers contained within the installers are safe for
installation to your system.
Figure 14. Windows 7 Driver Installation Warning
NOTE: Driver installation prompts do not appear if the simple capture card device driver has been
installed on your system previously.
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Follow these procedures to install the simple capture card device driver, if prompted.
Step 1. Immediately after the ADS835x EVM software installation is complete, prompts appear to
install the simple capture card device driver, as shown in Figure 15 and Figure 16
Step 2. A computer restart may be required to finish the software installation. If prompted, restart the
PC to complete the installation.
Figure 15. Simple Capture Card Device Driver Installation
Figure 16. Simple Capture Card Device Driver Completion
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6 ADSxx53EVM-PDK Kit Operation
This section describes how to use ADSxx53EVM-PDK and the ADSxx53EVM software to configure the
EVM and acquire data.
6.1 About the Simple Capture Card Controller Board
The simple capture card controller board provides the USB interface between the PC and the
ADSxx53EVM. The controller board is designed around the AM335x processor, a USB 2.0 high-speed
capability, 32-bit ARM core. The simple capture card controller board incorporates an onboard FPGA
subsystem and 256 MB of onboard DDR SRAM memory.
The simple capture card controller board is not sold as a development board, and it is not available
separately. TI cannot offer support for the simple capture card controller board except as part of this EVM
kit.
6.2 Loading the ADSxx53EVM-PDK Software
The ADS835x EVM software (this software also supports the ADSxx53EVM-PDK) provides control over
the settings of the ADSxx53. Adjust the ADSxx53EVM settings when the EVM is not acquiring data.
During acquisition, all controls are disabled and settings cannot be changed.
Settings on the ADSxx53EVM correspond to settings described in the ADSxx53 product data sheet
(available for download at http://www.ti.com); see the product data sheet for details.
To load the ADS835x EVM software, follow these steps:
Step 1. Make sure the EVM kit is configured and powered up as explained in Section 5.2.2 and
Figure 6.
Step 2. Start the ADS835x EVM software. Go to Start →All Programs →Texas Instruments →
ADS835x EVM and click ADS835x EVM to load the software.
Step 3. Verify that the software detects the ADSxx53EVM. The GUI identifies the EVM hardware that
is connected to the controller board and displays either Loading the ADSxx53evm Settings or
Loading the ADS7854evm Settings. After the settings are loaded, ADSxx53EVM GUI or
ADS7854 EVM GUI displays at the top of the GUI screen, as shown in Figure 17.
Figure 17. GUI Display Prompt
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6.3 ADSxx53EVM Settings
Configure the ADSxx53EVM with different settings for evaluation. In order to configure the device settings,
follow these steps:
1. Load the ADSxx53 EVM settings page in the GUI. Hover the cursor over the red arrow at the left-
center side of the GUI screen; a menu with different GUI pages appears. Click on ADSxx53 EVM
Settings, as shown in Figure 18.
Figure 18. Open the ADSxx53 EVM Settings Page
2. On the ADSxx53 EVM Settings page, find the Internal Reference [CFR, Bit[6] ] button to select the
internal or external onboard reference sources. Jumpers JP5 and JP6 must be installed when selecting
the external REF5025 (U5) onboard reference. Make sure to uninstall jumpers JP5 and JP6 when
selecting the ADSxx53 device internal reference. The GUI displays the appropriate reference jumper
settings, as shown in Figure 19.
Figure 19. Selecting the External Onboard Reference or the ADSxx53 Internal Dual Reference
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3. The ADSxx53 device incorporates two internal programmable 2.5-V reference sources. When selecting
the dual, internal programmable reference, independently change the voltages at VREF_A and
VREF_B by writing to user-programmable registers REFDAC_A and REFDAC_B. The Vref Value-ADC
Aand Vref Value-ADC B control panels contain the REFDAC_x register settings. The reference
voltage can be programmed in the range of 2.5 V to 2.0 V by entering the REFDAC_x register value in
the control panel and clicking the Write REFDAC_x button. Figure 20 shows the internal reference Vref
Value-ADC x control panels on the ADSxx53EVM Settings page of the GUI.
Figure 20. Programming the REFDAC Registers in the ADSxx53EVM
4. Scroll down in the ADSxx53EVM Settings page and find the Input Range Selection [CFR, Bit[9]] button
to select the 0 to Vref range mode or the 0 to 2 × Vref range mode. Install jumpers JP3 and JP4 when
selecting the 0 to Vref range. Uninstall jumpers JP3 and JP4 when selecting the 0 to 2 × Vref range .
The GUI displays the appropriate JP3 and JP4 jumper settings, as shown in Figure 21.
Figure 21. Selecting 0 to Vref Range or 0 to 2 × Vref Range
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