ST STEVAL-IHP007V1 User manual

December 2016 DocID026935 Rev 3 1/47
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UM1818
User manual
Street lighting power line modem evaluation board based on
ST7580 PLM and STM32 microcontroller
Introduction
This document explains how to use and set up the firmware and the software designed for
the STEVAL-IHP007V1 board and all the necessary setup for using the hardware.
The system is based to the ST7580 data link protocol firmware, data link protocol described
in the application note AN4018. ST7580 data link protocol firmware is organized in a layer
structure. A dedicated layer allows the user to design its own application interfacing to the
evaluation board features with very simple and easy to use APIs.
Dedicated software graphic user interface (GUI) allows the user to use all the embedded
features interfacing the PLM evaluation board with the PC via an RS232 communication
port.
This firmware is developed using STM32F10x standard peripherals library Rel.3.5.0 and
IAR Embedded Workbench
®
IDE for STM32 microcontrollers Rel. 6.50x
The STEVAL-IHP007V1 hardware evaluation board embeds an ARM 32-bit Cortex™-M3
core-based STM32F103xB and an ST7580 PSK multi mode power line networking system-
on-chip.
Figure 1. STEVAL-IHP007V1 evaluation board
www.st.com

Contents UM1818
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Contents
1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
3 Hardware installation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
4 Firmware description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
4.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
4.2 Remote firmware update (RFU) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
4.3 Firmware download . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
4.4 Firmware architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
4.5 Firmware data types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
4.6 Firmware frame types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
4.6.1 Communication frames types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
4.6.2 Ping frames . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
4.6.3 Error frames . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
4.6.4 Service frames . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Appendix A HID commands. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Appendix B Schematic diagrams and bill of material. . . . . . . . . . . . . . . . . . . . . 35
B.1 Schematic diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
B.2 Bill of material (BOM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Appendix C CRC 16 calculation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
5 Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46

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1 Features
•Configurable PSK power line modem interface with an embedded firmware stack for a
complete power line communication management
•8 user configurable general purpose input/output pins
•USART communication channel for evaluation board interfacing
•Internal configurable RTC evaluation board with lithium backup battery
•Programmable user data and PLM parameters Flash memory area
•Remote firmware update
•Embedded AES 128 encryption evaluation board with programmable AES Key

Description UM1818
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2 Description
The STEVAL-IHP007V1 block diagram is shown in Figure 2. The general purpose power
line modem evaluation board is based on an ST7580 x-PSK power line modem device and
an ARM 32-bit Cortex™-M3 core based STM32F103xB microcontroller. The PLM
evaluation board is a fully functional communication evaluation board, with 8 programmable
I/Os, a real time clock and a Flash memory area for modem parameters and user data
storage. The firmware structure is made up of several layers, each dealing with a different
feature. The application layer engine is the general interface between the user program and
all the parts of the evaluation board. It manages the communication ports, the evaluation
board peripherals such as SCI, RTC, I/Os, LEDs and timing management. It is also the
interface between the PLM communication protocol and the user application layer. The PLM
communication protocol, itself made up of several layers, implements and manages the
power line communication, manages the conflicts, timing and repetitions, the addressing,
and so on. Please refer to AN4018 for details on the ST7580 communication protocol
features and application services provided. Some features are managed directly by the
application engine, and are transparent to the user, such as the RTC management or the
board parameter update, as well as the board programming and configuration, which is
done by particular programming or service commands managed and acknowledged directly
by the application engine. Even the remote firmware update is managed by the application
engine and allows the firmware being update remotely by power line modem.
The STEVAL-IHP007V1 is powered by a dual regulated DC power source, +12VDC (pin 1)
and +3.3 VDC (pin 2) from the power supply connector (J2). The pin 3 is the ground.
The communication is done via power line, which is applied to the board using the J1
connector, where the pin 1 must be connected to the neutral wire while the pin 3 to the
phase wires (refer to the Appendix A).
Figure 2. STEVAL-IHP007V1 block diagram
It is possible to connect the evaluation board in a three phase line (in case of
communication modules are connected in all three phases), in this case an external

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UM1818 Description
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capacitor of 220 nF X1 must be connected to any additional phase, and then the other side
of capacitors together with the common pin 5 of the J2 connector, following the schematic
shown in the Figure 3, and the 0 Ωresistor R1 must be mounted.
Figure 3. Three phase connection
The GP PLM module is provided of a user interface (J3) shown in Figure 4 where there are
connected the SPI interface pins (MOSI, MISO, SCK and NSS), the RS232 interface pins
(Tx and Rx), the USB interface pins (D+ and D-) and the user programmable general
purpose I/O pins. Remark that those pins are directly connected to the microcontroller, so be
careful to provide the correct insulation and
protection depending on the use those pins are addressed.
It is possible to power the PLM using the +3.3 VDC (pin 19), +12 VDC (pin 20 or 22) and
GND (pins 17, 23, 20 and 24) of this connector instead of the connector J2, using only a
single connector for power supply and control signals.
A lithium backup battery mounted on the board and 32 kHz quartz allows the use of the full
functionality of the internal RTC of the microcontroller, allowing precise time-based
operations.

Description UM1818
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Figure 4. User interface connector
A two color LED allows the signaling the board operations, data transmission and reception.
Finally, a programming connector allows the firmware download and debug, even if it is
possible to use the remote firmware update feature to remotely update the firmware using
the PLM, as described further in this user manual. If the IAR - JLINK/JTRACE is used for the
firmware downloading, a simple JTAG adapter is necessary. The Figure 5 shows the
adapter schematics.
Figure 5. Programming connector JTAG adapter
PLM_GPIO0
PLM_GPIO1
PLM_GPIO2
PLM_GPIO3
PLM_GPIO4
PLM_GPIO5
PLM_GPIO6
PLM_GPIO7
BOOT0
SPI_ MOSI
SPI_ MISO
SPI_S CK
SPI_ NSS
USB_ DM
USB_ DP
USART_TX
USART_RX
VDDIOVCC
12
34
56
78
910
1112
1314
1516
1718
1920
2122
2324
J3
TSW-112-08-L-D- RA
GSPG23072015DI1045

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3 Hardware installation
Connect a regulated dual DC power supply to the power source pins of the connector J3 as
described previously and power the board.
In order to download the firmware, plug the programmer adapter (Figure 5) in the
programming connector J1 and the IAR J-Link programmer in the JTAG connector of the
adapter.
Refer to the chapter firmware description (paragraph 6.3 for the firmware download
procedure). As soon as the application is launched, the LEDs should quickly switch on
indicating that the board has to be configured.

Firmware description UM1818
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4 Firmware description
4.1 Introduction
The firmware structure is constituted of several layers each of it taking care of a different
feature. The application layer engine is the general interface between the user program and
all the parts of the module. It takes care of the communication ports, the board peripherals
as RTC and I/Os, and timing management. It is also the interface between the PLM
communication protocol and the user program. The PLM communication protocol, itself
constituted by several layers, implements and manages the power line communication,
manages the conflicts, timing and repetitions, the addressing and so on.
Some features are managed directly by the application engine, and are transparent to the
user, as well as the board programming and configuration, which is done by particular
programming or service commands managed and acknowledged directly by the application
engine, the RTC management, the board parameter or the firmware update.
The user application can be interfaced to the application engine by simples APIs used for
the data transfer and the evaluation board interface. The Figure 6 shows the firmware
structure.
Figure 6. Firmware structure
The file user.c/h and application.c/h are the owner of application management, this manage
the data flow from/to the PLM physical and from/to the UART side.
4.2 Remote firmware update (RFU)
The remote firmware update (RFU) uses the power line modem as external communication
channel for receiving a new firmware dump. The firmware dump is placed in the internal
Flash memory of the microcontroller. Hence, the total memory size of the microcontroller
must be at least the double of the estimated maximum size of the firmware application (in
this application is set to 60 kbytes), plus 4 Kb of additional memory for a bootloader. The
Figure 7 shows the microcontroller memory organization.
The bootloader is loaded at the startup and checks the active segment containing the actual
firmware. The implemented mechanism uses three partitions of the microcontroller’s Flash

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memory, one containing the bootloader and two containing the actual running firmware
(active image) and the new firmware as soon as a RFU is needed.
As soon as the firmware transfer is completed, a “swap” command sent from the remote
PLM causes the target PLM to check first the integrity of the firmware dump (actually a
checksum is calculated and compared with the one sent by the remote PLM), and after the
reset vector address of the new firmware is written in a dedicated Flash segment of the
bootloader. Last the microcontroller is self reset, and the new firmware executed.
Figure 7. Memory organization
The RFU protocol manages the RFU “start”, “get new firmware segment” (with the segment
address) and “swap” commands. The protocol is not embedded in the bootloader, hence it
can be updated with the new firmware, bust the user must be careful in the modifications as
any bugs can compromise the RFU mechanism.
As soon as a new firmware segment is received, the RFU manager checks if the address is
within the firmware interrupt vector table. If it is the case, an offset depending on the free
firmware image (1 or 2) allocation is added to each interrupt vector before being written in
the free image Flash area.
In the Figure 8 is shown the RFU flowchart.

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Figure 8. RFU flowchart (1of 2)
Figure 9. RFU flowchart (2 of 2)
4.3 Firmware download
In the setup directory there are different workspaces stored in different directories. In order
to implement the remote firmware update feature it is necessary to download the project
located in the workspace “Firmware - Application and Bootloader”. This workspace contains
two different projects, one is the bootloader and the other one is the application itself. If the
board has never been programmed, this workspace must be downloaded before.
Open the IAR Embedded Workbench
®
IDE for STM32 microcontrollers Rel. 6.50 (or a more
recent release). Click File\Open\Workspace and load the following workspace placed in the
directory selected during the setup file installation: “Firmware - Application and
Bootloader\EWARM\Project.eww”. Verify that the application project is the active project
(the project name must be in bold), otherwise select the active project in the list below the
workspace (Figure 10).