Texas Instruments DP83TD510E-EVM User manual

User’s Guide
DP83TD510E-EVM User’s Guide
Nikhil Menon
ABSTRACT
This User’s Guide discusses how to properly operate and configure the DP83TD510E-EVM. For best layout
practices, schematic files, and Bill of Materials, see the associated support documents.
Figure 1-1. DP83TD510E-EVM consists of two PCB's: DP83TD510E Single-Pair-Ethernet board and
DP83822I Media-Converter board
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Table of Contents
1 Definitions............................................................................................................................................................................... 5
2 Introduction.............................................................................................................................................................................6
2.1 Key Features......................................................................................................................................................................6
2.2 Block Diagram....................................................................................................................................................................7
2.3 Operation – Quick Setup....................................................................................................................................................8
3 Board Setup Details..............................................................................................................................................................10
3.1 Power Supply Selection................................................................................................................................................... 10
3.2 Master and Slave Mode Selection – DP83TD510E..........................................................................................................11
3.3 Clock Selection – DP83TD510E...................................................................................................................................... 12
3.4 SMI Connection................................................................................................................................................................12
3.5 Cable Assembly............................................................................................................................................................... 12
3.6 LED Indication..................................................................................................................................................................12
3.7 Serial Management Interface........................................................................................................................................... 12
3.8 Configuration Options...................................................................................................................................................... 12
4 Software.................................................................................................................................................................................14
4.1 MSP430 Driver.................................................................................................................................................................14
4.2 USB-2-MDIO Software.....................................................................................................................................................14
5 Schematics............................................................................................................................................................................15
5.1 Main Power Schematic ................................................................................................................................................... 16
5.2 Main Block Schematic......................................................................................................................................................17
5.3 Interface Schematic......................................................................................................................................................... 18
5.4 Analog Front End Schematic........................................................................................................................................... 19
5.5 COMs Schematic............................................................................................................................................................. 21
5.6 Header Board...................................................................................................................................................................22
5.7 Hardware Schematic........................................................................................................................................................23
6 Layout.................................................................................................................................................................................... 24
6.1 Top Overlay......................................................................................................................................................................24
6.2 Top Layer Mask................................................................................................................................................................24
6.3 Top Layer......................................................................................................................................................................... 24
6.4 Ground Layer 1................................................................................................................................................................ 25
6.5 Signal Layer..................................................................................................................................................................... 25
6.6 Power Layer..................................................................................................................................................................... 25
6.7 Ground Layer 2................................................................................................................................................................ 26
6.8 Bottom Layer....................................................................................................................................................................26
6.9 Bottom Layer Mask.......................................................................................................................................................... 26
6.10 Bottom Overlay.............................................................................................................................................................. 27
6.11 Board Assembly............................................................................................................................................................. 27
7 Bill of Materials..................................................................................................................................................................... 29
8 Revision History................................................................................................................................................................... 38
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List of Figures
Figure 1-1. DP83TD510E-EVM consists of two PCB's: DP83TD510E Single-Pair-Ethernet board and DP83822I Media-
Converter board....................................................................................................................................................................... 1
Figure 2-1. DP83TD510E-EVM – Top Side................................................................................................................................. 6
Figure 2-2. DP83TD510E-EVM – Bottom Side............................................................................................................................7
Figure 2-3. DP83TD510E-EVM Block Diagram...........................................................................................................................7
Figure 2-4. Wide-Vin Supply Connection.....................................................................................................................................8
Figure 2-5. DP83TD510E External Supply Connection and Jumpers......................................................................................... 9
Figure 3-1. DP83TD510E USB Power Supply...........................................................................................................................11
Figure 5-1. DP83TD510E-EVM Main Power............................................................................................................................. 16
Figure 5-2. DP83TD510E-EVM Main Block...............................................................................................................................17
Figure 5-3. DP83TD510E-EVM Interface.................................................................................................................................. 18
Figure 5-4. DP83TD510E-EVM AFE......................................................................................................................................... 19
Figure 5-5. DP83822I Media Converter AFE.............................................................................................................................20
Figure 5-6. DP83TD510E-EVM COMs...................................................................................................................................... 21
Figure 5-7. DP83TD510E-EVM break-out connector................................................................................................................ 22
Figure 5-8. DP83TD510E-EVM Hardware.................................................................................................................................23
Figure 6-1. Top Overlay............................................................................................................................................................. 24
Figure 6-2. Top Layer Mask.......................................................................................................................................................24
Figure 6-3. Top Layer.................................................................................................................................................................24
Figure 6-4. Ground Layer 1....................................................................................................................................................... 25
Figure 6-5. Signal Layer............................................................................................................................................................ 25
Figure 6-6. Power Layer............................................................................................................................................................ 25
Figure 6-7. Ground Layer 2....................................................................................................................................................... 26
Figure 6-8. Bottom Layer........................................................................................................................................................... 26
Figure 6-9. Bottom Layer Mask................................................................................................................................................. 26
Figure 6-10. Bottom Overlay......................................................................................................................................................27
Figure 6-11. Top Assembly........................................................................................................................................................ 27
Figure 6-12. Bottom Assembly.................................................................................................................................................. 28
Figure 6-13. Drill Drawing.......................................................................................................................................................... 28
Figure 6-14. Board Dimensions................................................................................................................................................. 28
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List of Tables
Table 1-1. Terminology.................................................................................................................................................................5
Table 3-1. DP83822 Bootstrap Resistor Designation and Suggested Bootstrap Resistor Values.............................................13
Table 3-2. DP83TD510E Bootstrap Resistor Designation and Suggested Bootstrap Resistor Values......................................13
Table 7-1. Bill of Materials..........................................................................................................................................................29
Trademarks
All other trademarks are the property of their respective owners.
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1 Definitions
Table 1-1. Terminology
ACRONYM DEFINITION
PHY Physical Layer Transceiver
MAC Media Access Controller
SMI Serial Management Interface
MDIO Management Data I/O
MDC Management Data Clock
RGMII Reduced Gigabit Media Independent Interface
SFD Start-of-Frame Detection
VDDA Analog Core Supply Rail
VDDIO Digital Supply Rail
PD Pulldown
PU Pullup
MC Microcontroller
AFE Analog Front End
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2 Introduction
The DP83TD510E-EVM supports 10-Mbps speed and is IEEE 802.3cg compliant. A DP83822I media converter
board is provided for 10BASE-TX Standard Ethernet support and enables bit-error rate testing, interoperability
testing, and PMA compliance testing. The EVM also provides on-board tools to configure PHY register using a
USB-MDIO graphical user interface tool. The EVM can be powered by a Wide-Vin 5V-36V power supply or
through a microUSB cable. Both DP83TD510E and DP83822I can be set to RMII Master or Slave through an on-
b0ard 25MHz crystal oscillator or the other's RMII 50MHz clock, respectively.
2.1 Key Features
• Media Converter: 10BASE-T1L to 10BASE-TX
• DP83TD510E IEEE802.3cg Compliant
• 10Base-TX interface for standard Ethernet RJ-45 connection using DP83822H
• RMII Back-to-Back Configuration
• Onboard USB2MDIO to configure PHY
– USB-2-MDIO Support
– 4-Pin Dip Switch
• Status LEDs
– DP83TD510E
• Link
• Link + Activity
– DP83822
• Link
– SMI Command
• Variable I/O Voltage Range: 1.8-V, 2.5-V, and 3.3-V
• Bootstraps for Hardware Configuration
• 10BASE-T1L Error Free Data transfer Over 1000 meters
• 10BASE-T1 Error Free Data transfer over 200 meters
Figure 2-1. DP83TD510E-EVM – Top Side
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Figure 2-2. DP83TD510E-EVM – Bottom Side
2.2 Block Diagram
Figure 2-3. DP83TD510E-EVM Block Diagram
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2.3 Operation – Quick Setup
The DP83TD510E block of the DP83TD510E-EVM can operate from a single DC supply connected to terminal
block J12. The DP83822I media converter board is powered by the VDDIO and VDDA supplies of the
DP83TD510E board through the Samtec connector.
•
Figure 2-4. Wide-Vin Supply Connection
• Place shunt at J14 header in the "On-Board" position to connect VDDIO LDO
• Place shunt at J15 header in the "On-Board" position to connect VDDA LDO
• Place shunt at J16 header in the "On-Board" position to connect DVDD LDO
• Remove Shunt at J9 header
• Connect J11 to J25 for Media Converter operation
•Wide Vin: Connect 36-V to 5-V to pin 1 of J12 and ground to pin 2 of J12
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Figure 2-5. DP83TD510E External Supply Connection and Jumpers
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3 Board Setup Details
3.1 Power Supply Selection
3.1.1 Onboard Power Supply Operation
• DP83TD510E Onboard Power
– Place shunt at J14 in the "On-Board" position to enable onboard VDDIO
– Place shunt at J15 in the "On-Board" position to enable onboard VDDA
– Place shunt at J16 in the "On-Board" position to enable onboard DVDD
– Remove shunt at J9
• DP83822I Onboard Power
– Populate R5, R6 to deliver power through J25 from DP83TD510E board
3.1.2 External Power Supply Operation
• DP83TD510E External Power
– Place shunt at J14 in the "EXT" position
– Place shunt at J15 in the "EXT" position
– Place shunt at J16 in the "EXT" position
– Connect 1.0V to DVDD-EXT on J16
– Connect 3.3-V tor 1.8V to VDDA-EXT on J15
– Connect 1.8-V, 2.5-V, or 3.3-V to VDDIO-EXT on J14
– Connect ground to GND on J12 pin 2
• DP83822I External Power
– Remove R5, R6 to disconnect VDDA, VDDIO from DP83TD510E board
– Place shunt at J26 in the "EXT" position to disable onboard VDDA
– Place shunt at J27 in the "EXT" position to disable onboard VDDIO
– Connect 3.3-V or 1.8-V to VDDA-EXT on J21 or J26
– Connect 1.8-V, 2.5-V, or 3.3-V to VDDIO-EXT on J21 or J27
– Connect ground to GND on J21
3.1.3 USB Power Supply Option
DP838TD510E block powered by USB.
• Plug in micro-USB to J4
• Place shunt at J9
• Place shunt at J14 in the "On-Board" position
• Place shunt at J15 in the "On-Board" position
• Place shunt at J16 in the "On-Board" position
Note
Only populate J9 when powering over USB.
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Figure 3-1. DP83TD510E USB Power Supply
3.2 Master and Slave Mode Selection – DP83TD510E
3.2.1 DP83TD510E in RMII Master Mode, DP83822I in RMII Slave Mode (default)
• Populate R149
• Remove R143, R136, R91
• Set the correct hardware straps or perform the correct software write.
Hardware Strapping
• Populate R84, R103 with 2.49k (1%)
• Place shunt on LED_0, J20 in "Mode 0" position
Software Programming
• DP83TD510E
– Write register 0x0017[5]=1
– Write register 0x0017[7]=0
• DP83822I
– Write register 0x0017[5]=1
– Write register 0x0017[7]=1
3.2.2 DP83TD510E in Slave Mode, DP83822I in Master Mode
• Populate R136, 138, R143, R25
• Remove R135, R137, R149, R91
• Set the correct hardware straps or perform the correct software write.
Hardware Strapping
• Populate R84, R103 with 5.76k (1%), R108 with 2.49k (1%)
• Place shunt on J20 in "Mode 1" position
Software Programming
• DP83822I
– Write register 0x0017[5]=1
– Write register 0x0017[7]=0
• DP83TD510E
– Write register 0x0017[5]=1
– Write register 0x0017[7]=1
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3.3 Clock Selection – DP83TD510E
3.3.1 50 MHz Reference Clock for DP83TD510E in RMII Slave Mode
• Remove R135, R137, R149
• Populate R143, R25
3.3.2 External Clock
• Remove R135
• Populate R134, J7
• Provide External Clock to SMA at J7
3.3.3 On-Board 25 MHz crystal
• Remove R134, R143, R25
• Populate R135, R137
3.4 SMI Connection
In Media Converter configurations, the MDIO/MDC lines of the DP83TD510E and DP83822I are tied together.
Both PHYs can be accessed simultaneously. The DP83TD510E has been set to PHY address 00 and the
DP83822I has been set to PHY address 05.
• Connect micro-USB to J4
• For direct access to MDIO, MDC lines, populate headers at J22, J23, on DP83TD510E and/or J13, J28 on
DP83822I
3.5 Cable Assembly
• Plug a CAT5, CAT5E, or CAT6 cable into the RJ45 connector J2
– Connect the far-end of the Ethernet cable to a 10BASE-TX capable PHY
• Plug a Single-Pair-Ethernet wires into the terminal block J1 as labeled
– Connect the far-end of the cable to a 10BASE-T1L capable PHY
3.6 LED Indication
• Look for LED_0 and LED_1 to illuminate when a link is successfully established
• Look for Green LED to illuminate on the RJ45 connector J2 when a link is successfully established (in media
convertor mode)
• LED_1 will blink for TX/RX activity
3.7 Serial Management Interface
The DP83TD510E-EVM supports SMI (MDIO/MDC) through J22, J23 and includes an onboard MSP430F5529
for USB-2-MDIO control.
Notes:
• DP83TD510E default PHY_ID is 0
• DP83822 default PHY_ID is 5
• PHY IDs can be changed through bootstrap options found in the data sheet
3.8 Configuration Options
3.8.1 Bootstrap Options
Some DP83TD510E and DP83822 configurations can be done through bootstrap options. Options can be
selected with jumpers or resistor population. Refer to the data sheets for bootstrap options and the schematic
and layout sections of this User’s Guide for resistor locations.
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3.8.2
Table 3-1. DP83822 Bootstrap Resistor Designation and Suggested Bootstrap Resistor Values
PIN NAME PIN NUMBER STRAP MODE PU RESISTOR (KΩ) PU RESISTOR
DESIGNATION
PD RESISTOR
(KΩ)
PD RESISTOR
DESIGNATION
RX_DV 26
1 OPEN
R103
OPEN
R108
2 10 2.49
3 5.76 2.49
4 2.49 OPEN
Table 3-2. DP83TD510E Bootstrap Resistor Designation and Suggested Bootstrap Resistor Values
PIN NAME PIN NUMBER STRAP MODE PU RESISTOR (KΩ) PU RESISTOR
DESIGNATION
PD RESISTOR
(KΩ)
PD RESISTOR
DESIGNATION
RX_D0 26 0 OPEN R99 2.49 R104
1 2.49 OPEN
RX_D1 25 0 OPEN R100 2.49 R105
1 2.49 OPEN
RX_D2 24 0 OPEN R101 2.49 R106
1 2.49 OPEN
RX_D3 14 0 OPEN R102 2.49 R107
1 2.49 OPEN
RX_DV 15 0 OPEN R103 2.49 R108
1 2.49 OPEN
LED_0 35 0 OPEN R185 2.49 R201
1 2.49 OPEN
LED_2 6 0 OPEN R187 2.49 R203
1 2.49 OPEN
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4 Software
The on-board MSP430 comes pre-programmed and ready to use. When using this EVM for the first time on a
Windows 7 (or above) PC, MSP430 drivers and USB-2-MDIO software utility will have to be installed. USB-2-
MDIO software can be used for accessing the PHY's registers. In the case where an external MSP430 or ezFET
is needed, the user may simply connect the TST and RST pins of their device to the DP83TD510E-EVM
4.1 MSP430 Driver
Install the latest MSP430 driver from this website: http://software-dl.ti.com/msp430/msp430_public_sw/mcu/
msp430/MSP430_FET_Drivers/latest/index_FDS.html
http://software-dl.ti.com/msp430/msp430_public_sw/mcu/msp430/MSP430_FET_Drivers/latest/index_FDS.html.
4.2 USB-2-MDIO Software
Download the software from http://www.ti.com/tool/usb-2-mdiohttps://www.ti.com/tool/usb-2-mdio .
The webpage also contains the User’s Guide for installing and using the software. Because the MSP430 is on-
board the DP83TD510E-EVM, it is not necessary to purchase a separate MSP430 Launchpad kit and connect to
the PHY using wires. In the case the on-board MSP430 cannot be used for some reason, MDIO and MDC pins
are also broken out on J23 and J22 pins, respectively. Users can connect an MSP430 launchpad or their own
MDIO-MDC utility on J23 and J22 to access the PHY
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5 Schematics
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5.1 Main Power Schematic
Figure 5-1. DP83TD510E-EVM Main Power
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5.2 Main Block Schematic
Figure 5-2. DP83TD510E-EVM Main Block
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5.3 Interface Schematic
Figure 5-3. DP83TD510E-EVM Interface
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5.4 Analog Front End Schematic
Figure 5-4. DP83TD510E-EVM AFE
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Figure 5-5. DP83822I Media Converter AFE
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